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Merge pull request #2882 from n-hutton/iclass_build_issues

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change seed, making new iclass builds work again
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Iceman 2025-06-05 00:01:03 +02:00 • committed by GitHub
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6 changed files with 2 additions and 2 deletions
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fpga/Makefile
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@ -45,7 +45,7 @@ XST_OPTS_AREA += -fsm_style bram
XST_OPTS_AREA += -fsm_encoding compact XST_OPTS_AREA += -fsm_encoding compact
# par specific option (set determistic seed) # par specific option (set determistic seed)
PAR_OPTIONS = -t 1 PAR_OPTIONS = -t 2
# Types of selective module compilation: # Types of selective module compilation:
# WITH_LF Enables selection of LF modules (and disables all HF) # WITH_LF Enables selection of LF modules (and disables all HF)
@ -188,7 +188,7 @@ work:
$(Q)$(RM) $@ $*.drc $*.rbt $(Q)$(RM) $@ $*.drc $*.rbt
$(info [=] BITGEN $@) $(info [=] BITGEN $@)
$(Q)$(XILINX_TOOLS_PREFIX)bitgen $(VERBOSITY) -w $* $@ $(Q)$(XILINX_TOOLS_PREFIX)bitgen $(VERBOSITY) -w $* $@
#python3 ../strip_date_time_from_binary.py $@ || true python3 ../strip_date_time_from_binary.py $@ || true
$(Q)$(CP) $@ .. $(Q)$(CP) $@ ..
# Build all targets # Build all targets

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fpga/fpga_icopyx_hf.bit
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