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chg: scc frames 16 or 8 bit wide
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2 changed files with 41 additions and 27 deletions
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@ -52,23 +52,26 @@ thres| x x x x x x x x
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#define FPGA_CMD_TRACE_ENABLE (2<<12) // C
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// Definitions for the FPGA configuration word.
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#define FPGA_MAJOR_MODE_MASK 0x01C0
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#define FPGA_MINOR_MODE_MASK 0x003F
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// LF
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#define FPGA_MAJOR_MODE_LF_READER (0<<5)
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#define FPGA_MAJOR_MODE_LF_EDGE_DETECT (1<<5)
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#define FPGA_MAJOR_MODE_LF_PASSTHRU (2<<5)
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#define FPGA_MAJOR_MODE_LF_ADC (3<<5)
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#define FPGA_MAJOR_MODE_LF_READER (0<<6)
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#define FPGA_MAJOR_MODE_LF_EDGE_DETECT (1<<6)
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#define FPGA_MAJOR_MODE_LF_PASSTHRU (2<<6)
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#define FPGA_MAJOR_MODE_LF_ADC (3<<6)
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// HF
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#define FPGA_MAJOR_MODE_HF_READER_TX (0<<5) // D
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#define FPGA_MAJOR_MODE_HF_READER_RX_XCORR (1<<5) // D
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#define FPGA_MAJOR_MODE_HF_SIMULATOR (2<<5) // D
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#define FPGA_MAJOR_MODE_HF_ISO14443A (3<<5) // D
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#define FPGA_MAJOR_MODE_HF_SNOOP (4<<5) // D
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#define FPGA_MAJOR_MODE_HF_ISO18092 (5<<5) // D
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#define FPGA_MAJOR_MODE_HF_GET_TRACE (6<<5) // D
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#define FPGA_MAJOR_MODE_HF_READER (0<<6) // D
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#define FPGA_MAJOR_MODE_HF_SIMULATOR (1<<6) // D
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#define FPGA_MAJOR_MODE_HF_ISO14443A (2<<6) // D
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#define FPGA_MAJOR_MODE_HF_SNOOP (3<<6) // D
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#define FPGA_MAJOR_MODE_HF_ISO18092 (4<<6) // D
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#define FPGA_MAJOR_MODE_HF_GET_TRACE (5<<6) // D
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// BOTH HF / LF
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#define FPGA_MAJOR_MODE_OFF (7<<5) // D
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#define FPGA_MAJOR_MODE_OFF (7<<6) // D
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// Options for LF_READER
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#define FPGA_LF_ADC_READER_FIELD 0x1
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@ -78,13 +81,20 @@ thres| x x x x x x x x
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#define FPGA_LF_EDGE_DETECT_READER_FIELD 0x1
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#define FPGA_LF_EDGE_DETECT_TOGGLE_MODE 0x2
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// Options for the HF reader, tx to tag
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#define FPGA_HF_READER_TX_SHALLOW_MOD 0x1
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// Options for the HF reader
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#define FPGA_HF_READER_MODE_RECEIVE_IQ (0<<0)
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#define FPGA_HF_READER_MODE_RECEIVE_AMPLITUDE (1<<0)
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#define FPGA_HF_READER_MODE_RECEIVE_PHASE (2<<0)
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#define FPGA_HF_READER_MODE_SEND_FULL_MOD (3<<0)
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#define FPGA_HF_READER_MODE_SEND_SHALLOW_MOD (4<<0)
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#define FPGA_HF_READER_MODE_SNOOP_IQ (5<<0)
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#define FPGA_HF_READER_MODE_SNOOP_AMPLITUDE (6<<0)
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#define FPGA_HF_READER_MODE_SNOOP_PHASE (7<<0)
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#define FPGA_HF_READER_MODE_SEND_JAM (8<<0)
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// Options for the HF reader, correlating against rx from tag
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#define FPGA_HF_READER_RX_XCORR_848_KHZ 0x1
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#define FPGA_HF_READER_RX_XCORR_SNOOP 0x2
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#define FPGA_HF_READER_RX_XCORR_QUARTER 0x4
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#define FPGA_HF_READER_SUBCARRIER_848_KHZ (0<<4)
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#define FPGA_HF_READER_SUBCARRIER_424_KHZ (1<<4)
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#define FPGA_HF_READER_SUBCARRIER_212_KHZ (2<<4)
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// Options for the HF simulated tag, how to modulate
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#define FPGA_HF_SIMULATOR_NO_MODULATION 0x0 // 0000
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@ -112,9 +122,9 @@ void FpgaEnableTracing(void);
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void FpgaDisableTracing(void);
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void FpgaDownloadAndGo(int bitstream_version);
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// void FpgaGatherVersion(int bitstream_version, char *dst, int len);
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void FpgaSetupSsc(void);
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void FpgaSetupSsc(uint16_t fpga_mode);
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void SetupSpi(int mode);
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bool FpgaSetupSscDma(uint8_t *buf, int len);
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bool FpgaSetupSscDma(uint8_t *buf, uint16_t len);
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void Fpga_print_status(void);
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int FpgaGetCurrent(void);
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void SetAdcMuxFor(uint32_t whichGpio);
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