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hitag, determine adc levels to get better demodulation
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2 changed files with 30 additions and 10 deletions
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@ -10,6 +10,7 @@
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#include "lfsampling.h"
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#include "lfsampling.h"
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#include "fpgaloader.h"
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#include "fpgaloader.h"
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#include "ticks.h"
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#include "ticks.h"
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#include "dbprint.h"
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// Sam7s has several timers, we will use the source TIMER_CLOCK1 (aka AT91C_TC_CLKS_TIMER_DIV1_CLOCK)
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// Sam7s has several timers, we will use the source TIMER_CLOCK1 (aka AT91C_TC_CLKS_TIMER_DIV1_CLOCK)
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// TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
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// TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
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@ -46,13 +47,28 @@ bool lf_test_periods(size_t expected, size_t count) {
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// Low frequency (LF) adc passthrough functionality
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// Low frequency (LF) adc passthrough functionality
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//////////////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////////////
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uint8_t previous_adc_val = 0;
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uint8_t previous_adc_val = 0;
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uint8_t adc_avg = 0;
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void lf_sample_mean(void) {
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uint8_t periods = 0;
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uint32_t adc_sum = 0;
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while (periods < 32) {
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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adc_sum += AT91C_BASE_SSC->SSC_RHR;
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periods++;
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}
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}
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// division by 32
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adc_avg = adc_sum >> 5;
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if (DBGLEVEL >= DBG_EXTENDED)
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Dbprintf("LF ADC average %u", adc_avg);
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}
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size_t lf_count_edge_periods_ex(size_t max, bool wait, bool detect_gap) {
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size_t lf_count_edge_periods_ex(size_t max, bool wait, bool detect_gap) {
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size_t periods = 0;
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size_t periods = 0;
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volatile uint8_t adc_val;
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volatile uint8_t adc_val;
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//uint8_t avg_peak = 140, avg_through = 96;
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uint8_t avg_peak = adc_avg + 3, avg_through = adc_avg - 3;
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// 140 - 127 - 114
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uint8_t avg_peak = 140, avg_through = 106;
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int16_t checked = 0;
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int16_t checked = 0;
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while (!BUTTON_PRESS()) {
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while (!BUTTON_PRESS()) {
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@ -98,8 +114,8 @@ size_t lf_count_edge_periods_ex(size_t max, bool wait, bool detect_gap) {
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}
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}
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}
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}
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}
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}
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previous_adc_val = adc_val;
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previous_adc_val = adc_val;
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if (periods >= max) return 0;
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if (periods >= max) return 0;
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}
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}
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}
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}
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@ -131,6 +147,7 @@ void lf_reset_counter() {
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bool lf_get_tag_modulation() {
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bool lf_get_tag_modulation() {
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return (rising_edge == false);
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return (rising_edge == false);
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}
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}
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bool lf_get_reader_modulation() {
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bool lf_get_reader_modulation() {
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return rising_edge;
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return rising_edge;
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}
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}
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@ -147,7 +164,7 @@ void lf_init(bool reader, bool simulate) {
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, LF_DIVISOR_134);
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if (reader) {
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if (reader) {
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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} else {
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} else {
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@ -168,8 +185,8 @@ void lf_init(bool reader, bool simulate) {
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// When in reader mode, give the field a bit of time to settle.
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// When in reader mode, give the field a bit of time to settle.
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// 313T0 = 313 * 8us = 2504us = 2.5ms Hitag2 tags needs to be fully powered.
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// 313T0 = 313 * 8us = 2504us = 2.5ms Hitag2 tags needs to be fully powered.
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if (reader) {
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if (reader) {
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// 50 ms
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// 10 ms
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SpinDelay(50);
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SpinDelay(10);
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}
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}
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// Steal this pin from the SSP (SPI communication channel with fpga) and use it to control the modulation
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// Steal this pin from the SSP (SPI communication channel with fpga) and use it to control the modulation
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@ -195,7 +212,7 @@ void lf_init(bool reader, bool simulate) {
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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// Prepare data trace
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// Prepare data trace
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uint32_t bufsize = 20000;
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uint32_t bufsize = 10000;
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// use malloc
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// use malloc
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if (logging) initSampleBufferEx(&bufsize, true);
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if (logging) initSampleBufferEx(&bufsize, true);
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@ -203,6 +220,8 @@ void lf_init(bool reader, bool simulate) {
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sample_config *sc = getSamplingConfig();
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sample_config *sc = getSamplingConfig();
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sc->decimation = 1;
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sc->decimation = 1;
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sc->averaging = 0;
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sc->averaging = 0;
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lf_sample_mean();
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}
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}
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void lf_finalize() {
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void lf_finalize() {
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@ -275,7 +294,7 @@ static void lf_manchester_send_bit(uint8_t bit) {
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lf_modulation(bit != 0);
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lf_modulation(bit != 0);
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lf_wait_periods(16);
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lf_wait_periods(16);
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lf_modulation(bit == 0);
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lf_modulation(bit == 0);
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lf_wait_periods(16);
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lf_wait_periods(32);
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}
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}
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// simulation
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// simulation
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@ -17,6 +17,7 @@
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extern bool logging;
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extern bool logging;
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void lf_sample_mean(void);
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bool lf_test_periods(size_t expected, size_t count);
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bool lf_test_periods(size_t expected, size_t count);
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size_t lf_count_edge_periods(size_t max);
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size_t lf_count_edge_periods(size_t max);
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size_t lf_detect_gap(size_t max);
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size_t lf_detect_gap(size_t max);
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