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chg: refactoring of hitag (@piwi)
chg: refactoring of hitagS (@iceman)
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9 changed files with 530 additions and 599 deletions
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@ -18,7 +18,9 @@
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// Piwi, 2019
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// Iceman, 2019
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#include "hitag2.h"
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#include "hitag2_crypto.h"
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#include "hitag.h"
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#include "proxmark3.h"
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#include "apps.h"
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#include "util.h"
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@ -1076,7 +1078,7 @@ void SimulateHitagTag(bool tag_mem_supplied, uint8_t *data) {
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LEDsoff();
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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set_tracing(false);
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set_tracing(false);
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS;
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AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS;
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@ -1384,8 +1386,7 @@ void WriterHitag(hitag_function htf, hitag_data *htd, int page) {
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StopTicks();
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int frame_count;
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int response;
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int frame_count = 0, response = 0;
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uint8_t rx[HITAG_FRAME_LEN];
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size_t rxlen = 0;
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uint8_t txbuf[HITAG_FRAME_LEN];
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@ -1440,8 +1441,6 @@ void WriterHitag(hitag_function htf, hitag_data *htd, int page) {
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// Set fpga in edge detect with reader field, we can modulate as reader now
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);
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// Set Frequency divisor which will drive the FPGA and analog mux selection
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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@ -1464,17 +1463,18 @@ void WriterHitag(hitag_function htf, hitag_data *htd, int page) {
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// TC1: Capture mode, defaul timer source = MCK/2 (TIMER_CLOCK1), TIOA is external trigger,
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// external trigger rising edge, load RA on falling edge of TIOA.
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AT91C_BASE_TC1->TC_CMR = AT91C_TC_CLKS_TIMER_DIV1_CLOCK | AT91C_TC_ETRGEDG_FALLING | AT91C_TC_ABETRG | AT91C_TC_LDRA_FALLING;
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AT91C_BASE_TC1->TC_CMR = AT91C_TC_CLKS_TIMER_DIV1_CLOCK
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| AT91C_TC_ETRGEDG_FALLING
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| AT91C_TC_ABETRG
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| AT91C_TC_LDRA_FALLING;
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// Enable and reset counters
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AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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while (AT91C_BASE_TC0->TC_CV > 0);
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while (AT91C_BASE_TC0->TC_CV > 0) {};
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// Reset the received frame, frame count and timing info
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frame_count = 0;
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response = 0;
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lastbit = 1;
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bStop = false;
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@ -1483,23 +1483,24 @@ void WriterHitag(hitag_function htf, hitag_data *htd, int page) {
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// hitagS settings
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reset_sof = 1;
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t_wait = 200;
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// DbpString("Configured for hitagS reader");
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DbpString("Configured for hitagS reader");
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} else if (htf < 20) {
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// hitag1 settings
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reset_sof = 1;
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t_wait = 200;
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// DbpString("Configured for hitag1 reader");
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DbpString("Configured for hitag1 reader");
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} else if (htf < 30) {
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// hitag2 settings
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reset_sof = 4;
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t_wait = HITAG_T_WAIT_2;
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// DbpString("Configured for hitag2 reader");
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DbpString("Configured for hitag2 reader");
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} else {
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Dbprintf("Error, unknown hitag reader type: %d", htf);
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return;
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}
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while (!bStop && !BUTTON_PRESS()) {
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// Watchdog hit
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while (!bStop && !BUTTON_PRESS() && !usb_poll_validate_length()) {
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WDT_HIT();
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// Check if frame was captured and store it
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@ -1531,9 +1532,7 @@ void WriterHitag(hitag_function htf, hitag_data *htd, int page) {
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// falling edge occured halfway the period. with respect to this falling edge,
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// we need to wait (T_Wait2 + half_tag_period) when the last was a 'one'.
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// All timer values are in terms of T0 units
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while (AT91C_BASE_TC0->TC_CV < T0 * (t_wait + (HITAG_T_TAG_HALF_PERIOD * lastbit)));
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// Dbprintf("DEBUG: Sending reader frame");
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while (AT91C_BASE_TC0->TC_CV < T0 * (t_wait + (HITAG_T_TAG_HALF_PERIOD * lastbit))) {};
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// Transmit the reader frame
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hitag_reader_send_frame(tx, txlen);
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@ -1555,7 +1554,6 @@ void WriterHitag(hitag_function htf, hitag_data *htd, int page) {
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bSkip = true;
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tag_sof = reset_sof;
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response = 0;
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// Dbprintf("DEBUG: Waiting to receive frame");
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uint32_t errorCount = 0;
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// Receive frame, watch for at most T0*EOF periods
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@ -1628,6 +1626,7 @@ void WriterHitag(hitag_function htf, hitag_data *htd, int page) {
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}
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// if we saw over 100 wierd values break it probably isn't hitag...
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if (errorCount > 100) break;
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// We can break this loop if we received the last bit from a frame
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if (AT91C_BASE_TC1->TC_CV > T0 * HITAG_T_EOF) {
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if (rxlen > 0) break;
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