github/RRG-Proxmark3
1
0
Fork 0
mirror of https://github.com/RfidResearchGroup/proxmark3.git synced 2025-07-06 04:51:36 -07:00
Code Issues Projects Releases Packages Wiki Activity Actions 4

Redundant check

Browse source 
A 3 bit counter will naturally roll over to zero on overflow, there is no need to explicitly check for max value and manually reset to zero
This commit is contained in:
Alex 2023-08-29 11:26:43 +02:00
parent 61765cc933
commit 762c942e95
1 changed files with 1 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

5
fpga/hi_sniffer.v
View file

@ -48,10 +48,7 @@ assign ssp_din = adc_d_out[0];
always @(posedge ssp_clk) always @(posedge ssp_clk)
begin begin
if(ssp_cnt[2:0] == 3'd7) ssp_cnt <= ssp_cnt + 1;
ssp_cnt[2:0] <= 3'd0;
else
ssp_cnt <= ssp_cnt + 1;
if(ssp_cnt[2:0] == 3'b000) // set frame length if(ssp_cnt[2:0] == 3'b000) // set frame length
begin begin