2 commits

Author	SHA1	Message	Date
pwpiwi	5ea2a24839	FPGA changes (#803) ... * merge hf_rx_xcorr and hf_tx modes into one module with common ssp_clk and ssp_frame * get rid of most of the warnings when compiling the HF verilog sources * refactoring the constants in Verilog sources	2019-03-24 18:11:41 +01:00
pwpiwi	fc52fbd42f	Add raw HF signal plotting (#786) ... * Add raw HF signal plotting * new fpga module hi_get_trace.v - store A/D converter output to circular buffer on FPGA * new command 'hf plot' - pull data from FPGA and display it in Graph Window	2019-02-20 19:18:12 +01:00