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https://github.com/Proxmark/proxmark3.git
synced 2025-08-14 02:26:59 -07:00
Clean up data types, some header cleanup, etc.
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parent
8419248d2d
commit
f7e3ed8287
17 changed files with 410 additions and 398 deletions
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@ -6,6 +6,7 @@
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//-----------------------------------------------------------------------------
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#include "proxmark3.h"
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#include "apps.h"
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#include "util.h"
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//-----------------------------------------------------------------------------
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// Set up the Serial Peripheral Interface as master
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@ -129,11 +130,11 @@ void FpgaSetupSsc(void)
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// ourselves, not to another buffer). The stuff to manipulate those buffers
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// is in apps.h, because it should be inlined, for speed.
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//-----------------------------------------------------------------------------
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void FpgaSetupSscDma(BYTE *buf, int len)
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void FpgaSetupSscDma(uint8_t *buf, int len)
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{
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AT91C_BASE_PDC_SSC->PDC_RPR = (DWORD)buf;
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AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) buf;
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AT91C_BASE_PDC_SSC->PDC_RCR = len;
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AT91C_BASE_PDC_SSC->PDC_RNPR = (DWORD)buf;
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AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) buf;
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AT91C_BASE_PDC_SSC->PDC_RNCR = len;
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AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN;
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}
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@ -207,8 +208,8 @@ static void DownloadFPGA(const char *FpgaImage, int FpgaImageLen, int byterevers
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}
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if(bytereversal) {
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/* This is only supported for DWORD aligned images */
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if( ((int)FpgaImage % sizeof(DWORD)) == 0 ) {
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/* This is only supported for uint32_t aligned images */
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if( ((int)FpgaImage % sizeof(uint32_t)) == 0 ) {
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i=0;
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while(FpgaImageLen-->0)
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DownloadFPGA_byte(FpgaImage[(i++)^0x3]);
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@ -330,12 +331,12 @@ void FpgaDownloadAndGo(void)
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/* Fallback for the old flash image format: Check for the magic marker 0xFFFFFFFF
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* 0xAA995566 at address 0x102000. This is raw bitstream with a size of 336,768 bits
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* = 10,524 DWORDs, stored as DWORDS e.g. little-endian in memory, but each DWORD
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* = 10,524 uint32_t, stored as uint32_t e.g. little-endian in memory, but each DWORD
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* is still to be transmitted in MSBit first order. Set the invert flag to indicate
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* that the DownloadFPGA function should invert every 4 byte sequence when doing
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* the bytewise download.
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*/
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if( *(DWORD*)0x102000 == 0xFFFFFFFF && *(DWORD*)0x102004 == 0xAA995566 )
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if( *(uint32_t*)0x102000 == 0xFFFFFFFF && *(uint32_t*)0x102004 == 0xAA995566 )
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DownloadFPGA((char*)0x102000, 10524*4, 1);
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}
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@ -375,7 +376,7 @@ void FpgaGatherVersion(char *dst, int len)
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// The bit format is: C3 C2 C1 C0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
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// where C is the 4 bit command and D is the 12 bit data
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//-----------------------------------------------------------------------------
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void FpgaSendCommand(WORD cmd, WORD v)
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void FpgaSendCommand(uint16_t cmd, uint16_t v)
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{
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SetupSpi(SPI_FPGA_MODE);
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while ((AT91C_BASE_SPI->SPI_SR & AT91C_SPI_TXEMPTY) == 0); // wait for the transfer to complete
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@ -386,7 +387,7 @@ void FpgaSendCommand(WORD cmd, WORD v)
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// vs. clone vs. etc.). This is now a special case of FpgaSendCommand() to
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// avoid changing this function's occurence everywhere in the source code.
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//-----------------------------------------------------------------------------
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void FpgaWriteConfWord(BYTE v)
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void FpgaWriteConfWord(uint8_t v)
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{
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FpgaSendCommand(FPGA_CMD_SET_CONFREG, v);
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}
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@ -396,7 +397,7 @@ void FpgaWriteConfWord(BYTE v)
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// closable, but should only close one at a time. Not an FPGA thing, but
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// the samples from the ADC always flow through the FPGA.
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//-----------------------------------------------------------------------------
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void SetAdcMuxFor(DWORD whichGpio)
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void SetAdcMuxFor(uint32_t whichGpio)
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{
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AT91C_BASE_PIOA->PIO_OER =
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GPIO_MUXSEL_HIPKD |
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