mirror of
https://github.com/Proxmark/proxmark3.git
synced 2025-08-22 14:13:42 -07:00
Add Makefile for fpga directory (Windows codepath is untested, in any case, go.bat is still there)
Retire rbt2c.pl, instead use objcopy to directly convert the .bit file into an .o that can be linked with the flash image Rename armsrc/fpga.c to armsrc/fpgaloader.c (since there is now a new fpga.o, created from fpga.bit) Remove fpgaimg.c from subversion, add fpga.bit Instead of creating fpgaimage.elf and osimage.elf separately, now create a joined fullimage.elf first (obsoleting ldscript-full), then extract only the fpga and os sections with objcopy (This creates unspecific warnings about an empty segment, need to investigate) Implement a rudimentary .bit parser in the firmware, use that to locate the bitstream in the new fpgaimage (which is just a plain copy of the fpga.bit file) and send it to the FPGA The code will check the format that's in flash and fall back to the legacy format
This commit is contained in:
henryk@ploetzli.ch
parent
391a974f53
commit
e73e717239
12 changed files with 178 additions and 10651 deletions
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@ -3,41 +3,40 @@
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APP_INCLUDES = apps.h
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# Add the "-DWITH_LCD" flag in APP_CLFAGS to add support for LCD
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# and add SRC_LCD to SRC_MAIN
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# and add SRC_LCD to THUMBSRC
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APP_CFLAGS = -O6
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SRC_LCD = fonts.c LCD.c
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SRC_MAIN = start.c \
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THUMBSRC = start.c \
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appmain.c \
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fpga.c \
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lfops.c \
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iso15693.c \
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util.c \
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usb.c
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# These are to be compiled in ARM mode
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SRC_MAIN_FAST = iso14443.c \
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iso14443a.c
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ARMSRC = iso14443.c \
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iso14443a.c \
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fpgaloader.c
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SRC_FPGA = fpgaimg.c
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THUMBSRC = $(SRC_MAIN) $(SRC_FPGA)
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ARMSRC = $(SRC_MAIN_FAST)
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MAIN_OBJ = $(patsubst %.c,$(OBJDIR)/%.o,$(SRC_MAIN) $(SRC_MAIN_FAST))
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# Do not move this inclusion before the definition of {THUMB,ASM,ARM}{OBJ,SRC}
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# Do not move this inclusion before the definition of {THUMB,ASM,ARM}SRC
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include ../common/Makefile.common
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all: $(OBJDIR)/osimage.s19 $(OBJDIR)/fpgaimage.s19
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$(OBJDIR)/fpgaimage.elf: $(OBJDIR)/fpgaimg.o
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$(LD) -g -Tldscript-fpga -Map=$(patsubst %.elf,%.map,$@) -o $@ $^
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$(OBJDIR)/fpga.o: fpga.bit
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$(OBJCOPY) -O elf32-littlearm -I binary -B arm --redefine-sym _binary____fpga_fpga_bit_start=_binary_fpga_bit_start --redefine-sym _binary____fpga_fpga_bit_end=_binary_fpga_bit_end --prefix-sections=fpga_bit $^ $@
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$(OBJDIR)/osimage.elf: $(MAIN_OBJ) $(ARMLIB)/libgcc.a
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$(OBJDIR)/fullimage.elf: $(OBJDIR)/fpga.o $(THUMBOBJ) $(ARMOBJ) $(ARMLIB)/libgcc.a
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$(LD) -g -Tldscript -Map=$(patsubst %.elf,%.map,$@) -o $@ $^
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$(OBJDIR)/fpgaimage.elf: $(OBJDIR)/fullimage.elf
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$(OBJCOPY) -F elf32-littlearm --only-section fpgaimage $^ $@
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$(OBJDIR)/osimage.elf: $(OBJDIR)/fullimage.elf
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$(OBJCOPY) -F elf32-littlearm --remove-section fpgaimage $^ $@
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clean:
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$(DELETE) $(OBJDIR)$(PATHSEP)*.o
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$(DELETE) $(OBJDIR)$(PATHSEP)*.elf
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10541
armsrc/fpgaimg.c
10541
armsrc/fpgaimg.c
File diff suppressed because it is too large
Load diff
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@ -135,17 +135,10 @@ void FpgaSetupSscDma(BYTE *buf, int len)
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PDC_CONTROL(SSC_BASE) = PDC_RX_ENABLE;
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}
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//-----------------------------------------------------------------------------
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// Download the FPGA image stored in flash (slave serial).
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//-----------------------------------------------------------------------------
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void FpgaDownloadAndGo(void)
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// Download the fpga image starting at FpgaImage and with length FpgaImageLen DWORDs (e.g. 4 bytes)
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// If bytereversal is set: reverse the byte order in each 4-byte word
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static void DownloadFPGA(const DWORD *FpgaImage, DWORD FpgaImageLen, int bytereversal)
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{
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// FPGA image lives in FLASH at base address 0x2000
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// The current board design can not accomodate anything bigger than a XC2S30
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// FPGA and the config file size is fixed at 336,768 bits = 10,524 DWORDs
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const DWORD *FpgaImage=((DWORD *)0x2000);
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const DWORD FpgaImageLen=10524;
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int i, j;
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PIO_OUTPUT_ENABLE = (1 << GPIO_FPGA_ON);
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@ -170,21 +163,128 @@ void FpgaDownloadAndGo(void)
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for(i = 0; i < FpgaImageLen; i++) {
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DWORD v = FpgaImage[i];
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for(j = 0; j < 32; j++) {
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if(v & 0x80000000) {
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HIGH(GPIO_FPGA_DIN);
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} else {
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LOW(GPIO_FPGA_DIN);
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}
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HIGH(GPIO_FPGA_CCLK);
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LOW(GPIO_FPGA_CCLK);
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v <<= 1;
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unsigned char w;
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for(j = 0; j < 4; j++) {
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if(!bytereversal)
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w = v >>(j*8);
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else
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w = v >>((3-j)*8);
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#define SEND_BIT(x) { if(w & (1<<x) ) HIGH(GPIO_FPGA_DIN); else LOW(GPIO_FPGA_DIN); HIGH(GPIO_FPGA_CCLK); LOW(GPIO_FPGA_CCLK); }
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SEND_BIT(7);
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SEND_BIT(6);
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SEND_BIT(5);
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SEND_BIT(4);
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SEND_BIT(3);
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SEND_BIT(2);
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SEND_BIT(1);
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SEND_BIT(0);
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}
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}
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LED_D_OFF();
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}
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static char *bitparse_headers_start;
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static char *bitparse_bitstream_end;
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static int bitparse_initialized;
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/* Simple Xilinx .bit parser. The file starts with the fixed opaque byte sequence
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* 00 09 0f f0 0f f0 0f f0 0f f0 00 00 01
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* After that the format is 1 byte section type (ASCII character), 2 byte length
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* (big endian), <length> bytes content. Except for section 'e' which has 4 bytes
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* length.
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*/
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static const char _bitparse_fixed_header[] = {0x00, 0x09, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x00, 0x00, 0x01};
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static int bitparse_init(void * start_address, void *end_address)
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{
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bitparse_initialized = 0;
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if(memcmp(_bitparse_fixed_header, start_address, sizeof(_bitparse_fixed_header)) != 0) {
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return 0; /* Not matched */
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} else {
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bitparse_headers_start= ((char*)start_address) + sizeof(_bitparse_fixed_header);
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bitparse_bitstream_end= (char*)end_address;
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bitparse_initialized = 1;
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return 1;
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}
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}
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int bitparse_find_section(char section_name, void **section_start, unsigned int *section_length)
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{
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char *pos = bitparse_headers_start;
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int result = 0;
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if(!bitparse_initialized) return 0;
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while(pos < bitparse_bitstream_end) {
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char current_name = *pos++;
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unsigned int current_length = 0;
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if(current_name < 'a' || current_name > 'e') {
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/* Strange section name, abort */
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break;
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}
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current_length = 0;
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switch(current_name) {
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case 'e':
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/* Four byte length field */
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current_length += (*pos++) << 24;
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current_length += (*pos++) << 16;
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default: /* Fall through, two byte length field */
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current_length += (*pos++) << 8;
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current_length += (*pos++) << 0;
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}
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if(current_name != 'e' && current_length > 255) {
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/* Maybe a parse error */
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break;
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}
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if(current_name == section_name) {
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/* Found it */
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*section_start = pos;
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*section_length = current_length;
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result = 1;
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break;
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}
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pos += current_length; /* Skip section */
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}
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return result;
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}
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//-----------------------------------------------------------------------------
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// Find out which FPGA image format is stored in flash, then call DownloadFPGA
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// with the right parameters to download the image
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//-----------------------------------------------------------------------------
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extern char _binary_fpga_bit_start, _binary_fpga_bit_end;
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void FpgaDownloadAndGo(void)
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{
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/* Check for the new flash image format: Should have the .bit file at &_binary_fpga_bit_start
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*/
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if(bitparse_init(&_binary_fpga_bit_start, &_binary_fpga_bit_end)) {
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/* Successfully initialized the .bit parser. Find the 'e' section and
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* send its contents to the FPGA.
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*/
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void *bitstream_start;
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unsigned int bitstream_length;
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if(bitparse_find_section('e', &bitstream_start, &bitstream_length)) {
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DownloadFPGA((DWORD *)bitstream_start, bitstream_length/4, 0);
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return; /* All done */
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}
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}
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/* Fallback for the old flash image format: Check for the magic marker 0xFFFFFFFF
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* 0xAA995566 at address 0x2000. This is raw bitstream with a size of 336,768 bits
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* = 10,524 DWORDs, stored as DWORDS e.g. little-endian in memory, but each DWORD
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* is still to be transmitted in MSBit first order. Set the invert flag to indicate
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* that the DownloadFPGA function should invert every 4 byte sequence when doing
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* the bytewise download.
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*/
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if( *(DWORD*)0x2000 == 0xFFFFFFFF && *(DWORD*)0x2004 == 0xAA995566 )
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DownloadFPGA((DWORD *)0x2000, 10524, 1);
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}
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//-----------------------------------------------------------------------------
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// Send a 16 bit command/data pair to the FPGA.
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// The bit format is: C3 C2 C1 C0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
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@ -3,7 +3,10 @@ INCLUDE ../common/ldscript.common
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ENTRY(Vector)
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SECTIONS
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{
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.start : { obj/start.o(.text) } >osimage
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fpgaimage : {
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*(fpga_bit.data)
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} >fpgaimage
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.start : { *(.startos) } >osimage
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.text : {
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*(.text)
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*(.text.*)
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@ -1,15 +0,0 @@
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INCLUDE ../common/ldscript.common
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SECTIONS
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{
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fpgaimage : {
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obj/fpgaimg.o(.text) *(.text)
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*(.rodata)
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*(.glue_7)
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*(.glue_7t)
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} >fpgaimage
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.data : { *(.data) } >ram
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__bss_start__ = .;
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.bss : { *(.bss) } >ram
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__bss_end__ = .;
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}
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@ -1,14 +0,0 @@
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SECTIONS
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{
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. = 0x00002000;
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.fpga : { obj/fpgaimg.o(.rodata) }
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. = 0x00010000;
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.start : { obj/start.o(.text) }
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.text : { *(.text) }
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.rodata : { *(.rodata) }
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. = 0x00200000;
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.data : { *(.data) }
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__bss_start__ = .;
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.bss : { *(.bss) }
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__bss_end__ = .;
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}
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@ -6,7 +6,7 @@
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#include <proxmark3.h>
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#include "apps.h"
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void Vector(void)
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void __attribute__((section(".startos"))) Vector(void)
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{
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AppMain();
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}
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