mirror of
https://github.com/Proxmark/proxmark3.git
synced 2025-08-20 21:33:19 -07:00
add: hw ver: show FPGA versions for both HF and LF FPGA configs
add: hw ver: show used and free flash memory chg: prepare fpgaloader for compressed FPGA configs
This commit is contained in:
pwpiwi
parent
96c4f5517e
commit
e61530408c
19 changed files with 5137 additions and 134 deletions
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@ -14,6 +14,19 @@
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#include "util.h"
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#include "string.h"
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// remember which version of the bitstream we have already downloaded to the FPGA
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static int downloaded_bitstream = FPGA_BITSTREAM_ERR;
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// this is where the bitstreams are located in memory:
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extern uint8_t _binary_fpga_lf_bit_start, _binary_fpga_lf_bit_end;
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extern uint8_t _binary_fpga_hf_bit_start, _binary_fpga_hf_bit_end;
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static uint8_t *fpga_image_ptr = NULL;
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static const uint8_t _bitparse_fixed_header[] = {0x00, 0x09, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x00, 0x00, 0x01};
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static const uint8_t _gzip_header[] = {0x1f, 0x8b, 0x08}; // including compression method 0x08 (deflate)
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#define GZIP_HEADER_SIZE sizeof(_gzip_header)
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#define FPGA_BITSTREAM_FIXED_HEADER_SIZE sizeof(_bitparse_fixed_header)
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//-----------------------------------------------------------------------------
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// Set up the Serial Peripheral Interface as master
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// Used to write the FPGA config word
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@ -150,6 +163,19 @@ bool FpgaSetupSscDma(uint8_t *buf, int len)
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return true;
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}
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void reset_fpga_stream(uint8_t *image_start)
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{
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fpga_image_ptr = image_start;
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}
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uint8_t get_from_fpga_stream(void)
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{
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return *fpga_image_ptr++;
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}
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static void DownloadFPGA_byte(unsigned char w)
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{
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#define SEND_BIT(x) { if(w & (1<<x) ) HIGH(GPIO_FPGA_DIN); else LOW(GPIO_FPGA_DIN); HIGH(GPIO_FPGA_CCLK); LOW(GPIO_FPGA_CCLK); }
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@ -163,9 +189,8 @@ static void DownloadFPGA_byte(unsigned char w)
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SEND_BIT(0);
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}
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// Download the fpga image starting at FpgaImage and with length FpgaImageLen bytes
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// If bytereversal is set: reverse the byte order in each 4-byte word
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static void DownloadFPGA(const char *FpgaImage, int FpgaImageLen, int bytereversal)
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// Download the fpga image starting at current stream position with length FpgaImageLen bytes
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static void DownloadFPGA(int FpgaImageLen)
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{
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int i=0;
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@ -218,21 +243,8 @@ static void DownloadFPGA(const char *FpgaImage, int FpgaImageLen, int byterevers
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return;
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}
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if(bytereversal) {
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/* This is only supported for uint32_t aligned images */
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if( ((int)FpgaImage % sizeof(uint32_t)) == 0 ) {
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i=0;
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while(FpgaImageLen-->0)
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DownloadFPGA_byte(FpgaImage[(i++)^0x3]);
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/* Explanation of the magic in the above line:
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* i^0x3 inverts the lower two bits of the integer i, counting backwards
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* for each 4 byte increment. The generated sequence of (i++)^3 is
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* 3 2 1 0 7 6 5 4 11 10 9 8 15 14 13 12 etc. pp.
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*/
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}
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} else {
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while(FpgaImageLen-->0)
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DownloadFPGA_byte(*FpgaImage++);
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while(FpgaImageLen-->0) {
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DownloadFPGA_byte(get_from_fpga_stream());
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}
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// continue to clock FPGA until ready signal goes high
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@ -250,39 +262,21 @@ static void DownloadFPGA(const char *FpgaImage, int FpgaImageLen, int byterevers
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LED_D_OFF();
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}
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static char *bitparse_headers_start;
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static char *bitparse_bitstream_end;
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static int bitparse_initialized = 0;
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/* Simple Xilinx .bit parser. The file starts with the fixed opaque byte sequence
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* 00 09 0f f0 0f f0 0f f0 0f f0 00 00 01
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* After that the format is 1 byte section type (ASCII character), 2 byte length
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* (big endian), <length> bytes content. Except for section 'e' which has 4 bytes
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* length.
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*/
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static const char _bitparse_fixed_header[] = {0x00, 0x09, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x00, 0x00, 0x01};
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static int bitparse_init(void * start_address, void *end_address)
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int bitparse_find_section(char section_name, unsigned int *section_length)
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{
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bitparse_initialized = 0;
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if(memcmp(_bitparse_fixed_header, start_address, sizeof(_bitparse_fixed_header)) != 0) {
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return 0; /* Not matched */
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} else {
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bitparse_headers_start= ((char*)start_address) + sizeof(_bitparse_fixed_header);
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bitparse_bitstream_end= (char*)end_address;
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bitparse_initialized = 1;
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return 1;
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}
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}
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int bitparse_find_section(char section_name, char **section_start, unsigned int *section_length)
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{
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char *pos = bitparse_headers_start;
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int result = 0;
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if(!bitparse_initialized) return 0;
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while(pos < bitparse_bitstream_end) {
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char current_name = *pos++;
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#define MAX_FPGA_BIT_STREAM_HEADER_SEARCH 100 // maximum number of bytes to search for the requested section
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uint16_t numbytes = 0;
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while(numbytes < MAX_FPGA_BIT_STREAM_HEADER_SEARCH) {
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char current_name = get_from_fpga_stream();
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numbytes++;
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unsigned int current_length = 0;
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if(current_name < 'a' || current_name > 'e') {
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/* Strange section name, abort */
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@ -292,11 +286,13 @@ int bitparse_find_section(char section_name, char **section_start, unsigned int
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switch(current_name) {
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case 'e':
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/* Four byte length field */
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current_length += (*pos++) << 24;
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current_length += (*pos++) << 16;
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current_length += get_from_fpga_stream() << 24;
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current_length += get_from_fpga_stream() << 16;
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numbytes += 2;
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default: /* Fall through, two byte length field */
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current_length += (*pos++) << 8;
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current_length += (*pos++) << 0;
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current_length += get_from_fpga_stream() << 8;
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current_length += get_from_fpga_stream() << 0;
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numbytes += 2;
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}
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if(current_name != 'e' && current_length > 255) {
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@ -306,108 +302,136 @@ int bitparse_find_section(char section_name, char **section_start, unsigned int
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if(current_name == section_name) {
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/* Found it */
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*section_start = pos;
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*section_length = current_length;
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result = 1;
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break;
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}
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pos += current_length; /* Skip section */
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for (uint16_t i = 0; i < current_length && numbytes < MAX_FPGA_BIT_STREAM_HEADER_SEARCH; i++) {
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get_from_fpga_stream();
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numbytes++;
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}
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}
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return result;
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}
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void init_fpga_inflate(void)
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{
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// initialize zlib for inflate
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}
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//-----------------------------------------------------------------------------
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// Find out which FPGA image format is stored in flash, then call DownloadFPGA
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// with the right parameters to download the image
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//-----------------------------------------------------------------------------
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extern char _binary_fpga_lf_bit_start, _binary_fpga_lf_bit_end;
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extern char _binary_fpga_hf_bit_start, _binary_fpga_hf_bit_end;
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void FpgaDownloadAndGo(int bitstream_version)
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{
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void *bit_start;
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void *bit_end;
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uint8_t header[FPGA_BITSTREAM_FIXED_HEADER_SIZE];
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// check whether or not the bitstream is already loaded
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if (FpgaGatherBitstreamVersion() == bitstream_version)
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if (downloaded_bitstream == bitstream_version)
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return;
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if (bitstream_version == FPGA_BITSTREAM_LF) {
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bit_start = &_binary_fpga_lf_bit_start;
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bit_end = &_binary_fpga_lf_bit_end;
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reset_fpga_stream(&_binary_fpga_lf_bit_start);
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} else if (bitstream_version == FPGA_BITSTREAM_HF) {
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bit_start = &_binary_fpga_hf_bit_start;
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bit_end = &_binary_fpga_hf_bit_end;
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reset_fpga_stream(&_binary_fpga_hf_bit_start);
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} else
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return;
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/* Check for the new flash image format: Should have the .bit file at &_binary_fpga_bit_start
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*/
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if(bitparse_init(bit_start, bit_end)) {
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/* Successfully initialized the .bit parser. Find the 'e' section and
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* send its contents to the FPGA.
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*/
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char *bitstream_start;
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unsigned int bitstream_length;
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if(bitparse_find_section('e', &bitstream_start, &bitstream_length)) {
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DownloadFPGA(bitstream_start, bitstream_length, 0);
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uint16_t i = 0;
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for (; i < GZIP_HEADER_SIZE; i++) {
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header[i] = get_from_fpga_stream();
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}
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// Check for compressed new flash image format (starts with gzip header)
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if(memcmp(_gzip_header, header, GZIP_HEADER_SIZE) == 0) {
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init_fpga_inflate();
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}
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for (; i < FPGA_BITSTREAM_FIXED_HEADER_SIZE; i++) {
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header[i] = get_from_fpga_stream();
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}
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// Check for the new flash image format: Should have the .bit file at &_binary_fpga_bit_start
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if(memcmp(_bitparse_fixed_header, header, FPGA_BITSTREAM_FIXED_HEADER_SIZE) == 0) {
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unsigned int bitstream_length;
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if(bitparse_find_section('e', &bitstream_length)) {
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DownloadFPGA(bitstream_length);
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downloaded_bitstream = bitstream_version;
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return; /* All done */
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}
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}
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/* Fallback for the old flash image format: Check for the magic marker 0xFFFFFFFF
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* 0xAA995566 at address 0x102000. This is raw bitstream with a size of 336,768 bits
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* = 10,524 uint32_t, stored as uint32_t e.g. little-endian in memory, but each DWORD
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* is still to be transmitted in MSBit first order. Set the invert flag to indicate
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* that the DownloadFPGA function should invert every 4 byte sequence when doing
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* the bytewise download.
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*/
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if( *(uint32_t*)0x102000 == 0xFFFFFFFF && *(uint32_t*)0x102004 == 0xAA995566 )
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DownloadFPGA((char*)0x102000, 10524*4, 1);
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}
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}
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int FpgaGatherBitstreamVersion()
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{
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char temp[256];
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FpgaGatherVersion(temp, sizeof (temp));
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if (!memcmp("LF", temp, 2))
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return FPGA_BITSTREAM_LF;
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else if (!memcmp("HF", temp, 2))
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return FPGA_BITSTREAM_HF;
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return FPGA_BITSTREAM_ERR;
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return downloaded_bitstream;
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}
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void FpgaGatherVersion(char *dst, int len)
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void FpgaGatherVersion(int bitstream_version, char *dst, int len)
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{
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char *fpga_info;
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unsigned int fpga_info_len;
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dst[0] = 0;
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if(!bitparse_find_section('e', &fpga_info, &fpga_info_len)) {
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strncat(dst, "FPGA image: legacy image without version information", len-1);
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} else {
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/* USB packets only have 48 bytes data payload, so be terse */
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if(bitparse_find_section('a', &fpga_info, &fpga_info_len) && fpga_info[fpga_info_len-1] == 0 ) {
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if (!memcmp("fpga_lf", fpga_info, 7))
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strncat(dst, "LF ", len-1);
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else if (!memcmp("fpga_hf", fpga_info, 7))
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strncat(dst, "HF ", len-1);
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char tempstr[40];
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dst[0] = '\0';
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if (bitstream_version == FPGA_BITSTREAM_LF) {
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reset_fpga_stream(&_binary_fpga_lf_bit_start);
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} else if (bitstream_version == FPGA_BITSTREAM_HF) {
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reset_fpga_stream(&_binary_fpga_hf_bit_start);
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} else
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return;
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for (uint16_t i = 0; i < FPGA_BITSTREAM_FIXED_HEADER_SIZE; i++) {
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get_from_fpga_stream();
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}
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if(bitparse_find_section('a', &fpga_info_len)) {
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for (uint16_t i = 0; i < fpga_info_len; i++) {
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char c = (char)get_from_fpga_stream();
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if (i < sizeof(tempstr)) {
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tempstr[i] = c;
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}
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}
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strncat(dst, "FPGA image built", len-1);
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#if 0
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if(bitparse_find_section('b', &fpga_info, &fpga_info_len) && fpga_info[fpga_info_len-1] == 0 ) {
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strncat(dst, " for ", len-1);
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strncat(dst, fpga_info, len-1);
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if (!memcmp("fpga_lf", tempstr, 7))
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strncat(dst, "LF ", len-1);
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else if (!memcmp("fpga_hf", tempstr, 7))
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strncat(dst, "HF ", len-1);
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}
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strncat(dst, "FPGA image built", len-1);
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if(bitparse_find_section('b', &fpga_info_len)) {
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strncat(dst, " for ", len-1);
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for (uint16_t i = 0; i < fpga_info_len; i++) {
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char c = (char)get_from_fpga_stream();
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if (i < sizeof(tempstr)) {
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tempstr[i] = c;
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}
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}
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#endif
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if(bitparse_find_section('c', &fpga_info, &fpga_info_len) && fpga_info[fpga_info_len-1] == 0 ) {
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strncat(dst, " on ", len-1);
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strncat(dst, fpga_info, len-1);
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strncat(dst, tempstr, len-1);
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}
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if(bitparse_find_section('c', &fpga_info_len)) {
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strncat(dst, " on ", len-1);
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for (uint16_t i = 0; i < fpga_info_len; i++) {
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char c = (char)get_from_fpga_stream();
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if (i < sizeof(tempstr)) {
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tempstr[i] = c;
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}
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}
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if(bitparse_find_section('d', &fpga_info, &fpga_info_len) && fpga_info[fpga_info_len-1] == 0 ) {
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strncat(dst, " at ", len-1);
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strncat(dst, fpga_info, len-1);
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strncat(dst, tempstr, len-1);
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}
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if(bitparse_find_section('d', &fpga_info_len)) {
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strncat(dst, " at ", len-1);
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for (uint16_t i = 0; i < fpga_info_len; i++) {
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char c = (char)get_from_fpga_stream();
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if (i < sizeof(tempstr)) {
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tempstr[i] = c;
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}
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}
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strncat(dst, tempstr, len-1);
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}
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}
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