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Add @Iceman1001 s cotag read
also needed to include some of icemans timer additions.
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15 changed files with 468 additions and 22 deletions
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@ -1672,3 +1672,62 @@ void EM4xWriteWord(uint32_t Data, uint8_t Address, uint32_t Pwd, uint8_t PwdMode
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
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LED_D_OFF();
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}
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/*
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Reading a COTAG.
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COTAG needs the reader to send a startsequence and the card has an extreme slow datarate.
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because of this, we can "sample" the data signal but we interpreate it to Manchester direct.
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READER START SEQUENCE:
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burst 800 us, gap 2.2 msecs
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burst 3.6 msecs gap 2.2 msecs
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burst 800 us gap 2.2 msecs
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pulse 3.6 msecs
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This triggers a COTAG tag to response
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*/
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void Cotag(uint32_t arg0) {
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#define OFF { FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); WaitUS(2035); }
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#define ON(x) { FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD); WaitUS((x)); }
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uint8_t rawsignal = arg0 & 0xF;
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LED_A_ON();
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// Switching to LF image on FPGA. This might empty BigBuff
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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//clear buffer now so it does not interfere with timing later
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BigBuf_Clear_ext(false);
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// Set up FPGA, 132kHz to power up the tag
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 89);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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// Connect the A/D to the peak-detected low-frequency path.
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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// Now set up the SSC to get the ADC samples that are now streaming at us.
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FpgaSetupSsc();
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// start clock - 1.5ticks is 1us
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StartTicks();
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//send COTAG start pulse
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ON(740) OFF
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ON(3330) OFF
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ON(740) OFF
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ON(1000)
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switch(rawsignal) {
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case 0: doCotagAcquisition(50000); break;
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case 1: doCotagAcquisitionManchester(); break;
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case 2: DoAcquisition_config(TRUE); break;
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}
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// Turn the field off
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
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cmd_send(CMD_ACK,0,0,0,0,0);
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LED_A_OFF();
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}
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