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https://github.com/Proxmark/proxmark3.git
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Add basic communication shell for Legic RF in reader mode. Needs the new receive function of hi_read_tx.
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5 changed files with 152 additions and 0 deletions
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@ -553,6 +553,10 @@ void UsbPacketReceived(BYTE *packet, int len)
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ReaderIso15693(c->ext1);
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break;
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case CMD_READER_LEGIC_RF:
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LegicRfReader();
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break;
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case CMD_SIMTAG_ISO_15693:
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SimTagIso15693(c->ext1);
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break;
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138
armsrc/legicrf.c
138
armsrc/legicrf.c
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@ -79,6 +79,108 @@ static void frame_send_tag(uint16_t response, int bits)
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#endif
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}
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/* Send a frame in reader mode, the FPGA must have been set up by
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* LegicRfReader
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*/
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static void frame_send_rwd(uint16_t data, int bits)
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{
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/* Start clock */
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timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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while(timer->TC_CV > 1) ; /* Wait till the clock has reset */
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int i;
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for(i=0; i<bits; i++) {
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int starttime = timer->TC_CV;
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int pause_end = starttime + RWD_TIME_PAUSE, bit_end;
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int bit = data & 1;
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data = data >> 1;
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if(bit) {
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bit_end = starttime + RWD_TIME_1;
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} else {
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bit_end = starttime + RWD_TIME_0;
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}
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/* RWD_TIME_PAUSE time off, then some time on, so that the complete bit time is
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* RWD_TIME_x, where x is the bit to be transmitted */
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AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
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while(timer->TC_CV < pause_end) ;
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AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT;
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while(timer->TC_CV < bit_end) ;
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}
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{
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/* One final pause to mark the end of the frame */
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int pause_end = timer->TC_CV + RWD_TIME_PAUSE;
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AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
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while(timer->TC_CV < pause_end) ;
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AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT;
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}
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/* Reset the timer, to measure time until the start of the tag frame */
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timer->TC_CCR = AT91C_TC_SWTRG;
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}
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/* Receive a frame from the card in reader emulation mode, the FPGA and
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* timer must have been set up by LegicRfReader and frame_send_rwd.
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*
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* The LEGIC RF protocol from card to reader does not include explicit
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* frame start/stop information or length information. The reader must
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* know beforehand how many bits it wants to receive. (Notably: a card
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* sending a stream of 0-bits is indistinguishable from no card present.)
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*
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* Receive methodology: There is a fancy correlator in hi_read_rx_xcorr, but
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* I'm not smart enough to use it. Instead I have patched hi_read_tx to output
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* the ADC signal with hysteresis on SSP_DIN. Bit-bang that signal and look
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* for edges. Count the edges in each bit interval. If they are approximately
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* 0 this was a 0-bit, if they are approximately equal to the number of edges
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* expected for a 212kHz subcarrier, this was a 1-bit. For timing we use the
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* timer that's still running from frame_send_rwd in order to get a synchronization
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* with the frame that we just sent.
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*
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* FIXME: Because we're relying on the hysteresis to just do the right thing
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* the range is severely reduced (and you'll probably also need a good antenna).
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* So this should be fixed some time in the future for a proper receiver.
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*/
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static void frame_receive_rwd(struct legic_frame * const f, int bits)
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{
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uint16_t the_bit = 1; /* Use a bitmask to save on shifts */
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uint16_t data=0;
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int i, old_level=0, edges=0;
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int next_bit_at = TAG_TIME_WAIT;
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if(bits > 16)
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bits = 16;
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AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN;
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN;
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while(timer->TC_CV < next_bit_at) ;
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next_bit_at += TAG_TIME_BIT;
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for(i=0; i<bits; i++) {
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edges = 0;
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while(timer->TC_CV < next_bit_at) {
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int level = (AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN);
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if(level != old_level)
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edges++;
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old_level = level;
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}
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next_bit_at += TAG_TIME_BIT;
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if(edges > 20 && edges < 60) { /* expected are 42 edges */
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data |= the_bit;
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}
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the_bit <<= 1;
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}
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f->data = data;
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f->bits = bits;
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}
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/* Figure out a response to a frame in tag mode */
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static void frame_respond_tag(struct legic_frame const * const f)
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{
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@ -220,3 +322,39 @@ void LegicRfSimulate(void)
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WDT_HIT();
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}
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}
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void LegicRfReader(void)
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{
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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FpgaSetupSsc();
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX);
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/* Bitbang the transmitter */
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AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
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AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
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setup_timer();
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while(!BUTTON_PRESS()) {
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/* Switch on carrier and let the tag charge for 1ms */
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AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT;
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SpinDelay(1);
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LED_A_ON();
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frame_send_rwd(queries[0].data, queries[0].bits);
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LED_A_OFF();
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frame_clean(¤t_frame);
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LED_B_ON();
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frame_receive_rwd(¤t_frame, responses[0].bits);
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LED_B_OFF();
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/* Switch off carrier, make sure tag is reset */
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AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
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SpinDelay(10);
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WDT_HIT();
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}
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}
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@ -8,5 +8,6 @@
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#define LEGICRF_H_
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extern void LegicRfSimulate(void);
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extern void LegicRfReader(void);
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#endif /* LEGICRF_H_ */
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@ -70,6 +70,7 @@ typedef struct {
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#define CMD_READER_ISO_14443a 0x0385
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#define CMD_SIMULATE_MIFARE_CARD 0x0386
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#define CMD_SIMULATE_TAG_LEGIC_RF 0x387
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#define CMD_READER_LEGIC_RF 0x388
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// For measurements of the antenna tuning
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#define CMD_MEASURE_ANTENNA_TUNING 0x0400
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@ -214,6 +214,13 @@ static void CmdLegicRfSim(char *str)
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SendCommand(&c, FALSE);
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}
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static void CmdLegicRfRead(char *str)
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{
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UsbCommand c;
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c.cmd = CMD_READER_LEGIC_RF;
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SendCommand(&c, FALSE);
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}
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static void CmdFPGAOff(char *str) // ## FPGA Control
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{
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UsbCommand c;
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@ -2908,6 +2915,7 @@ static struct {
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{"lcd", CmdLcd, 0, "<HEX command> <count> -- Send command/data to LCD"},
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{"lcdreset", CmdLcdReset, 0, "Hardware reset LCD"},
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{"legicrfsim", CmdLegicRfSim, 0, "Start the LEGIC RF tag simulator"},
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{"legicrfread", CmdLegicRfRead, 0, "Start the LEGIC RF reader"},
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{"load", CmdLoad, 1, "<filename> -- Load trace (to graph window"},
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{"locomread", CmdLoCommandRead, 0, "<off period> <'0' period> <'1' period> <command> ['h'] -- Modulate LF reader field to send command before read (all periods in microseconds) (option 'h' for 134)"},
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{"loread", CmdLoread, 0, "['h'] -- Read 125/134 kHz LF ID-only tag (option 'h' for 134)"},
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