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Fix 15 snoop (#752)
* fixing hf 15: implement hf 15 snoop * rename hf 15 record to hf 15 snoop * speedup sampling / decoding: * new FPGA mode FPGA_HF_READER_RX_XCORR_AMPLITUDE implements amplitude(ci, cq) on FPGA * inlining the decoders in iso15693.c * inlining memcpy/memset in LogTrace() * giving up the moving correlator for SOF in Handle15693SamplesFromTag * decode more of EOF in Handle15693SamplesFromTag() * some refactoring
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17 changed files with 715 additions and 574 deletions
BIN
fpga/fpga_hf.bit
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fpga/fpga_hf.bit
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@ -75,6 +75,8 @@ wire hi_read_rx_xcorr_848 = conf_word[0];
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wire hi_read_rx_xcorr_snoop = conf_word[1];
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// divide subcarrier frequency by 4
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wire hi_read_rx_xcorr_quarter = conf_word[2];
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// send amplitude only instead of ci/cq pair
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wire hi_read_rx_xcorr_amplitude = conf_word[3];
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// For the high-frequency simulated tag: what kind of modulation to use.
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wire [2:0] hi_simulate_mod_type = conf_word[2:0];
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@ -102,7 +104,7 @@ hi_read_rx_xcorr hrxc(
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hrxc_ssp_frame, hrxc_ssp_din, ssp_dout, hrxc_ssp_clk,
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cross_hi, cross_lo,
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hrxc_dbg,
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hi_read_rx_xcorr_848, hi_read_rx_xcorr_snoop, hi_read_rx_xcorr_quarter
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hi_read_rx_xcorr_848, hi_read_rx_xcorr_snoop, hi_read_rx_xcorr_quarter, hi_read_rx_xcorr_amplitude
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);
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hi_simulate hs(
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@ -10,7 +10,7 @@ module hi_read_rx_xcorr(
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ssp_frame, ssp_din, ssp_dout, ssp_clk,
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cross_hi, cross_lo,
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dbg,
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xcorr_is_848, snoop, xcorr_quarter_freq
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xcorr_is_848, snoop, xcorr_quarter_freq, hi_read_rx_xcorr_amplitude
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);
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input pck0, ck_1356meg, ck_1356megb;
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output pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4;
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@ -20,7 +20,7 @@ module hi_read_rx_xcorr(
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output ssp_frame, ssp_din, ssp_clk;
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input cross_hi, cross_lo;
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output dbg;
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input xcorr_is_848, snoop, xcorr_quarter_freq;
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input xcorr_is_848, snoop, xcorr_quarter_freq, hi_read_rx_xcorr_amplitude;
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// Carrier is steady on through this, unless we're snooping.
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assign pwr_hi = ck_1356megb & (~snoop);
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@ -83,11 +83,46 @@ reg signed [13:0] corr_q_accum;
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// we will report maximum 8 significant bits
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reg signed [7:0] corr_i_out;
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reg signed [7:0] corr_q_out;
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// clock and frame signal for communication to ARM
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reg ssp_clk;
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reg ssp_frame;
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// the amplitude of the subcarrier is sqrt(ci^2 + cq^2).
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// approximate by amplitude = max(|ci|,|cq|) + 1/2*min(|ci|,|cq|)
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reg [13:0] corr_amplitude, abs_ci, abs_cq, max_ci_cq, min_ci_cq;
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always @(corr_i_accum or corr_q_accum)
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begin
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if (corr_i_accum[13] == 1'b0)
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abs_ci <= corr_i_accum;
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else
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abs_ci <= -corr_i_accum;
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if (corr_q_accum[13] == 1'b0)
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abs_cq <= corr_q_accum;
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else
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abs_cq <= -corr_q_accum;
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if (abs_ci > abs_cq)
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begin
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max_ci_cq <= abs_ci;
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min_ci_cq <= abs_cq;
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end
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else
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begin
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max_ci_cq <= abs_cq;
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min_ci_cq <= abs_ci;
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end
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corr_amplitude <= max_ci_cq + min_ci_cq/2;
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end
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// The subcarrier reference signals
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reg subcarrier_I;
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reg subcarrier_Q;
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@ -110,52 +145,75 @@ begin
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subcarrier_Q = ~(corr_i_cnt[4] ^ corr_i_cnt[3]);
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end
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end
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// ADC data appears on the rising edge, so sample it on the falling edge
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always @(negedge adc_clk)
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begin
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// These are the correlators: we correlate against in-phase and quadrature
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// versions of our reference signal, and keep the (signed) result to
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// send out later over the SSP.
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// versions of our reference signal, and keep the (signed) results or the
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// resulting amplitude to send out later over the SSP.
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if(corr_i_cnt == 6'd0)
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begin
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if(snoop)
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begin
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// Send 7 most significant bits of tag signal (signed), plus 1 bit reader signal
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if (corr_i_accum[13:11] == 3'b000 || corr_i_accum[13:11] == 3'b111)
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corr_i_out <= {corr_i_accum[11:5], after_hysteresis_prev_prev};
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else // truncate to maximum value
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if (corr_i_accum[13] == 1'b0)
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corr_i_out <= {7'b0111111, after_hysteresis_prev_prev};
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else
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corr_i_out <= {7'b1000000, after_hysteresis_prev_prev};
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if (corr_q_accum[13:11] == 3'b000 || corr_q_accum[13:11] == 3'b111)
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corr_q_out <= {corr_q_accum[11:5], after_hysteresis_prev};
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else // truncate to maximum value
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if (corr_q_accum[13] == 1'b0)
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corr_q_out <= {7'b0111111, after_hysteresis_prev};
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else
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corr_q_out <= {7'b1000000, after_hysteresis_prev};
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after_hysteresis_prev_prev <= after_hysteresis;
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if (hi_read_rx_xcorr_amplitude)
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begin
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// send amplitude plus 2 bits reader signal
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corr_i_out <= corr_amplitude[13:6];
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corr_q_out <= {corr_amplitude[5:0], after_hysteresis_prev_prev, after_hysteresis_prev};
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end
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else
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begin
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// Send 7 most significant bits of in phase tag signal (signed), plus 1 bit reader signal
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if (corr_i_accum[13:11] == 3'b000 || corr_i_accum[13:11] == 3'b111)
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corr_i_out <= {corr_i_accum[11:5], after_hysteresis_prev_prev};
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else // truncate to maximum value
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if (corr_i_accum[13] == 1'b0)
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corr_i_out <= {7'b0111111, after_hysteresis_prev_prev};
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else
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corr_i_out <= {7'b1000000, after_hysteresis_prev_prev};
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// Send 7 most significant bits of quadrature phase tag signal (signed), plus 1 bit reader signal
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if (corr_q_accum[13:11] == 3'b000 || corr_q_accum[13:11] == 3'b111)
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corr_q_out <= {corr_q_accum[11:5], after_hysteresis_prev};
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else // truncate to maximum value
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if (corr_q_accum[13] == 1'b0)
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corr_q_out <= {7'b0111111, after_hysteresis_prev};
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else
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corr_q_out <= {7'b1000000, after_hysteresis_prev};
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end
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end
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else
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begin
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// Send 8 bits of tag signal
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if (corr_i_accum[13:11] == 3'b000 || corr_i_accum[13:11] == 3'b111)
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corr_i_out <= corr_i_accum[11:4];
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else // truncate to maximum value
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if (corr_i_accum[13] == 1'b0)
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corr_i_out <= 8'b01111111;
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else
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corr_i_out <= 8'b10000000;
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if (corr_q_accum[13:11] == 3'b000 || corr_q_accum[13:11] == 3'b111)
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corr_q_out <= corr_q_accum[11:4];
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else // truncate to maximum value
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if (corr_q_accum[13] == 1'b0)
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corr_q_out <= 8'b01111111;
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else
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corr_q_out <= 8'b10000000;
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if (hi_read_rx_xcorr_amplitude)
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begin
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// send amplitude
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corr_i_out <= {2'b00, corr_amplitude[13:8]};
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corr_q_out <= corr_amplitude[7:0];
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end
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else
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begin
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// Send 8 bits of in phase tag signal
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if (corr_i_accum[13:11] == 3'b000 || corr_i_accum[13:11] == 3'b111)
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corr_i_out <= corr_i_accum[11:4];
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else // truncate to maximum value
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if (corr_i_accum[13] == 1'b0)
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corr_i_out <= 8'b01111111;
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else
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corr_i_out <= 8'b10000000;
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// Send 8 bits of quadrature phase tag signal
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if (corr_q_accum[13:11] == 3'b000 || corr_q_accum[13:11] == 3'b111)
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corr_q_out <= corr_q_accum[11:4];
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else // truncate to maximum value
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if (corr_q_accum[13] == 1'b0)
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corr_q_out <= 8'b01111111;
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else
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corr_q_out <= 8'b10000000;
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end
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end
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// for each Q/I pair report two reader signal samples when sniffing. Store the 1st.
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after_hysteresis_prev_prev <= after_hysteresis;
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// Initialize next correlation.
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// Both I and Q reference signals are high when corr_i_nct == 0. Therefore need to accumulate.
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corr_i_accum <= $signed({1'b0,adc_d});
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@ -172,16 +230,16 @@ begin
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corr_q_accum <= corr_q_accum + $signed({1'b0,adc_d});
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else
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corr_q_accum <= corr_q_accum - $signed({1'b0,adc_d});
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end
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// for each Q/I pair report two reader signal samples when sniffing
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// for each Q/I pair report two reader signal samples when sniffing. Store the 2nd.
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if(corr_i_cnt == 6'd32)
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after_hysteresis_prev <= after_hysteresis;
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// Then the result from last time is serialized and send out to the ARM.
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// We get one report each cycle, and each report is 16 bits, so the
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// ssp_clk should be the adc_clk divided by 64/16 = 4.
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// ssp_clk should be the adc_clk divided by 64/16 = 4.
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// ssp_clk frequency = 13,56MHz / 4 = 3.39MHz
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if(corr_i_cnt[1:0] == 2'b10)
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ssp_clk <= 1'b0;
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