mirror of
https://github.com/Proxmark/proxmark3.git
synced 2025-08-20 13:23:25 -07:00
Merge branch 'master' into topaz. Update Changelog.
This commit is contained in:
pwpiwi
commit
d9cc4e1ae2
10 changed files with 490 additions and 29 deletions
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@ -987,6 +987,9 @@ void UsbPacketReceived(uint8_t *packet, int len)
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ReadPCF7931();
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cmd_send(CMD_ACK,0,0,0,0,0);
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break;
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case CMD_PCF7931_WRITE:
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WritePCF7931(c->d.asDwords[0],c->d.asDwords[1],c->d.asDwords[2],c->d.asDwords[3],c->d.asDwords[4],c->d.asDwords[5],c->d.asDwords[6], c->d.asDwords[9], c->d.asDwords[7]-128,c->d.asDwords[8]-128, c->arg[0], c->arg[1], c->arg[2]);
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break;
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case CMD_EM4X_READ_WORD:
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EM4xReadWord(c->arg[1], c->arg[2],c->d.asBytes[0]);
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break;
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@ -61,6 +61,7 @@ void AcquireRawAdcSamples125k(int divisor);
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void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,uint8_t *command);
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void ReadTItag(void);
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void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc);
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void AcquireTiType(void);
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void AcquireRawBitsTI(void);
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void SimulateTagLowFrequency(int period, int gap, int ledcontrol);
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@ -85,6 +86,11 @@ int DemodPCF7931(uint8_t **outBlocks);
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int IsBlock0PCF7931(uint8_t *Block);
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int IsBlock1PCF7931(uint8_t *Block);
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void ReadPCF7931();
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void SendCmdPCF7931(uint32_t * tab);
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bool AddBytePCF7931(uint8_t byte, uint32_t * tab, int32_t l, int32_t p);
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bool AddBitPCF7931(bool b, uint32_t * tab, int32_t l, int32_t p);
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bool AddPatternPCF7931(uint32_t a, uint32_t b, uint32_t c, uint32_t * tab);
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void WritePCF7931(uint8_t pass1, uint8_t pass2, uint8_t pass3, uint8_t pass4, uint8_t pass5, uint8_t pass6, uint8_t pass7, uint16_t init_delay, int32_t l, int32_t p, uint8_t address, uint8_t byte, uint8_t data);
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void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode);
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void EM4xWriteWord(uint32_t Data, uint8_t Address, uint32_t Pwd, uint8_t PwdMode);
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@ -2055,19 +2055,20 @@ void ReaderMifare(bool first_try)
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byte_t par_list[8] = {0x00};
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byte_t ks_list[8] = {0x00};
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#define PRNG_SEQUENCE_LENGTH (1 << 16);
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static uint32_t sync_time;
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static uint32_t sync_cycles;
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static int32_t sync_cycles;
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int catch_up_cycles = 0;
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int last_catch_up = 0;
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uint16_t elapsed_prng_sequences;
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uint16_t consecutive_resyncs = 0;
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int isOK = 0;
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if (first_try) {
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mf_nr_ar3 = 0;
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sync_time = GetCountSspClk() & 0xfffffff8;
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sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
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sync_cycles = PRNG_SEQUENCE_LENGTH; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the tag nonces).
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nt_attacked = 0;
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nt = 0;
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par[0] = 0;
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}
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else {
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@ -2082,8 +2083,17 @@ void ReaderMifare(bool first_try)
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LED_C_OFF();
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#define DARKSIDE_MAX_TRIES 32 // number of tries to sync on PRNG cycle. Then give up.
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uint16_t unsuccessfull_tries = 0;
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#define MAX_UNEXPECTED_RANDOM 4 // maximum number of unexpected (i.e. real) random numbers when trying to sync. Then give up.
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#define MAX_SYNC_TRIES 32
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#define NUM_DEBUG_INFOS 8 // per strategy
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#define MAX_STRATEGY 3
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uint16_t unexpected_random = 0;
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uint16_t sync_tries = 0;
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int16_t debug_info_nr = -1;
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uint16_t strategy = 0;
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int32_t debug_info[MAX_STRATEGY][NUM_DEBUG_INFOS];
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uint32_t select_time;
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uint32_t halt_time;
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for(uint16_t i = 0; TRUE; i++) {
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@ -2096,21 +2106,60 @@ void ReaderMifare(bool first_try)
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break;
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}
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if (strategy == 2) {
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// test with additional hlt command
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halt_time = 0;
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int len = mifare_sendcmd_short(NULL, false, 0x50, 0x00, receivedAnswer, receivedAnswerPar, &halt_time);
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if (len && MF_DBGLEVEL >= 3) {
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Dbprintf("Unexpected response of %d bytes to hlt command (additional debugging).", len);
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}
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}
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if (strategy == 3) {
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// test with FPGA power off/on
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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SpinDelay(200);
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iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
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SpinDelay(100);
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}
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if(!iso14443a_select_card(uid, NULL, &cuid)) {
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if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card");
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continue;
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}
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select_time = GetCountSspClk();
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sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles;
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catch_up_cycles = 0;
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elapsed_prng_sequences = 1;
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if (debug_info_nr == -1) {
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sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles;
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catch_up_cycles = 0;
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// if we missed the sync time already, advance to the next nonce repeat
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while(GetCountSspClk() > sync_time) {
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sync_time = (sync_time & 0xfffffff8) + sync_cycles;
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}
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// if we missed the sync time already, advance to the next nonce repeat
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while(GetCountSspClk() > sync_time) {
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elapsed_prng_sequences++;
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sync_time = (sync_time & 0xfffffff8) + sync_cycles;
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}
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// Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
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ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
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// Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
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ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
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} else {
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// collect some information on tag nonces for debugging:
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#define DEBUG_FIXED_SYNC_CYCLES PRNG_SEQUENCE_LENGTH
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if (strategy == 0) {
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// nonce distances at fixed time after card select:
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sync_time = select_time + DEBUG_FIXED_SYNC_CYCLES;
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} else if (strategy == 1) {
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// nonce distances at fixed time between authentications:
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sync_time = sync_time + DEBUG_FIXED_SYNC_CYCLES;
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} else if (strategy == 2) {
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// nonce distances at fixed time after halt:
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sync_time = halt_time + DEBUG_FIXED_SYNC_CYCLES;
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} else {
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// nonce_distances at fixed time after power on
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sync_time = DEBUG_FIXED_SYNC_CYCLES;
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}
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ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
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}
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// Receive the (4 Byte) "random" nonce
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if (!ReaderReceive(receivedAnswer, receivedAnswerPar)) {
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@ -2128,19 +2177,37 @@ void ReaderMifare(bool first_try)
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int nt_distance = dist_nt(previous_nt, nt);
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if (nt_distance == 0) {
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nt_attacked = nt;
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}
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else {
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} else {
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if (nt_distance == -99999) { // invalid nonce received
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unsuccessfull_tries++;
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if (!nt_attacked && unsuccessfull_tries > DARKSIDE_MAX_TRIES) {
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unexpected_random++;
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if (unexpected_random > MAX_UNEXPECTED_RANDOM) {
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isOK = -3; // Card has an unpredictable PRNG. Give up
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break;
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} else {
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continue; // continue trying...
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}
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}
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sync_cycles = (sync_cycles - nt_distance);
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if (MF_DBGLEVEL >= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i, nt_distance, sync_cycles);
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if (++sync_tries > MAX_SYNC_TRIES) {
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if (strategy > MAX_STRATEGY || MF_DBGLEVEL < 3) {
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isOK = -4; // Card's PRNG runs at an unexpected frequency or resets unexpectedly
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break;
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} else { // continue for a while, just to collect some debug info
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debug_info[strategy][debug_info_nr] = nt_distance;
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debug_info_nr++;
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if (debug_info_nr == NUM_DEBUG_INFOS) {
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strategy++;
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debug_info_nr = 0;
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}
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continue;
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}
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}
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sync_cycles = (sync_cycles - nt_distance/elapsed_prng_sequences);
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if (sync_cycles <= 0) {
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sync_cycles += PRNG_SEQUENCE_LENGTH;
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}
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if (MF_DBGLEVEL >= 3) {
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Dbprintf("calibrating in cycle %d. nt_distance=%d, elapsed_prng_sequences=%d, new sync_cycles: %d\n", i, nt_distance, elapsed_prng_sequences, sync_cycles);
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}
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continue;
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}
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}
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@ -2151,6 +2218,7 @@ void ReaderMifare(bool first_try)
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catch_up_cycles = 0;
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continue;
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}
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catch_up_cycles /= elapsed_prng_sequences;
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if (catch_up_cycles == last_catch_up) {
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consecutive_resyncs++;
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}
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@ -2164,6 +2232,9 @@ void ReaderMifare(bool first_try)
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else {
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sync_cycles = sync_cycles + catch_up_cycles;
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if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles);
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last_catch_up = 0;
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catch_up_cycles = 0;
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consecutive_resyncs = 0;
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}
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continue;
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}
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@ -2171,12 +2242,10 @@ void ReaderMifare(bool first_try)
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consecutive_resyncs = 0;
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// Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
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if (ReaderReceive(receivedAnswer, receivedAnswerPar))
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{
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if (ReaderReceive(receivedAnswer, receivedAnswerPar)) {
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catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
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if (nt_diff == 0)
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{
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if (nt_diff == 0) {
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par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
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}
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@ -2211,6 +2280,16 @@ void ReaderMifare(bool first_try)
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mf_nr_ar[3] &= 0x1F;
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if (isOK == -4) {
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if (MF_DBGLEVEL >= 3) {
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for (uint16_t i = 0; i <= MAX_STRATEGY; i++) {
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for(uint16_t j = 0; j < NUM_DEBUG_INFOS; j++) {
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Dbprintf("collected debug info[%d][%d] = %d", i, j, debug_info[i][j]);
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}
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}
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}
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}
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byte_t buf[28];
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memcpy(buf + 0, uid, 4);
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|
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275
armsrc/lfops.c
275
armsrc/lfops.c
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@ -16,8 +16,7 @@
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#include "string.h"
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#include "lfdemod.h"
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#include "lfsampling.h"
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#include "usb_cdc.h"
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#include "usb_cdc.h" //test
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/**
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* Function to do a modulation and then get samples.
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@ -214,6 +213,8 @@ void ReadTItag(void)
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}
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}
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void WriteTIbyte(uint8_t b)
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{
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int i = 0;
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@ -310,11 +311,16 @@ void AcquireTiType(void)
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}
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}
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// arguments: 64bit data split into 32bit idhi:idlo and optional 16bit crc
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// if crc provided, it will be written with the data verbatim (even if bogus)
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// if not provided a valid crc will be computed from the data and written.
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void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
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{
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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if(crc == 0) {
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crc = update_crc16(crc, (idlo)&0xff);
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@ -1705,6 +1711,8 @@ int DemodPCF7931(uint8_t **outBlocks) {
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if(num_blocks == 4) break;
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}
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memcpy(outBlocks, Blocks, 16*num_blocks);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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return num_blocks;
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}
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@ -1828,14 +1836,15 @@ void ReadPCF7931() {
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Dbprintf("Memory content:");
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Dbprintf("-----------------------------------------");
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for(i=0; i<max_blocks; i++) {
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if(Blocks[i][ALLOC]==1)
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if(Blocks[i][ALLOC]==1){
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Dbprintf("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
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Blocks[i][0], Blocks[i][1], Blocks[i][2], Blocks[i][3], Blocks[i][4], Blocks[i][5], Blocks[i][6], Blocks[i][7],
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Blocks[i][8], Blocks[i][9], Blocks[i][10], Blocks[i][11], Blocks[i][12], Blocks[i][13], Blocks[i][14], Blocks[i][15]);
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else
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}else
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Dbprintf("<missing block %d>", i);
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}
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Dbprintf("-----------------------------------------");
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return ;
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}
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@ -2058,3 +2067,261 @@ void EM4xWriteWord(uint32_t Data, uint8_t Address, uint32_t Pwd, uint8_t PwdMode
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
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LED_D_OFF();
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}
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#define T0_PCF 8 //period for the pcf7931 in us
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/* Write on a byte of a PCF7931 tag
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* @param address : address of the block to write
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@param byte : address of the byte to write
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@param data : data to write
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*/
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void WritePCF7931(uint8_t pass1, uint8_t pass2, uint8_t pass3, uint8_t pass4, uint8_t pass5, uint8_t pass6, uint8_t pass7, uint16_t init_delay, int32_t l, int32_t p, uint8_t address, uint8_t byte, uint8_t data)
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{
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uint32_t tab[1024]={0}; // data times frame
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uint32_t u = 0;
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uint8_t parity = 0;
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bool comp = 0;
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//BUILD OF THE DATA FRAME
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//alimentation of the tag (time for initializing)
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AddPatternPCF7931(init_delay, 0, 8192/2*T0_PCF, tab);
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//PMC
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Dbprintf("Initialization delay : %d us", init_delay);
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AddPatternPCF7931(8192/2*T0_PCF + 319*T0_PCF+70, 3*T0_PCF, 29*T0_PCF, tab);
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Dbprintf("Offsets : %d us on the low pulses width, %d us on the low pulses positions", l, p);
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//password indication bit
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AddBitPCF7931(1, tab, l, p);
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//password (on 56 bits)
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Dbprintf("Password (LSB first on each byte) : %02x %02x %02x %02x %02x %02x %02x", pass1,pass2,pass3,pass4,pass5,pass6,pass7);
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AddBytePCF7931(pass1, tab, l, p);
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AddBytePCF7931(pass2, tab, l, p);
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AddBytePCF7931(pass3, tab, l, p);
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AddBytePCF7931(pass4, tab, l, p);
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AddBytePCF7931(pass5, tab, l, p);
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AddBytePCF7931(pass6, tab, l, p);
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AddBytePCF7931(pass7, tab, l, p);
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//programming mode (0 or 1)
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AddBitPCF7931(0, tab, l, p);
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//block adress on 6 bits
|
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Dbprintf("Block address : %02x", address);
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for (u=0; u<6; u++)
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{
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if (address&(1<<u)) { // bit 1
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parity++;
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AddBitPCF7931(1, tab, l, p);
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} else{ // bit 0
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AddBitPCF7931(0, tab, l, p);
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}
|
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}
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//byte address on 4 bits
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Dbprintf("Byte address : %02x", byte);
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for (u=0; u<4; u++)
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{
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if (byte&(1<<u)) { // bit 1
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parity++;
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AddBitPCF7931(1, tab, l, p);
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} else{ // bit 0
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AddBitPCF7931(0, tab, l, p);
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}
|
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}
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|
||||
//data on 8 bits
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||||
Dbprintf("Data : %02x", data);
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||||
for (u=0; u<8; u++)
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{
|
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if (data&(1<<u)) { // bit 1
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||||
parity++;
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AddBitPCF7931(1, tab, l, p);
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} else{ //bit 0
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||||
AddBitPCF7931(0, tab, l, p);
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}
|
||||
}
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||||
|
||||
|
||||
//parity bit
|
||||
if((parity%2)==0){
|
||||
AddBitPCF7931(0, tab, l, p); //even parity
|
||||
}else{
|
||||
AddBitPCF7931(1, tab, l, p);//odd parity
|
||||
}
|
||||
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||||
//time access memory
|
||||
AddPatternPCF7931(5120+2680, 0, 0, tab);
|
||||
|
||||
//conversion of the scale time
|
||||
for(u=0;u<500;u++){
|
||||
tab[u]=(tab[u] * 3)/2;
|
||||
}
|
||||
|
||||
|
||||
//compennsation of the counter reload
|
||||
while (!comp){
|
||||
comp = 1;
|
||||
for(u=0;tab[u]!=0;u++){
|
||||
if(tab[u] > 0xFFFF){
|
||||
tab[u] -= 0xFFFF;
|
||||
comp = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
SendCmdPCF7931(tab);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* Send a trame to a PCF7931 tags
|
||||
* @param tab : array of the data frame
|
||||
*/
|
||||
|
||||
void SendCmdPCF7931(uint32_t * tab){
|
||||
uint16_t u=0;
|
||||
uint16_t tempo=0;
|
||||
|
||||
Dbprintf("SENDING DATA FRAME...");
|
||||
|
||||
FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
|
||||
|
||||
FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
|
||||
|
||||
FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_PASSTHRU );
|
||||
|
||||
LED_A_ON();
|
||||
|
||||
// steal this pin from the SSP and use it to control the modulation
|
||||
AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
|
||||
AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
|
||||
|
||||
//initialization of the timer
|
||||
AT91C_BASE_PMC->PMC_PCER |= (0x1 << 12) | (0x1 << 13) | (0x1 << 14);
|
||||
AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_TIOA0 | AT91C_TCB_TC2XC2S_NONE;
|
||||
AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS; // timer disable
|
||||
AT91C_BASE_TC0->TC_CMR = AT91C_TC_CLKS_TIMER_DIV3_CLOCK; //clock at 48/32 MHz
|
||||
AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN;
|
||||
AT91C_BASE_TCB->TCB_BCR = 1;
|
||||
|
||||
|
||||
tempo = AT91C_BASE_TC0->TC_CV;
|
||||
for(u=0;tab[u]!= 0;u+=3){
|
||||
|
||||
|
||||
// modulate antenna
|
||||
HIGH(GPIO_SSC_DOUT);
|
||||
while(tempo != tab[u]){
|
||||
tempo = AT91C_BASE_TC0->TC_CV;
|
||||
}
|
||||
|
||||
// stop modulating antenna
|
||||
LOW(GPIO_SSC_DOUT);
|
||||
while(tempo != tab[u+1]){
|
||||
tempo = AT91C_BASE_TC0->TC_CV;
|
||||
}
|
||||
|
||||
|
||||
// modulate antenna
|
||||
HIGH(GPIO_SSC_DOUT);
|
||||
while(tempo != tab[u+2]){
|
||||
tempo = AT91C_BASE_TC0->TC_CV;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
LED_A_OFF();
|
||||
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
|
||||
SpinDelay(200);
|
||||
|
||||
|
||||
AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS; // timer disable
|
||||
DbpString("FINISH !");
|
||||
DbpString("(Could be usefull to send the same trame many times)");
|
||||
LED(0xFFFF, 1000);
|
||||
}
|
||||
|
||||
|
||||
/* Add a byte for building the data frame of PCF7931 tags
|
||||
* @param b : byte to add
|
||||
* @param tab : array of the data frame
|
||||
* @param l : offset on low pulse width
|
||||
* @param p : offset on low pulse positioning
|
||||
*/
|
||||
|
||||
bool AddBytePCF7931(uint8_t byte, uint32_t * tab, int32_t l, int32_t p){
|
||||
|
||||
uint32_t u;
|
||||
for (u=0; u<8; u++)
|
||||
{
|
||||
if (byte&(1<<u)) { //bit à 1
|
||||
if(AddBitPCF7931(1, tab, l, p)==1)return 1;
|
||||
} else { //bit à 0
|
||||
if(AddBitPCF7931(0, tab, l, p)==1)return 1;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Add a bits for building the data frame of PCF7931 tags
|
||||
* @param b : bit to add
|
||||
* @param tab : array of the data frame
|
||||
* @param l : offset on low pulse width
|
||||
* @param p : offset on low pulse positioning
|
||||
*/
|
||||
bool AddBitPCF7931(bool b, uint32_t * tab, int32_t l, int32_t p){
|
||||
uint8_t u = 0;
|
||||
|
||||
for(u=0;tab[u]!=0;u+=3){} //we put the cursor at the last value of the array
|
||||
|
||||
|
||||
if(b==1){ //add a bit 1
|
||||
if(u==0) tab[u] = 34*T0_PCF+p;
|
||||
else tab[u] = 34*T0_PCF+tab[u-1]+p;
|
||||
|
||||
tab[u+1] = 6*T0_PCF+tab[u]+l;
|
||||
tab[u+2] = 88*T0_PCF+tab[u+1]-l-p;
|
||||
return 0;
|
||||
}else{ //add a bit 0
|
||||
|
||||
if(u==0) tab[u] = 98*T0_PCF+p;
|
||||
else tab[u] = 98*T0_PCF+tab[u-1]+p;
|
||||
|
||||
tab[u+1] = 6*T0_PCF+tab[u]+l;
|
||||
tab[u+2] = 24*T0_PCF+tab[u+1]-l-p;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Add a custom pattern in the data frame
|
||||
* @param a : delay of the first high pulse
|
||||
* @param b : delay of the low pulse
|
||||
* @param c : delay of the last high pulse
|
||||
* @param tab : array of the data frame
|
||||
*/
|
||||
bool AddPatternPCF7931(uint32_t a, uint32_t b, uint32_t c, uint32_t * tab){
|
||||
uint32_t u = 0;
|
||||
for(u=0;tab[u]!=0;u+=3){} //we put the cursor at the last value of the array
|
||||
|
||||
if(u==0) tab[u] = a;
|
||||
else tab[u] = a + tab[u-1];
|
||||
|
||||
tab[u+1] = b+tab[u];
|
||||
tab[u+2] = c+tab[u+1];
|
||||
|
||||
return 0;
|
||||
}
|
||||
Loading…
Add table
Add a link
Reference in a new issue