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MAJOR update, added hitag2 reader, emulation and eavesdropping, lots of new code, including FPGA tweaks, part 2
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18 changed files with 1355 additions and 454 deletions
11
fpga/fpga.v
11
fpga/fpga.v
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@ -14,7 +14,7 @@
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`include "lo_read.v"
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`include "lo_passthru.v"
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`include "lo_simulate.v"
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`include "lo_edge_detect.v"
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`include "hi_read_tx.v"
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`include "hi_read_rx_xcorr.v"
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`include "hi_simulate.v"
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@ -111,6 +111,10 @@ assign hi_read_rx_xcorr_quarter = conf_word[2];
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wire [2:0] hi_simulate_mod_type;
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assign hi_simulate_mod_type = conf_word[2:0];
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// For the high-frequency simulated tag: what kind of modulation to use.
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wire lf_field;
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assign lf_field = conf_word[0];
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//-----------------------------------------------------------------------------
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// And then we instantiate the modules corresponding to each of the FPGA's
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// major modes, and use muxes to connect the outputs of the active mode to
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@ -136,13 +140,14 @@ lo_passthru lp(
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lp_dbg, divisor
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);
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lo_simulate ls(
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lo_edge_detect ls(
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pck0, ck_1356meg, ck_1356megb,
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ls_pwr_lo, ls_pwr_hi, ls_pwr_oe1, ls_pwr_oe2, ls_pwr_oe3, ls_pwr_oe4,
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adc_d, ls_adc_clk,
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ls_ssp_frame, ls_ssp_din, ssp_dout, ls_ssp_clk,
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cross_hi, cross_lo,
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ls_dbg, divisor
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ls_dbg, divisor,
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lf_field
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);
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hi_read_tx ht(
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