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fix hf 15 commands (#293)
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a5eb7820a5
commit
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4 changed files with 18 additions and 13 deletions
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@ -58,7 +58,6 @@ void SetAdcMuxFor(uint32_t whichGpio);
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// Options for the HF reader, correlating against rx from tag
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// Options for the HF reader, correlating against rx from tag
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#define FPGA_HF_READER_RX_XCORR_848_KHZ (1<<0)
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#define FPGA_HF_READER_RX_XCORR_848_KHZ (1<<0)
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#define FPGA_HF_READER_RX_XCORR_SNOOP (1<<1)
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#define FPGA_HF_READER_RX_XCORR_SNOOP (1<<1)
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#define FPGA_HF_READER_RX_XCORR_QUARTER_FREQ (1<<2)
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// Options for the HF simulated tag, how to modulate
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// Options for the HF simulated tag, how to modulate
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#define FPGA_HF_SIMULATOR_NO_MODULATION (0<<0)
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#define FPGA_HF_SIMULATOR_NO_MODULATION (0<<0)
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#define FPGA_HF_SIMULATOR_MODULATE_BPSK (1<<0)
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#define FPGA_HF_SIMULATOR_MODULATE_BPSK (1<<0)
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@ -319,7 +319,7 @@ static int GetIso15693AnswerFromTag(uint8_t *receivedResponse, int maxLen, int *
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// every other is Q. We just want power, so abs(I) + abs(Q) is
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// every other is Q. We just want power, so abs(I) + abs(Q) is
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// close to what we want.
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// close to what we want.
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if(getNext) {
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if(getNext) {
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int8_t r = ABS(b) + ABS(prev);
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uint8_t r = ABS(b) + ABS(prev);
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dest[c++] = (uint8_t)r;
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dest[c++] = (uint8_t)r;
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@ -356,7 +356,7 @@ static int GetIso15693AnswerFromTag(uint8_t *receivedResponse, int maxLen, int *
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maxPos = i;
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maxPos = i;
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}
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}
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}
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}
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// DbpString("SOF at %d, correlation %d", maxPos,max/(arraylen(FrameSOF)/skip));
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// Dbprintf("SOF at %d, correlation %d", maxPos,max/(arraylen(FrameSOF)/skip));
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int k = 0; // this will be our return value
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int k = 0; // this will be our return value
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@ -385,7 +385,7 @@ static int GetIso15693AnswerFromTag(uint8_t *receivedResponse, int maxLen, int *
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corr1 *= 4;
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corr1 *= 4;
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if(corrEOF > corr1 && corrEOF > corr0) {
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if(corrEOF > corr1 && corrEOF > corr0) {
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// DbpString("EOF at %d", i);
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// Dbprintf("EOF at %d", i);
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break;
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break;
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} else if(corr1 > corr0) {
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} else if(corr1 > corr0) {
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i += arraylen(Logic1)/skip;
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i += arraylen(Logic1)/skip;
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@ -457,7 +457,7 @@ static int GetIso15693AnswerFromSniff(uint8_t *receivedResponse, int maxLen, int
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// every other is Q. We just want power, so abs(I) + abs(Q) is
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// every other is Q. We just want power, so abs(I) + abs(Q) is
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// close to what we want.
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// close to what we want.
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if(getNext) {
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if(getNext) {
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int8_t r = ABS(b) + ABS(prev);
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uint8_t r = ABS(b) + ABS(prev);
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dest[c++] = (uint8_t)r;
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dest[c++] = (uint8_t)r;
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@ -626,7 +626,7 @@ void AcquireRawAdcSamplesIso15693(void)
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// every other is Q. We just want power, so abs(I) + abs(Q) is
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// every other is Q. We just want power, so abs(I) + abs(Q) is
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// close to what we want.
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// close to what we want.
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if(getNext) {
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if(getNext) {
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int8_t r = ABS(b) + ABS(prev);
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uint8_t r = ABS(b) + ABS(prev);
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dest[c++] = (uint8_t)r;
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dest[c++] = (uint8_t)r;
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@ -680,7 +680,7 @@ void RecordRawAdcSamplesIso15693(void)
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// every other is Q. We just want power, so abs(I) + abs(Q) is
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// every other is Q. We just want power, so abs(I) + abs(Q) is
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// close to what we want.
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// close to what we want.
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if(getNext) {
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if(getNext) {
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int8_t r = ABS(b) + ABS(prev);
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uint8_t r = ABS(b) + ABS(prev);
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dest[c++] = (uint8_t)r;
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dest[c++] = (uint8_t)r;
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BIN
fpga/fpga_hf.bit
BIN
fpga/fpga_hf.bit
Binary file not shown.
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@ -28,11 +28,18 @@ assign pwr_oe1 = 1'b0;
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assign pwr_oe3 = 1'b0;
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assign pwr_oe3 = 1'b0;
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assign pwr_oe4 = 1'b0;
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assign pwr_oe4 = 1'b0;
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wire adc_clk = ck_1356megb;
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// Clock divider
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reg [0:0] fc_divider;
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reg fc_div_2;
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always @(negedge ck_1356megb)
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always @(negedge ck_1356megb)
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fc_div_2 <= fc_div_2 + 1;
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fc_divider <= fc_divider + 1;
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wire fc_div2 = fc_divider[0];
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reg adc_clk;
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always @(ck_1356megb)
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if (xcorr_is_848)
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adc_clk <= ck_1356megb;
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else
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adc_clk <= fc_div2;
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// When we're a reader, we just need to do the BPSK demod; but when we're an
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// When we're a reader, we just need to do the BPSK demod; but when we're an
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// eavesdropper, we also need to pick out the commands sent by the reader,
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// eavesdropper, we also need to pick out the commands sent by the reader,
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@ -77,7 +84,6 @@ reg ssp_frame;
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always @(negedge adc_clk)
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always @(negedge adc_clk)
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begin
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begin
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if (xcorr_is_848 | fc_div_2)
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corr_i_cnt <= corr_i_cnt + 1;
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corr_i_cnt <= corr_i_cnt + 1;
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end
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end
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@ -137,7 +143,7 @@ begin
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begin
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begin
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ssp_clk <= 1'b1;
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ssp_clk <= 1'b1;
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// Don't shift if we just loaded new data, obviously.
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// Don't shift if we just loaded new data, obviously.
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if(corr_i_cnt != 7'd0)
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if(corr_i_cnt != 6'd0)
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begin
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begin
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corr_i_out[7:0] <= {corr_i_out[6:0], corr_q_out[7]};
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corr_i_out[7:0] <= {corr_i_out[6:0], corr_q_out[7]};
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corr_q_out[7:1] <= corr_q_out[6:0];
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corr_q_out[7:1] <= corr_q_out[6:0];
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