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Merge pull request #862 from pwpiwi/fix_iclass_sim
fix hf iclass sim: * sim 2: add responses to read(1) (Config) and read(5) (AIA) * sim 2/3: don't restrict CC to 00 bytes only * sim 3: add responding to read block commands * sim 2/3: add responding to READ_CHECK_KC * fix sizes of pre-encoded tag answers * sim 2: change default card challenge * remove commented code * use #defines instead of numerical constants for simulation modes * some reformatting and whitespace fixes * fix debug print on unhandled commands * deduplicate: use sim functions from iso15693.c * fix times in tracelog and 'hf list iclass' (sim only) * don't check parity in 'hf list iclass' * fix timing in TransmitTo15693Reader() * add simulation of block 3 and 4 (Kd and Kc) reads * add simulation of READ4 (4 blocks read) * FPGA change (hi_simulate.v): avoid spp_clk phase changes * chg to reader command decoder in iso15693.c (require no modulation before SOF) * add 'has_been_low_for' logic to hi_simulate.v (same as in other FPGA modes, default to "no modulation") * add simulation of chip status (IDLE, ACTIVE, SELECTED, HALTED) * check ACSN on SELECT * add simulation of RESELECT * always check length of reader commands * fix printing of NR, MAC in sim 2 mode * fix response length to CHECK command * implement UPDATE and CHECK[Kc] * add simulation of multiple pages (PAGESEL by @sherhannn9) * maintain cipher states per page * update cipher state after UPDATE commands (@sherhannn9) * add simulation of personalization mode * respond with SOF on HALT * display "\<SOF\>" instead of "0f" in 'hf list iclass' * standard LED handling * speedup CodeIso15693AsTag() * TransmitTo15693Tag(): don't send unmodulated start of SOF * reduce modulation depth in hi_simulate.v
This commit is contained in:
pwpiwi
GitHub
commit
b41be3cb11
12 changed files with 882 additions and 775 deletions
819
armsrc/iclass.c
819
armsrc/iclass.c
File diff suppressed because it is too large
Load diff
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@ -68,27 +68,14 @@ static int DEBUG = 0;
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///////////////////////////////////////////////////////////////////////
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// ISO 15693 Part 2 - Air Interface
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// This section basicly contains transmission and receiving of bits
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// This section basically contains transmission and receiving of bits
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///////////////////////////////////////////////////////////////////////
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#define Crc(data,datalen) Iso15693Crc(data,datalen)
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#define AddCrc(data,datalen) Iso15693AddCrc(data,datalen)
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#define sprintUID(target,uid) Iso15693sprintUID(target,uid)
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// buffers
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#define ISO15693_DMA_BUFFER_SIZE 2048 // must be a power of 2
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#define ISO15693_MAX_RESPONSE_LENGTH 36 // allows read single block with the maximum block size of 256bits. Read multiple blocks not supported yet
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#define ISO15693_MAX_COMMAND_LENGTH 45 // allows write single block with the maximum block size of 256bits. Write multiple blocks not supported yet
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// timing. Delays in SSP_CLK ticks.
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// SSP_CLK runs at 13,56MHz / 32 = 423.75kHz when simulating a tag
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#define DELAY_READER_TO_ARM_SIM 8
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#define DELAY_ARM_TO_READER_SIM 1
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#define DELAY_ISO15693_VCD_TO_VICC_SIM 132 // 132/423.75kHz = 311.5us from end of command EOF to start of tag response
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//SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when acting as reader
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#define DELAY_ISO15693_VCD_TO_VICC_READER 1056 // 1056/3,39MHz = 311.5us from end of command EOF to start of tag response
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#define DELAY_ISO15693_VICC_TO_VCD_READER 1017 // 1017/3.39MHz = 300us between end of tag response and next reader command
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// ---------------------------
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// Signal Processing
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// ---------------------------
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@ -228,42 +215,80 @@ static void CodeIso15693AsReader256(uint8_t *cmd, int n)
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}
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static void CodeIso15693AsTag(uint8_t *cmd, int n)
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{
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// static uint8_t encode4Bits(const uint8_t b) {
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// uint8_t c = b & 0xF;
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// // OTA, the least significant bits first
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// // The columns are
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// // 1 - Bit value to send
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// // 2 - Reversed (big-endian)
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// // 3 - Manchester Encoded
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// // 4 - Hex values
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// switch(c){
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// // 1 2 3 4
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// case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
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// case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
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// case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
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// case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
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// case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
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// case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
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// case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
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// case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
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// case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
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// case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
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// case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
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// case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
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// case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
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// case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
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// case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
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// default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
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// }
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// }
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static const uint8_t encode_4bits[16] = { 0xaa, 0x6a, 0x9a, 0x5a, 0xa6, 0x66, 0x96, 0x56, 0xa9, 0x69, 0x99, 0x59, 0xa5, 0x65, 0x95, 0x55 };
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void CodeIso15693AsTag(uint8_t *cmd, size_t len) {
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/*
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* SOF comprises 3 parts;
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* * An unmodulated time of 56.64 us
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* * 24 pulses of 423.75 kHz (fc/32)
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* * A logic 1, which starts with an unmodulated time of 18.88us
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* followed by 8 pulses of 423.75kHz (fc/32)
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*
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* EOF comprises 3 parts:
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* - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
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* time of 18.88us.
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* - 24 pulses of fc/32
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* - An unmodulated time of 56.64 us
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*
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* A logic 0 starts with 8 pulses of fc/32
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* followed by an unmodulated time of 256/fc (~18,88us).
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*
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* A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
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* 8 pulses of fc/32 (also 18.88us)
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*
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* A bit here becomes 8 pulses of fc/32. Therefore:
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* The SOF can be written as 00011101 = 0x1D
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* The EOF can be written as 10111000 = 0xb8
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* A logic 1 is 01
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* A logic 0 is 10
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*
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* */
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ToSendReset();
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// SOF
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ToSendStuffBit(0);
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ToSendStuffBit(0);
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ToSendStuffBit(0);
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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ToSendStuffBit(0);
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ToSendStuffBit(1);
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ToSend[++ToSendMax] = 0x1D; // 00011101
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// data
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for(int i = 0; i < n; i++) {
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for(int j = 0; j < 8; j++) {
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if ((cmd[i] >> j) & 0x01) {
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ToSendStuffBit(0);
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ToSendStuffBit(1);
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} else {
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ToSendStuffBit(1);
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ToSendStuffBit(0);
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}
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}
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for (int i = 0; i < len; i++) {
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ToSend[++ToSendMax] = encode_4bits[cmd[i] & 0xF];
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ToSend[++ToSendMax] = encode_4bits[cmd[i] >> 4];
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}
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// EOF
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ToSendStuffBit(1);
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ToSendStuffBit(0);
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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ToSendStuffBit(0);
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ToSendStuffBit(0);
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ToSendStuffBit(0);
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ToSend[++ToSendMax] = 0xB8; // 10111000
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ToSendMax++;
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}
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@ -297,38 +322,50 @@ static void TransmitTo15693Tag(const uint8_t *cmd, int len, uint32_t start_time)
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//-----------------------------------------------------------------------------
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// Transmit the tag response (to the reader) that was placed in cmd[].
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//-----------------------------------------------------------------------------
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static void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t start_time, bool slow)
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{
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void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t *start_time, uint32_t slot_time, bool slow) {
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// don't use the FPGA_HF_SIMULATOR_MODULATE_424K_8BIT minor mode. It would spoil GetCountSspClk()
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K);
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uint8_t shift_delay = start_time & 0x00000007;
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uint8_t bitmask = 0x00;
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for (int i = 0; i < shift_delay; i++) {
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bitmask |= (0x01 << i);
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uint32_t modulation_start_time = *start_time + 3 * 8; // no need to transfer the unmodulated start of SOF
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while (GetCountSspClk() > (modulation_start_time & 0xfffffff8) + 3) { // we will miss the intended time
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if (slot_time) {
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modulation_start_time += slot_time; // use next available slot
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} else {
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modulation_start_time = (modulation_start_time & 0xfffffff8) + 8; // next possible time
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}
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}
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while (GetCountSspClk() < (start_time & 0xfffffff8)) ;
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while (GetCountSspClk() < (modulation_start_time & 0xfffffff8))
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/* wait */ ;
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AT91C_BASE_SSC->SSC_THR = 0x00; // clear TXRDY
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uint8_t shift_delay = modulation_start_time & 0x00000007;
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*start_time = modulation_start_time - 3 * 8;
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LED_C_ON();
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uint8_t bits_to_shift = 0x00;
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for(size_t c = 0; c <= len; c++) {
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uint8_t bits_to_send = bits_to_shift << (8 - shift_delay) | (c==len?0x00:cmd[c]) >> shift_delay;
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bits_to_shift = cmd[c] & bitmask;
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for (int i = 7; i >= 0; i--) {
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uint8_t bits_to_send = 0x00;
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for (size_t c = 0; c < len; c++) {
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for (int i = (c==0?4:7); i >= 0; i--) {
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uint8_t cmd_bits = ((cmd[c] >> i) & 0x01) ? 0xff : 0x00;
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for (int j = 0; j < (slow?4:1); ) {
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
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if (bits_to_send >> i & 0x01) {
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AT91C_BASE_SSC->SSC_THR = 0xff;
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} else {
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AT91C_BASE_SSC->SSC_THR = 0x00;
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}
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bits_to_send = bits_to_shift << (8 - shift_delay) | cmd_bits >> shift_delay;
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AT91C_BASE_SSC->SSC_THR = bits_to_send;
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bits_to_shift = cmd_bits;
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j++;
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}
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}
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}
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WDT_HIT();
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}
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// send the remaining bits, padded with 0:
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bits_to_send = bits_to_shift << (8 - shift_delay);
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for ( ; ; ) {
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
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AT91C_BASE_SSC->SSC_THR = bits_to_send;
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break;
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}
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}
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LED_C_OFF();
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@ -641,6 +678,7 @@ static int GetIso15693AnswerFromTag(uint8_t* response, uint16_t max_len, int tim
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typedef struct DecodeReader {
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enum {
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STATE_READER_UNSYNCD,
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STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF,
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STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF,
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STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF,
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STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF,
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@ -684,6 +722,13 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
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{
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switch (DecodeReader->state) {
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case STATE_READER_UNSYNCD:
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// wait for unmodulated carrier
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if (bit) {
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DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
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}
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break;
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case STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF:
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if (!bit) {
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// we went low, so this could be the beginning of a SOF
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DecodeReader->posCount = 1;
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@ -695,7 +740,7 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
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DecodeReader->posCount++;
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if (bit) { // detected rising edge
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if (DecodeReader->posCount < 4) { // rising edge too early (nominally expected at 5)
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DecodeReaderReset(DecodeReader);
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DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
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} else { // SOF
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DecodeReader->state = STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF;
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}
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@ -718,13 +763,13 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
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DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
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} else if (DecodeReader->posCount < 28) { // falling edge too early (nominally expected at 29 latest)
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DecodeReaderReset(DecodeReader);
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} else { // SOF for 1 out of 4 coding
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} else { // SOF for 1 out of 256 coding
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DecodeReader->Coding = CODING_1_OUT_OF_256;
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DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
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}
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} else {
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if (DecodeReader->posCount > 29) { // stayed high for too long
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DecodeReaderReset(DecodeReader);
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DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
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} else {
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// do nothing, keep waiting
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}
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@ -736,7 +781,7 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
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if (bit) { // detected rising edge
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if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
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if (DecodeReader->posCount < 32) { // rising edge too early (nominally expected at 33)
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DecodeReaderReset(DecodeReader);
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DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
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} else {
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DecodeReader->posCount = 1;
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DecodeReader->bitCount = 0;
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@ -747,8 +792,9 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
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}
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} else { // CODING_1_OUT_OF_4
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if (DecodeReader->posCount < 24) { // rising edge too early (nominally expected at 25)
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DecodeReaderReset(DecodeReader);
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DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
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} else {
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DecodeReader->posCount = 1;
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DecodeReader->state = STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4;
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}
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}
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@ -772,7 +818,7 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
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case STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4:
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DecodeReader->posCount++;
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if (bit) {
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if (DecodeReader->posCount == 33) {
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if (DecodeReader->posCount == 9) {
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DecodeReader->posCount = 1;
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DecodeReader->bitCount = 0;
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DecodeReader->byteCount = 0;
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@ -788,6 +834,7 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
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break;
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case STATE_READER_RECEIVE_DATA_1_OUT_OF_4:
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bit = !!bit;
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DecodeReader->posCount++;
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if (DecodeReader->posCount == 1) {
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DecodeReader->sum1 = bit;
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@ -800,17 +847,14 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
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}
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if (DecodeReader->posCount == 8) {
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DecodeReader->posCount = 0;
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int corr10 = DecodeReader->sum1 - DecodeReader->sum2;
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int corr01 = DecodeReader->sum2 - DecodeReader->sum1;
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int corr11 = (DecodeReader->sum1 + DecodeReader->sum2) / 2;
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if (corr01 > corr11 && corr01 > corr10) { // EOF
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if (DecodeReader->sum1 <= 1 && DecodeReader->sum2 >= 3) { // EOF
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LED_B_OFF(); // Finished receiving
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DecodeReaderReset(DecodeReader);
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if (DecodeReader->byteCount != 0) {
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return true;
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}
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}
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if (corr10 > corr11) { // detected a 2bit position
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if (DecodeReader->sum1 >= 3 && DecodeReader->sum2 <= 1) { // detected a 2bit position
|
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DecodeReader->shiftReg >>= 2;
|
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DecodeReader->shiftReg |= (DecodeReader->bitCount << 6);
|
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}
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|
@ -830,6 +874,7 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
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break;
|
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case STATE_READER_RECEIVE_DATA_1_OUT_OF_256:
|
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bit = !!bit;
|
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DecodeReader->posCount++;
|
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if (DecodeReader->posCount == 1) {
|
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DecodeReader->sum1 = bit;
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|
@ -842,17 +887,14 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
|
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}
|
||||
if (DecodeReader->posCount == 8) {
|
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DecodeReader->posCount = 0;
|
||||
int corr10 = DecodeReader->sum1 - DecodeReader->sum2;
|
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int corr01 = DecodeReader->sum2 - DecodeReader->sum1;
|
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int corr11 = (DecodeReader->sum1 + DecodeReader->sum2) / 2;
|
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if (corr01 > corr11 && corr01 > corr10) { // EOF
|
||||
if (DecodeReader->sum1 <= 1 && DecodeReader->sum2 >= 3) { // EOF
|
||||
LED_B_OFF(); // Finished receiving
|
||||
DecodeReaderReset(DecodeReader);
|
||||
if (DecodeReader->byteCount != 0) {
|
||||
return true;
|
||||
}
|
||||
}
|
||||
if (corr10 > corr11) { // detected the bit position
|
||||
if (DecodeReader->sum1 >= 3 && DecodeReader->sum2 <= 1) { // detected the bit position
|
||||
DecodeReader->shiftReg = DecodeReader->bitCount;
|
||||
}
|
||||
if (DecodeReader->bitCount == 255) { // we have a full byte
|
||||
|
|
@ -881,19 +923,18 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
|
|||
// Receive a command (from the reader to us, where we are the simulated tag),
|
||||
// and store it in the given buffer, up to the given maximum length. Keeps
|
||||
// spinning, waiting for a well-framed command, until either we get one
|
||||
// (returns true) or someone presses the pushbutton on the board (false).
|
||||
// (returns len) or someone presses the pushbutton on the board (returns -1).
|
||||
//
|
||||
// Assume that we're called with the SSC (to the FPGA) and ADC path set
|
||||
// correctly.
|
||||
//-----------------------------------------------------------------------------
|
||||
|
||||
static int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time)
|
||||
{
|
||||
int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time) {
|
||||
int samples = 0;
|
||||
bool gotFrame = false;
|
||||
uint8_t b;
|
||||
|
||||
uint8_t *dmaBuf = BigBuf_malloc(ISO15693_DMA_BUFFER_SIZE);
|
||||
uint8_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
|
||||
|
||||
// the decoder data structure
|
||||
DecodeReader_t DecodeReader = {0};
|
||||
|
|
@ -910,7 +951,7 @@ static int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint3
|
|||
(void) temp;
|
||||
while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) ;
|
||||
|
||||
uint32_t bit_time = GetCountSspClk() & 0xfffffff8;
|
||||
uint32_t dma_start_time = GetCountSspClk() & 0xfffffff8;
|
||||
|
||||
// Setup and start DMA.
|
||||
FpgaSetupSscDma(dmaBuf, ISO15693_DMA_BUFFER_SIZE);
|
||||
|
|
@ -936,7 +977,7 @@ static int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint3
|
|||
|
||||
for (int i = 7; i >= 0; i--) {
|
||||
if (Handle15693SampleFromReader((b >> i) & 0x01, &DecodeReader)) {
|
||||
*eof_time = bit_time + samples - DELAY_READER_TO_ARM_SIM; // end of EOF
|
||||
*eof_time = dma_start_time + samples - DELAY_READER_TO_ARM_SIM; // end of EOF
|
||||
gotFrame = true;
|
||||
break;
|
||||
}
|
||||
|
|
@ -948,22 +989,24 @@ static int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint3
|
|||
}
|
||||
|
||||
if (BUTTON_PRESS()) {
|
||||
DecodeReader.byteCount = 0;
|
||||
DecodeReader.byteCount = -1;
|
||||
break;
|
||||
}
|
||||
|
||||
WDT_HIT();
|
||||
}
|
||||
|
||||
|
||||
FpgaDisableSscDma();
|
||||
BigBuf_free_keep_EM();
|
||||
|
||||
if (DEBUG) Dbprintf("samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d",
|
||||
samples, gotFrame, DecodeReader.state, DecodeReader.byteCount, DecodeReader.bitCount, DecodeReader.posCount);
|
||||
|
||||
if (DecodeReader.byteCount > 0) {
|
||||
LogTrace(DecodeReader.output, DecodeReader.byteCount, 0, *eof_time, NULL, true);
|
||||
uint32_t sof_time = *eof_time
|
||||
- DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128:2048) // time for byte transfers
|
||||
- 32 // time for SOF transfer
|
||||
- 16; // time for EOF transfer
|
||||
LogTrace(DecodeReader.output, DecodeReader.byteCount, sof_time, *eof_time, NULL, true);
|
||||
}
|
||||
|
||||
return DecodeReader.byteCount;
|
||||
|
|
@ -985,7 +1028,7 @@ static void BuildIdentifyRequest(void)
|
|||
// no mask
|
||||
cmd[2] = 0x00;
|
||||
//Now the CRC
|
||||
crc = Crc(cmd, 3);
|
||||
crc = Iso15693Crc(cmd, 3);
|
||||
cmd[3] = crc & 0xff;
|
||||
cmd[4] = crc >> 8;
|
||||
|
||||
|
|
@ -1219,7 +1262,7 @@ static void BuildReadBlockRequest(uint8_t *uid, uint8_t blockNumber )
|
|||
// Block number to read
|
||||
cmd[10] = blockNumber;
|
||||
//Now the CRC
|
||||
crc = Crc(cmd, 11); // the crc needs to be calculated over 11 bytes
|
||||
crc = Iso15693Crc(cmd, 11); // the crc needs to be calculated over 11 bytes
|
||||
cmd[11] = crc & 0xff;
|
||||
cmd[12] = crc >> 8;
|
||||
|
||||
|
|
@ -1246,7 +1289,7 @@ static void BuildInventoryResponse(uint8_t *uid)
|
|||
cmd[8] = uid[1]; //0x05;
|
||||
cmd[9] = uid[0]; //0xe0;
|
||||
//Now the CRC
|
||||
crc = Crc(cmd, 10);
|
||||
crc = Iso15693Crc(cmd, 10);
|
||||
cmd[10] = crc & 0xff;
|
||||
cmd[11] = crc >> 8;
|
||||
|
||||
|
|
@ -1341,7 +1384,7 @@ void DbdecodeIso15693Answer(int len, uint8_t *d) {
|
|||
strncat(status,"NoErr ", DBD15STATLEN);
|
||||
}
|
||||
|
||||
crc=Crc(d,len-2);
|
||||
crc=Iso15693Crc(d,len-2);
|
||||
if ( (( crc & 0xff ) == d[len-2]) && (( crc >> 8 ) == d[len-1]) )
|
||||
strncat(status,"CrcOK",DBD15STATLEN);
|
||||
else
|
||||
|
|
@ -1493,7 +1536,7 @@ void SimTagIso15693(uint32_t parameter, uint8_t *uid)
|
|||
if ((cmd_len >= 5) && (cmd[0] & ISO15693_REQ_INVENTORY) && (cmd[1] == ISO15693_INVENTORY)) { // TODO: check more flags
|
||||
bool slow = !(cmd[0] & ISO15693_REQ_DATARATE_HIGH);
|
||||
start_time = eof_time + DELAY_ISO15693_VCD_TO_VICC_SIM - DELAY_ARM_TO_READER_SIM;
|
||||
TransmitTo15693Reader(ToSend, ToSendMax, start_time, slow);
|
||||
TransmitTo15693Reader(ToSend, ToSendMax, &start_time, 0, slow);
|
||||
}
|
||||
|
||||
Dbprintf("%d bytes read from reader:", cmd_len);
|
||||
|
|
@ -1526,12 +1569,12 @@ void BruteforceIso15693Afi(uint32_t speed)
|
|||
data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_SLOT1;
|
||||
data[1] = ISO15693_INVENTORY;
|
||||
data[2] = 0; // mask length
|
||||
datalen = AddCrc(data,3);
|
||||
datalen = Iso15693AddCrc(data,3);
|
||||
recvlen = SendDataTag(data, datalen, false, speed, recv, sizeof(recv), 0);
|
||||
uint32_t start_time = GetCountSspClk() + DELAY_ISO15693_VICC_TO_VCD_READER;
|
||||
WDT_HIT();
|
||||
if (recvlen>=12) {
|
||||
Dbprintf("NoAFI UID=%s", sprintUID(NULL, &recv[2]));
|
||||
Dbprintf("NoAFI UID=%s", Iso15693sprintUID(NULL, &recv[2]));
|
||||
}
|
||||
|
||||
// now with AFI
|
||||
|
|
@ -1543,12 +1586,12 @@ void BruteforceIso15693Afi(uint32_t speed)
|
|||
|
||||
for (int i = 0; i < 256; i++) {
|
||||
data[2] = i & 0xFF;
|
||||
datalen = AddCrc(data,4);
|
||||
datalen = Iso15693AddCrc(data,4);
|
||||
recvlen = SendDataTag(data, datalen, false, speed, recv, sizeof(recv), start_time);
|
||||
start_time = GetCountSspClk() + DELAY_ISO15693_VICC_TO_VCD_READER;
|
||||
WDT_HIT();
|
||||
if (recvlen >= 12) {
|
||||
Dbprintf("AFI=%i UID=%s", i, sprintUID(NULL, &recv[2]));
|
||||
Dbprintf("AFI=%i UID=%s", i, Iso15693sprintUID(NULL, &recv[2]));
|
||||
}
|
||||
}
|
||||
Dbprintf("AFI Bruteforcing done.");
|
||||
|
|
@ -1646,7 +1689,7 @@ void SetTag15693Uid(uint8_t *uid)
|
|||
|
||||
for (int i=0; i<4; i++) {
|
||||
// Add the CRC
|
||||
crc = Crc(cmd[i], 7);
|
||||
crc = Iso15693Crc(cmd[i], 7);
|
||||
cmd[i][7] = crc & 0xff;
|
||||
cmd[i][8] = crc >> 8;
|
||||
|
||||
|
|
@ -1702,7 +1745,7 @@ static void __attribute__((unused)) BuildSysInfoRequest(uint8_t *uid)
|
|||
cmd[8] = 0x05;
|
||||
cmd[9]= 0xe0; // always e0 (not exactly unique)
|
||||
//Now the CRC
|
||||
crc = Crc(cmd, 10); // the crc needs to be calculated over 2 bytes
|
||||
crc = Iso15693Crc(cmd, 10); // the crc needs to be calculated over 2 bytes
|
||||
cmd[10] = crc & 0xff;
|
||||
cmd[11] = crc >> 8;
|
||||
|
||||
|
|
@ -1737,7 +1780,7 @@ static void __attribute__((unused)) BuildReadMultiBlockRequest(uint8_t *uid)
|
|||
// Number of Blocks to read
|
||||
cmd[11] = 0x2f; // read quite a few
|
||||
//Now the CRC
|
||||
crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
|
||||
crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
|
||||
cmd[12] = crc & 0xff;
|
||||
cmd[13] = crc >> 8;
|
||||
|
||||
|
|
@ -1772,7 +1815,7 @@ static void __attribute__((unused)) BuildArbitraryRequest(uint8_t *uid,uint8_t C
|
|||
|
||||
// cmd[12] = 0x00;
|
||||
// cmd[13] = 0x00; //Now the CRC
|
||||
crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
|
||||
crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
|
||||
cmd[12] = crc & 0xff;
|
||||
cmd[13] = crc >> 8;
|
||||
|
||||
|
|
@ -1807,7 +1850,7 @@ static void __attribute__((unused)) BuildArbitraryCustomRequest(uint8_t uid[], u
|
|||
|
||||
// cmd[12] = 0x00;
|
||||
// cmd[13] = 0x00; //Now the CRC
|
||||
crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
|
||||
crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
|
||||
cmd[12] = crc & 0xff;
|
||||
cmd[13] = crc >> 8;
|
||||
|
||||
|
|
|
|||
|
|
@ -8,11 +8,25 @@
|
|||
// Routines to support ISO 15693.
|
||||
//-----------------------------------------------------------------------------
|
||||
|
||||
#ifndef __ISO15693_H
|
||||
#define __ISO15693_H
|
||||
#ifndef ISO15693_H__
|
||||
#define ISO15693_H__
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
// Delays in SSP_CLK ticks.
|
||||
// SSP_CLK runs at 13,56MHz / 32 = 423.75kHz when simulating a tag
|
||||
#define DELAY_READER_TO_ARM_SIM 8
|
||||
#define DELAY_ARM_TO_READER_SIM 0
|
||||
#define DELAY_ISO15693_VCD_TO_VICC_SIM 132 // 132/423.75kHz = 311.5us from end of command EOF to start of tag response
|
||||
//SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when acting as reader
|
||||
#define DELAY_ISO15693_VCD_TO_VICC_READER 1056 // 1056/3,39MHz = 311.5us from end of command EOF to start of tag response
|
||||
#define DELAY_ISO15693_VICC_TO_VCD_READER 1017 // 1017/3.39MHz = 300us between end of tag response and next reader command
|
||||
|
||||
void CodeIso15693AsTag(uint8_t *cmd, size_t len);
|
||||
int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time);
|
||||
void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t *start_time, uint32_t slot_time, bool slow);
|
||||
void SnoopIso15693(void);
|
||||
void AcquireRawAdcSamplesIso15693(void);
|
||||
void ReaderIso15693(uint32_t parameter);
|
||||
|
|
|
|||
|
|
@ -100,38 +100,10 @@ int usage_hf_iclass_sim(void) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
// the original malicious IDs from Flavio D. Garcia, Gerhard de Koning Gans, Roel Verdult,
|
||||
// and Milosch Meriac. Dismantling iClass and iClass Elite.
|
||||
#define NUM_CSNS 15
|
||||
int CmdHFiClassSim(const char *Cmd) {
|
||||
uint8_t simType = 0;
|
||||
uint8_t CSN[8] = {0, 0, 0, 0, 0, 0, 0, 0};
|
||||
|
||||
if (strlen(Cmd)<1) {
|
||||
return usage_hf_iclass_sim();
|
||||
}
|
||||
simType = param_get8ex(Cmd, 0, 0, 10);
|
||||
|
||||
if(simType == 0)
|
||||
{
|
||||
if (param_gethex(Cmd, 1, CSN, 16)) {
|
||||
PrintAndLog("A CSN should consist of 16 HEX symbols");
|
||||
return usage_hf_iclass_sim();
|
||||
}
|
||||
|
||||
PrintAndLog("--simtype:%02x csn:%s", simType, sprint_hex(CSN, 8));
|
||||
}
|
||||
if(simType > 3)
|
||||
{
|
||||
PrintAndLog("Undefined simptype %d", simType);
|
||||
return usage_hf_iclass_sim();
|
||||
}
|
||||
|
||||
uint8_t numberOfCSNs=0;
|
||||
if(simType == 2)
|
||||
{
|
||||
UsbCommand c = {CMD_SIMULATE_TAG_ICLASS, {simType,NUM_CSNS}};
|
||||
UsbCommand resp = {0};
|
||||
|
||||
uint8_t csns[8*NUM_CSNS] = {
|
||||
static uint8_t csns[8 * NUM_CSNS] = {
|
||||
0x00, 0x0B, 0x0F, 0xFF, 0xF7, 0xFF, 0x12, 0xE0,
|
||||
0x00, 0x04, 0x0E, 0x08, 0xF7, 0xFF, 0x12, 0xE0,
|
||||
0x00, 0x09, 0x0D, 0x05, 0xF7, 0xFF, 0x12, 0xE0,
|
||||
|
|
@ -148,6 +120,47 @@ int CmdHFiClassSim(const char *Cmd) {
|
|||
0x00, 0x00, 0x02, 0x24, 0xF7, 0xFF, 0x12, 0xE0,
|
||||
0x00, 0x05, 0x01, 0x21, 0xF7, 0xFF, 0x12, 0xE0 };
|
||||
|
||||
|
||||
// pre-defined 9 CSNs by iceman.
|
||||
// only one csn depend on several others.
|
||||
// six depends only on the first csn, (0,1, 0x45)
|
||||
|
||||
// #define NUM_CSNS 9
|
||||
// static uint8_t csns[8 * NUM_CSNS] = {
|
||||
// 0x01, 0x0A, 0x0F, 0xFF, 0xF7, 0xFF, 0x12, 0xE0,
|
||||
// 0x0C, 0x06, 0x0C, 0xFE, 0xF7, 0xFF, 0x12, 0xE0,
|
||||
// 0x10, 0x97, 0x83, 0x7B, 0xF7, 0xFF, 0x12, 0xE0,
|
||||
// 0x13, 0x97, 0x82, 0x7A, 0xF7, 0xFF, 0x12, 0xE0,
|
||||
// 0x07, 0x0E, 0x0D, 0xF9, 0xF7, 0xFF, 0x12, 0xE0,
|
||||
// 0x14, 0x96, 0x84, 0x76, 0xF7, 0xFF, 0x12, 0xE0,
|
||||
// 0x17, 0x96, 0x85, 0x71, 0xF7, 0xFF, 0x12, 0xE0,
|
||||
// 0xCE, 0xC5, 0x0F, 0x77, 0xF7, 0xFF, 0x12, 0xE0,
|
||||
// 0xD2, 0x5A, 0x82, 0xF8, 0xF7, 0xFF, 0x12, 0xE0
|
||||
// //0x04, 0x08, 0x9F, 0x78, 0x6E, 0xFF, 0x12, 0xE0
|
||||
// };
|
||||
|
||||
|
||||
int CmdHFiClassSim(const char *Cmd) {
|
||||
uint8_t simType = 0;
|
||||
uint8_t CSN[8] = {0, 0, 0, 0, 0, 0, 0, 0};
|
||||
|
||||
if (strlen(Cmd) < 1) {
|
||||
return usage_hf_iclass_sim();
|
||||
}
|
||||
simType = param_get8ex(Cmd, 0, 0, 10);
|
||||
|
||||
if (simType == ICLASS_SIM_MODE_CSN) {
|
||||
if (param_gethex(Cmd, 1, CSN, 16)) {
|
||||
PrintAndLog("A CSN should consist of 16 HEX symbols");
|
||||
return usage_hf_iclass_sim();
|
||||
}
|
||||
PrintAndLog("--simtype:%02x csn:%s", simType, sprint_hex(CSN, 8));
|
||||
}
|
||||
|
||||
if (simType == ICLASS_SIM_MODE_READER_ATTACK) {
|
||||
UsbCommand c = {CMD_SIMULATE_TAG_ICLASS, {simType, NUM_CSNS}};
|
||||
UsbCommand resp = {0};
|
||||
|
||||
memcpy(c.d.asBytes, csns, 8 * NUM_CSNS);
|
||||
|
||||
SendCommand(&c);
|
||||
|
|
@ -167,28 +180,29 @@ int CmdHFiClassSim(const char *Cmd) {
|
|||
* 8 * 24 bytes.
|
||||
*
|
||||
* The returndata from the pm3 is on the following format
|
||||
* <4 byte NR><4 byte MAC>
|
||||
* CC are all zeroes, CSN is the same as was sent in
|
||||
* <8 byte CC><4 byte NR><4 byte MAC>
|
||||
* CSN is the same as was sent in
|
||||
**/
|
||||
void* dump = malloc(datalen);
|
||||
memset(dump,0,datalen);//<-- Need zeroes for the CC-field
|
||||
uint8_t i = 0;
|
||||
for(i = 0 ; i < NUM_CSNS ; i++)
|
||||
{
|
||||
for(int i = 0; i < NUM_CSNS; i++) {
|
||||
memcpy(dump + i*24, csns+i*8, 8); //CSN
|
||||
//8 zero bytes here...
|
||||
//copy CC from response
|
||||
memcpy(dump + i*24 + 8, resp.d.asBytes + i*16, 8);
|
||||
//Then comes NR_MAC (eight bytes from the response)
|
||||
memcpy(dump+i*24+16,resp.d.asBytes+i*8,8);
|
||||
|
||||
memcpy(dump + i*24 + 16, resp.d.asBytes + i*16 + 8, 8);
|
||||
}
|
||||
/** Now, save to dumpfile **/
|
||||
saveFile("iclass_mac_attack", "bin", dump,datalen);
|
||||
free(dump);
|
||||
}else
|
||||
{
|
||||
UsbCommand c = {CMD_SIMULATE_TAG_ICLASS, {simType,numberOfCSNs}};
|
||||
|
||||
} else if (simType == ICLASS_SIM_MODE_CSN || simType == ICLASS_SIM_MODE_CSN_DEFAULT || simType == ICLASS_SIM_MODE_FULL) {
|
||||
UsbCommand c = {CMD_SIMULATE_TAG_ICLASS, {simType, 0}};
|
||||
memcpy(c.d.asBytes, CSN, 8);
|
||||
SendCommand(&c);
|
||||
|
||||
} else {
|
||||
PrintAndLog("Undefined simtype %d", simType);
|
||||
return usage_hf_iclass_sim();
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -1263,24 +1277,18 @@ int CmdHFiClass_loclass(const char *Cmd) {
|
|||
return 0;
|
||||
}
|
||||
char fileName[255] = {0};
|
||||
if(opt == 'f')
|
||||
{
|
||||
if(param_getstr(Cmd, 1, fileName, sizeof(fileName)) > 0)
|
||||
{
|
||||
if(opt == 'f') {
|
||||
if(param_getstr(Cmd, 1, fileName, sizeof(fileName)) > 0) {
|
||||
return bruteforceFileNoKeys(fileName);
|
||||
}else
|
||||
{
|
||||
} else {
|
||||
PrintAndLog("You must specify a filename");
|
||||
}
|
||||
}
|
||||
else if(opt == 't')
|
||||
{
|
||||
} else if(opt == 't') {
|
||||
int errors = testCipherUtils();
|
||||
errors += testMAC();
|
||||
errors += doKeyTests(0);
|
||||
errors += testElite();
|
||||
if(errors)
|
||||
{
|
||||
if(errors) {
|
||||
prnlog("OBS! There were errors!!!");
|
||||
}
|
||||
return errors;
|
||||
|
|
|
|||
|
|
@ -213,8 +213,7 @@ uint8_t iclass_CRC_check(bool isResponse, uint8_t* data, uint8_t len)
|
|||
}
|
||||
|
||||
|
||||
void annotateIclass(char *exp, size_t size, uint8_t* cmd, uint8_t cmdsize)
|
||||
{
|
||||
void annotateIclass(char *exp, size_t size, uint8_t* cmd, uint8_t cmdsize) {
|
||||
switch(cmd[0])
|
||||
{
|
||||
case ICLASS_CMD_ACTALL: snprintf(exp, size, "ACTALL"); break;
|
||||
|
|
@ -230,7 +229,8 @@ void annotateIclass(char *exp, size_t size, uint8_t* cmd, uint8_t cmdsize)
|
|||
case ICLASS_CMD_PAGESEL: snprintf(exp,size, "PAGESEL(%d)", cmd[1]); break;
|
||||
case ICLASS_CMD_READCHECK_KC: snprintf(exp,size, "READCHECK[Kc](%d)", cmd[1]); break;
|
||||
case ICLASS_CMD_READCHECK_KD: snprintf(exp,size, "READCHECK[Kd](%d)", cmd[1]); break;
|
||||
case ICLASS_CMD_CHECK: snprintf(exp,size,"CHECK"); break;
|
||||
case ICLASS_CMD_CHECK_KC:
|
||||
case ICLASS_CMD_CHECK_KD: snprintf(exp,size, "CHECK"); break;
|
||||
case ICLASS_CMD_DETECT: snprintf(exp,size, "DETECT"); break;
|
||||
case ICLASS_CMD_HALT: snprintf(exp,size, "HALT"); break;
|
||||
case ICLASS_CMD_UPDATE: snprintf(exp,size, "UPDATE(%d)",cmd[1]); break;
|
||||
|
|
@ -901,6 +901,13 @@ uint16_t printTraceLine(uint16_t tracepos, uint16_t traceLen, uint8_t *trace, ui
|
|||
}
|
||||
}
|
||||
|
||||
// adjust for different time scales
|
||||
if (protocol == ICLASS || protocol == ISO_15693) {
|
||||
first_timestamp *= 32;
|
||||
timestamp *= 32;
|
||||
duration *= 32;
|
||||
}
|
||||
|
||||
//Check the CRC status
|
||||
uint8_t crcStatus = 2;
|
||||
|
||||
|
|
@ -940,6 +947,7 @@ uint16_t printTraceLine(uint16_t tracepos, uint16_t traceLen, uint8_t *trace, ui
|
|||
uint8_t parityBits = parityBytes[j>>3];
|
||||
if (protocol != ISO_14443B
|
||||
&& protocol != ISO_15693
|
||||
&& protocol != ICLASS
|
||||
&& protocol != ISO_7816_4
|
||||
&& (isResponse || protocol == ISO_14443A)
|
||||
&& (oddparity8(frame[j]) != ((parityBits >> (7-(j&0x0007))) & 0x01))) {
|
||||
|
|
@ -950,8 +958,7 @@ uint16_t printTraceLine(uint16_t tracepos, uint16_t traceLen, uint8_t *trace, ui
|
|||
}
|
||||
|
||||
if (markCRCBytes) {
|
||||
if(crcStatus == 0 || crcStatus == 1)
|
||||
{//CRC-command
|
||||
if (crcStatus == 0 || crcStatus == 1) { //CRC-command
|
||||
char *pos1 = line[(data_len-2)/16]+(((data_len-2) % 16) * 4);
|
||||
(*pos1) = '[';
|
||||
char *pos2 = line[(data_len)/16]+(((data_len) % 16) * 4);
|
||||
|
|
@ -967,8 +974,12 @@ uint16_t printTraceLine(uint16_t tracepos, uint16_t traceLen, uint8_t *trace, ui
|
|||
}
|
||||
|
||||
if (data_len == 0) {
|
||||
if (protocol == ICLASS && duration == 2048) {
|
||||
sprintf(line[0], " <SOF>");
|
||||
} else {
|
||||
sprintf(line[0], " <empty trace - possible error>");
|
||||
}
|
||||
}
|
||||
|
||||
//--- Draw the CRC column
|
||||
char *crc = (crcStatus == 0 ? "!crc" : (crcStatus == 1 ? " ok " : " "));
|
||||
|
|
@ -978,8 +989,7 @@ uint16_t printTraceLine(uint16_t tracepos, uint16_t traceLen, uint8_t *trace, ui
|
|||
if (protocol == PROTO_MIFARE)
|
||||
annotateMifare(explanation, sizeof(explanation), frame, data_len, parityBytes, parity_len, isResponse);
|
||||
|
||||
if(!isResponse)
|
||||
{
|
||||
if (!isResponse) {
|
||||
switch(protocol) {
|
||||
case ICLASS: annotateIclass(explanation,sizeof(explanation),frame,data_len); break;
|
||||
case ISO_14443A: annotateIso14443a(explanation,sizeof(explanation),frame,data_len); break;
|
||||
|
|
@ -1027,6 +1037,11 @@ uint16_t printTraceLine(uint16_t tracepos, uint16_t traceLen, uint8_t *trace, ui
|
|||
|
||||
if (showWaitCycles && !isResponse && next_record_is_response(tracepos, trace)) {
|
||||
uint32_t next_timestamp = *((uint32_t *)(trace + tracepos));
|
||||
// adjust for different time scales
|
||||
if (protocol == ICLASS || protocol == ISO_15693) {
|
||||
next_timestamp *= 32;
|
||||
}
|
||||
|
||||
PrintAndLog(" %10d | %10d | %s | fdt (Frame Delay Time): %d",
|
||||
(EndOfTransmissionTimestamp - first_timestamp),
|
||||
(next_timestamp - first_timestamp),
|
||||
|
|
|
|||
|
|
@ -240,6 +240,7 @@ void doMAC(uint8_t *cc_nr_p, uint8_t *div_key_p, uint8_t mac[4])
|
|||
//free(cc_nr);
|
||||
return;
|
||||
}
|
||||
|
||||
void doMAC_N(uint8_t *address_data_p, uint8_t address_data_size, uint8_t *div_key_p, uint8_t mac[4])
|
||||
{
|
||||
uint8_t *address_data;
|
||||
|
|
|
|||
|
|
@ -401,8 +401,7 @@ int bruteforceItem(dumpdata item, uint16_t keytable[]) {
|
|||
break;
|
||||
}
|
||||
brute++;
|
||||
if((brute & 0xFFFF) == 0)
|
||||
{
|
||||
if ((brute & 0xFFFF) == 0) {
|
||||
printf("%d",(brute >> 16) & 0xFF);
|
||||
fflush(stdout);
|
||||
}
|
||||
|
|
@ -420,7 +419,6 @@ int bruteforceItem(dumpdata item, uint16_t keytable[]) {
|
|||
keytable[bytes_to_recover[i]] &= ~BEING_CRACKED;
|
||||
keytable[bytes_to_recover[i]] |= CRACKED;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
return errors;
|
||||
|
|
|
|||
|
|
@ -1,8 +1,8 @@
|
|||
// ISO15693 commons
|
||||
// Adrian Dabrowski 2010 and others, GPLv2
|
||||
|
||||
#ifndef ISO15693_H__
|
||||
#define ISO15693_H__
|
||||
#ifndef ISO15693TOOLS_H__
|
||||
#define ISO15693TOOLS_H__
|
||||
|
||||
// ISO15693 CRC
|
||||
#define ISO15693_CRC_PRESET (uint16_t)0xFFFF
|
||||
|
|
|
|||
|
|
@ -96,7 +96,8 @@ NXP/Philips CUSTOM COMMANDS
|
|||
#define ICLASS_CMD_PAGESEL 0x84
|
||||
#define ICLASS_CMD_READCHECK_KD 0x88
|
||||
#define ICLASS_CMD_READCHECK_KC 0x18
|
||||
#define ICLASS_CMD_CHECK 0x05
|
||||
#define ICLASS_CMD_CHECK_KC 0x95
|
||||
#define ICLASS_CMD_CHECK_KD 0x05
|
||||
#define ICLASS_CMD_DETECT 0x0F
|
||||
#define ICLASS_CMD_HALT 0x00
|
||||
#define ICLASS_CMD_UPDATE 0x87
|
||||
|
|
|
|||
BIN
fpga/fpga_hf.bit
BIN
fpga/fpga_hf.bit
Binary file not shown.
|
|
@ -33,23 +33,41 @@ module hi_simulate(
|
|||
output dbg;
|
||||
input [2:0] mod_type;
|
||||
|
||||
assign adc_clk = ck_1356meg;
|
||||
|
||||
// The comparator with hysteresis on the output from the peak detector.
|
||||
reg after_hysteresis;
|
||||
assign adc_clk = ck_1356meg;
|
||||
reg [11:0] has_been_low_for;
|
||||
|
||||
always @(negedge adc_clk)
|
||||
begin
|
||||
if(& adc_d[7:5]) after_hysteresis = 1'b1; // if (adc_d >= 224)
|
||||
else if(~(| adc_d[7:5])) after_hysteresis = 1'b0; // if (adc_d <= 31)
|
||||
if (& adc_d[7:5]) after_hysteresis <= 1'b1; // if (adc_d >= 224)
|
||||
else if (~(| adc_d[7:5])) after_hysteresis <= 1'b0; // if (adc_d <= 31)
|
||||
|
||||
if (adc_d >= 224)
|
||||
begin
|
||||
has_been_low_for <= 12'd0;
|
||||
end
|
||||
else
|
||||
begin
|
||||
if (has_been_low_for == 12'd4095)
|
||||
begin
|
||||
has_been_low_for <= 12'd0;
|
||||
after_hysteresis <= 1'b1;
|
||||
end
|
||||
else
|
||||
begin
|
||||
has_been_low_for <= has_been_low_for + 1;
|
||||
end
|
||||
end
|
||||
end
|
||||
|
||||
|
||||
// Divide 13.56 MHz to produce various frequencies for SSP_CLK
|
||||
// and modulation.
|
||||
reg [7:0] ssp_clk_divider;
|
||||
reg [8:0] ssp_clk_divider;
|
||||
|
||||
always @(posedge adc_clk)
|
||||
always @(negedge adc_clk)
|
||||
ssp_clk_divider <= (ssp_clk_divider + 1);
|
||||
|
||||
reg ssp_clk;
|
||||
|
|
@ -58,35 +76,37 @@ always @(negedge adc_clk)
|
|||
begin
|
||||
if (mod_type == `FPGA_HF_SIMULATOR_MODULATE_424K_8BIT)
|
||||
// Get bit every at 53KHz (every 8th carrier bit of 424kHz)
|
||||
ssp_clk <= ssp_clk_divider[7];
|
||||
ssp_clk <= ~ssp_clk_divider[7];
|
||||
else if (mod_type == `FPGA_HF_SIMULATOR_MODULATE_212K)
|
||||
// Get next bit at 212kHz
|
||||
ssp_clk <= ssp_clk_divider[5];
|
||||
ssp_clk <= ~ssp_clk_divider[5];
|
||||
else
|
||||
// Get next bit at 424Khz
|
||||
ssp_clk <= ssp_clk_divider[4];
|
||||
ssp_clk <= ~ssp_clk_divider[4];
|
||||
end
|
||||
|
||||
|
||||
// Divide SSP_CLK by 8 to produce the byte framing signal; the phase of
|
||||
// this is arbitrary, because it's just a bitstream.
|
||||
// One nasty issue, though: I can't make it work with both rx and tx at
|
||||
// once. The phase wrt ssp_clk must be changed. TODO to find out why
|
||||
// that is and make a better fix.
|
||||
reg [2:0] ssp_frame_divider_to_arm;
|
||||
always @(posedge ssp_clk)
|
||||
ssp_frame_divider_to_arm <= (ssp_frame_divider_to_arm + 1);
|
||||
reg [2:0] ssp_frame_divider_from_arm;
|
||||
always @(negedge ssp_clk)
|
||||
ssp_frame_divider_from_arm <= (ssp_frame_divider_from_arm + 1);
|
||||
|
||||
|
||||
// Produce the byte framing signal; the phase of this signal
|
||||
// is arbitrary, because it's just a bit stream in this module.
|
||||
reg ssp_frame;
|
||||
always @(ssp_frame_divider_to_arm or ssp_frame_divider_from_arm or mod_type)
|
||||
if(mod_type == `FPGA_HF_SIMULATOR_NO_MODULATION) // not modulating, so listening, to ARM
|
||||
ssp_frame = (ssp_frame_divider_to_arm == 3'b000);
|
||||
always @(negedge adc_clk)
|
||||
begin
|
||||
if (mod_type == `FPGA_HF_SIMULATOR_MODULATE_212K)
|
||||
begin
|
||||
if (ssp_clk_divider[8:5] == 4'd1)
|
||||
ssp_frame <= 1'b1;
|
||||
if (ssp_clk_divider[8:5] == 4'd5)
|
||||
ssp_frame <= 1'b0;
|
||||
end
|
||||
else
|
||||
ssp_frame = (ssp_frame_divider_from_arm == 3'b000);
|
||||
begin
|
||||
if (ssp_clk_divider[7:4] == 4'd1)
|
||||
ssp_frame <= 1'b1;
|
||||
if (ssp_clk_divider[7:4] == 4'd5)
|
||||
ssp_frame <= 1'b0;
|
||||
end
|
||||
end
|
||||
|
||||
|
||||
// Synchronize up the after-hysteresis signal, to produce DIN.
|
||||
reg ssp_din;
|
||||
|
|
@ -112,7 +132,7 @@ always @(*)
|
|||
// modulation than a real tag would.
|
||||
assign pwr_hi = 1'b0; // HF antenna connected to GND
|
||||
assign pwr_oe3 = 1'b0; // 10k Load
|
||||
assign pwr_oe1 = modulating_carrier; // 33 Ohms Load
|
||||
assign pwr_oe1 = 1'b0; // 33 Ohms Load
|
||||
assign pwr_oe4 = modulating_carrier; // 33 Ohms Load
|
||||
|
||||
// This is all LF and doesn't matter
|
||||
|
|
@ -120,6 +140,6 @@ assign pwr_lo = 1'b0;
|
|||
assign pwr_oe2 = 1'b0;
|
||||
|
||||
|
||||
assign dbg = ssp_din;
|
||||
assign dbg = ssp_frame;
|
||||
|
||||
endmodule
|
||||
|
|
|
|||
|
|
@ -235,7 +235,7 @@ typedef struct{
|
|||
#define FLAG_RANDOM_NONCE (1<<5)
|
||||
|
||||
|
||||
//Iclass reader flags
|
||||
// iCLASS reader flags
|
||||
#define FLAG_ICLASS_READER_ONLY_ONCE 0x01
|
||||
#define FLAG_ICLASS_READER_CC 0x02
|
||||
#define FLAG_ICLASS_READER_CSN 0x04
|
||||
|
|
@ -244,6 +244,14 @@ typedef struct{
|
|||
#define FLAG_ICLASS_READER_ONE_TRY 0x20
|
||||
#define FLAG_ICLASS_READER_CEDITKEY 0x40
|
||||
|
||||
// iCLASS simulation modes
|
||||
#define ICLASS_SIM_MODE_CSN 0
|
||||
#define ICLASS_SIM_MODE_CSN_DEFAULT 1
|
||||
#define ICLASS_SIM_MODE_READER_ATTACK 2
|
||||
#define ICLASS_SIM_MODE_FULL 3
|
||||
#define ICLASS_SIM_MODE_READER_ATTACK_KEYROLL 4
|
||||
#define ICLASS_SIM_MODE_EXIT_AFTER_MAC 5 // note: device internal only
|
||||
|
||||
|
||||
// hw tune args
|
||||
#define FLAG_TUNE_LF 1
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue