Merge pull request #862 from pwpiwi/fix_iclass_sim

fix hf iclass sim:
* sim 2: add responses to read(1) (Config) and read(5) (AIA)
* sim 2/3: don't restrict CC to 00 bytes only
* sim 3: add responding to read block commands
* sim 2/3: add responding to READ_CHECK_KC
* fix sizes of pre-encoded tag answers
* sim 2: change default card challenge
* remove commented code
* use #defines instead of numerical constants for simulation modes
* some reformatting and whitespace fixes
* fix debug print on unhandled commands
* deduplicate: use sim functions from iso15693.c
* fix times in tracelog and 'hf list iclass' (sim only)
* don't check parity in 'hf list iclass'
* fix timing in TransmitTo15693Reader()
* add simulation of block 3 and 4 (Kd and Kc) reads
* add simulation of READ4 (4 blocks read)
* FPGA change (hi_simulate.v): avoid spp_clk phase changes
* chg to reader command decoder in iso15693.c (require no modulation before SOF)
* add 'has_been_low_for' logic to hi_simulate.v (same as in other FPGA modes, default to "no modulation")
* add simulation of chip status (IDLE, ACTIVE, SELECTED, HALTED)
* check ACSN on SELECT
* add simulation of RESELECT
* always check length of reader commands
* fix printing of NR, MAC in sim 2 mode
* fix response length to CHECK command
* implement UPDATE and CHECK[Kc]
* add simulation of multiple pages (PAGESEL by @sherhannn9)
* maintain cipher states per page
* update cipher state after UPDATE commands (@sherhannn9)
* add simulation of personalization mode
* respond with SOF on HALT
* display "\<SOF\>" instead of "0f" in 'hf list iclass'
* standard LED handling
* speedup CodeIso15693AsTag()
* TransmitTo15693Tag(): don't send unmodulated start of SOF
* reduce modulation depth in hi_simulate.v
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pwpiwi 2019-10-21 21:25:44 +02:00 committed by GitHub
commit b41be3cb11
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12 changed files with 882 additions and 775 deletions

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@ -21,21 +21,21 @@
// //
// VCD (reader) -> VICC (tag) // VCD (reader) -> VICC (tag)
// 1 out of 256: // 1 out of 256:
// data rate: 1,66 kbit/s (fc/8192) // data rate: 1,66 kbit/s (fc/8192)
// used for long range // used for long range
// 1 out of 4: // 1 out of 4:
// data rate: 26,48 kbit/s (fc/512) // data rate: 26,48 kbit/s (fc/512)
// used for short range, high speed // used for short range, high speed
// //
// VICC (tag) -> VCD (reader) // VICC (tag) -> VCD (reader)
// Modulation: // Modulation:
// ASK / one subcarrier (423,75 khz) // ASK / one subcarrier (423,75 khz)
// FSK / two subcarriers (423,75 khz && 484,28 khz) // FSK / two subcarriers (423,75 khz && 484,28 khz)
// Data Rates / Modes: // Data Rates / Modes:
// low ASK: 6,62 kbit/s // low ASK: 6,62 kbit/s
// low FSK: 6.67 kbit/s // low FSK: 6.67 kbit/s
// high ASK: 26,48 kbit/s // high ASK: 26,48 kbit/s
// high FSK: 26,69 kbit/s // high FSK: 26,69 kbit/s
//----------------------------------------------------------------------------- //-----------------------------------------------------------------------------
@ -68,27 +68,14 @@ static int DEBUG = 0;
/////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////
// ISO 15693 Part 2 - Air Interface // ISO 15693 Part 2 - Air Interface
// This section basicly contains transmission and receiving of bits // This section basically contains transmission and receiving of bits
/////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////
#define Crc(data,datalen) Iso15693Crc(data,datalen)
#define AddCrc(data,datalen) Iso15693AddCrc(data,datalen)
#define sprintUID(target,uid) Iso15693sprintUID(target,uid)
// buffers // buffers
#define ISO15693_DMA_BUFFER_SIZE 2048 // must be a power of 2 #define ISO15693_DMA_BUFFER_SIZE 2048 // must be a power of 2
#define ISO15693_MAX_RESPONSE_LENGTH 36 // allows read single block with the maximum block size of 256bits. Read multiple blocks not supported yet #define ISO15693_MAX_RESPONSE_LENGTH 36 // allows read single block with the maximum block size of 256bits. Read multiple blocks not supported yet
#define ISO15693_MAX_COMMAND_LENGTH 45 // allows write single block with the maximum block size of 256bits. Write multiple blocks not supported yet #define ISO15693_MAX_COMMAND_LENGTH 45 // allows write single block with the maximum block size of 256bits. Write multiple blocks not supported yet
// timing. Delays in SSP_CLK ticks.
// SSP_CLK runs at 13,56MHz / 32 = 423.75kHz when simulating a tag
#define DELAY_READER_TO_ARM_SIM 8
#define DELAY_ARM_TO_READER_SIM 1
#define DELAY_ISO15693_VCD_TO_VICC_SIM 132 // 132/423.75kHz = 311.5us from end of command EOF to start of tag response
//SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when acting as reader
#define DELAY_ISO15693_VCD_TO_VICC_READER 1056 // 1056/3,39MHz = 311.5us from end of command EOF to start of tag response
#define DELAY_ISO15693_VICC_TO_VCD_READER 1017 // 1017/3.39MHz = 300us between end of tag response and next reader command
// --------------------------- // ---------------------------
// Signal Processing // Signal Processing
// --------------------------- // ---------------------------
@ -228,42 +215,80 @@ static void CodeIso15693AsReader256(uint8_t *cmd, int n)
} }
static void CodeIso15693AsTag(uint8_t *cmd, int n) // static uint8_t encode4Bits(const uint8_t b) {
{ // uint8_t c = b & 0xF;
// // OTA, the least significant bits first
// // The columns are
// // 1 - Bit value to send
// // 2 - Reversed (big-endian)
// // 3 - Manchester Encoded
// // 4 - Hex values
// switch(c){
// // 1 2 3 4
// case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
// case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
// case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
// case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
// case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
// case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
// case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
// case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
// case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
// case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
// case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
// case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
// case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
// case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
// case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
// default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
// }
// }
static const uint8_t encode_4bits[16] = { 0xaa, 0x6a, 0x9a, 0x5a, 0xa6, 0x66, 0x96, 0x56, 0xa9, 0x69, 0x99, 0x59, 0xa5, 0x65, 0x95, 0x55 };
void CodeIso15693AsTag(uint8_t *cmd, size_t len) {
/*
* SOF comprises 3 parts;
* * An unmodulated time of 56.64 us
* * 24 pulses of 423.75 kHz (fc/32)
* * A logic 1, which starts with an unmodulated time of 18.88us
* followed by 8 pulses of 423.75kHz (fc/32)
*
* EOF comprises 3 parts:
* - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
* time of 18.88us.
* - 24 pulses of fc/32
* - An unmodulated time of 56.64 us
*
* A logic 0 starts with 8 pulses of fc/32
* followed by an unmodulated time of 256/fc (~18,88us).
*
* A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
* 8 pulses of fc/32 (also 18.88us)
*
* A bit here becomes 8 pulses of fc/32. Therefore:
* The SOF can be written as 00011101 = 0x1D
* The EOF can be written as 10111000 = 0xb8
* A logic 1 is 01
* A logic 0 is 10
*
* */
ToSendReset(); ToSendReset();
// SOF // SOF
ToSendStuffBit(0); ToSend[++ToSendMax] = 0x1D; // 00011101
ToSendStuffBit(0);
ToSendStuffBit(0);
ToSendStuffBit(1);
ToSendStuffBit(1);
ToSendStuffBit(1);
ToSendStuffBit(0);
ToSendStuffBit(1);
// data // data
for(int i = 0; i < n; i++) { for (int i = 0; i < len; i++) {
for(int j = 0; j < 8; j++) { ToSend[++ToSendMax] = encode_4bits[cmd[i] & 0xF];
if ((cmd[i] >> j) & 0x01) { ToSend[++ToSendMax] = encode_4bits[cmd[i] >> 4];
ToSendStuffBit(0);
ToSendStuffBit(1);
} else {
ToSendStuffBit(1);
ToSendStuffBit(0);
}
}
} }
// EOF // EOF
ToSendStuffBit(1); ToSend[++ToSendMax] = 0xB8; // 10111000
ToSendStuffBit(0);
ToSendStuffBit(1);
ToSendStuffBit(1);
ToSendStuffBit(1);
ToSendStuffBit(0);
ToSendStuffBit(0);
ToSendStuffBit(0);
ToSendMax++; ToSendMax++;
} }
@ -297,40 +322,52 @@ static void TransmitTo15693Tag(const uint8_t *cmd, int len, uint32_t start_time)
//----------------------------------------------------------------------------- //-----------------------------------------------------------------------------
// Transmit the tag response (to the reader) that was placed in cmd[]. // Transmit the tag response (to the reader) that was placed in cmd[].
//----------------------------------------------------------------------------- //-----------------------------------------------------------------------------
static void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t start_time, bool slow) void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t *start_time, uint32_t slot_time, bool slow) {
{
// don't use the FPGA_HF_SIMULATOR_MODULATE_424K_8BIT minor mode. It would spoil GetCountSspClk() // don't use the FPGA_HF_SIMULATOR_MODULATE_424K_8BIT minor mode. It would spoil GetCountSspClk()
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K);
uint8_t shift_delay = start_time & 0x00000007; uint32_t modulation_start_time = *start_time + 3 * 8; // no need to transfer the unmodulated start of SOF
uint8_t bitmask = 0x00;
for (int i = 0; i < shift_delay; i++) { while (GetCountSspClk() > (modulation_start_time & 0xfffffff8) + 3) { // we will miss the intended time
bitmask |= (0x01 << i); if (slot_time) {
modulation_start_time += slot_time; // use next available slot
} else {
modulation_start_time = (modulation_start_time & 0xfffffff8) + 8; // next possible time
}
} }
while (GetCountSspClk() < (start_time & 0xfffffff8)) ; while (GetCountSspClk() < (modulation_start_time & 0xfffffff8))
/* wait */ ;
AT91C_BASE_SSC->SSC_THR = 0x00; // clear TXRDY uint8_t shift_delay = modulation_start_time & 0x00000007;
*start_time = modulation_start_time - 3 * 8;
LED_C_ON(); LED_C_ON();
uint8_t bits_to_shift = 0x00; uint8_t bits_to_shift = 0x00;
for(size_t c = 0; c <= len; c++) { uint8_t bits_to_send = 0x00;
uint8_t bits_to_send = bits_to_shift << (8 - shift_delay) | (c==len?0x00:cmd[c]) >> shift_delay; for (size_t c = 0; c < len; c++) {
bits_to_shift = cmd[c] & bitmask; for (int i = (c==0?4:7); i >= 0; i--) {
for (int i = 7; i >= 0; i--) { uint8_t cmd_bits = ((cmd[c] >> i) & 0x01) ? 0xff : 0x00;
for (int j = 0; j < (slow?4:1); ) { for (int j = 0; j < (slow?4:1); ) {
if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) { if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
if (bits_to_send >> i & 0x01) { bits_to_send = bits_to_shift << (8 - shift_delay) | cmd_bits >> shift_delay;
AT91C_BASE_SSC->SSC_THR = 0xff; AT91C_BASE_SSC->SSC_THR = bits_to_send;
} else { bits_to_shift = cmd_bits;
AT91C_BASE_SSC->SSC_THR = 0x00;
}
j++; j++;
} }
WDT_HIT();
} }
} }
} WDT_HIT();
}
// send the remaining bits, padded with 0:
bits_to_send = bits_to_shift << (8 - shift_delay);
for ( ; ; ) {
if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
AT91C_BASE_SSC->SSC_THR = bits_to_send;
break;
}
}
LED_C_OFF(); LED_C_OFF();
} }
@ -615,7 +652,7 @@ static int GetIso15693AnswerFromTag(uint8_t* response, uint16_t max_len, int tim
BigBuf_free(); BigBuf_free();
if (DEBUG) Dbprintf("samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d", if (DEBUG) Dbprintf("samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d",
samples, gotFrame, DecodeTag.state, DecodeTag.len, DecodeTag.bitCount, DecodeTag.posCount); samples, gotFrame, DecodeTag.state, DecodeTag.len, DecodeTag.bitCount, DecodeTag.posCount);
if (DecodeTag.len > 0) { if (DecodeTag.len > 0) {
LogTrace(DecodeTag.output, DecodeTag.len, 0, 0, NULL, false); LogTrace(DecodeTag.output, DecodeTag.len, 0, 0, NULL, false);
@ -641,6 +678,7 @@ static int GetIso15693AnswerFromTag(uint8_t* response, uint16_t max_len, int tim
typedef struct DecodeReader { typedef struct DecodeReader {
enum { enum {
STATE_READER_UNSYNCD, STATE_READER_UNSYNCD,
STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF,
STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF, STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF,
STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF, STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF,
STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF, STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF,
@ -657,7 +695,7 @@ typedef struct DecodeReader {
int byteCount; int byteCount;
int byteCountMax; int byteCountMax;
int posCount; int posCount;
int sum1, sum2; int sum1, sum2;
uint8_t *output; uint8_t *output;
} DecodeReader_t; } DecodeReader_t;
@ -682,9 +720,16 @@ static void DecodeReaderReset(DecodeReader_t* DecodeReader)
static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uint8_t bit, DecodeReader_t *restrict DecodeReader) static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uint8_t bit, DecodeReader_t *restrict DecodeReader)
{ {
switch(DecodeReader->state) { switch (DecodeReader->state) {
case STATE_READER_UNSYNCD: case STATE_READER_UNSYNCD:
if(!bit) { // wait for unmodulated carrier
if (bit) {
DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
}
break;
case STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF:
if (!bit) {
// we went low, so this could be the beginning of a SOF // we went low, so this could be the beginning of a SOF
DecodeReader->posCount = 1; DecodeReader->posCount = 1;
DecodeReader->state = STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF; DecodeReader->state = STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF;
@ -693,14 +738,14 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
case STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF: case STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF:
DecodeReader->posCount++; DecodeReader->posCount++;
if(bit) { // detected rising edge if (bit) { // detected rising edge
if(DecodeReader->posCount < 4) { // rising edge too early (nominally expected at 5) if (DecodeReader->posCount < 4) { // rising edge too early (nominally expected at 5)
DecodeReaderReset(DecodeReader); DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
} else { // SOF } else { // SOF
DecodeReader->state = STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF; DecodeReader->state = STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF;
} }
} else { } else {
if(DecodeReader->posCount > 5) { // stayed low for too long if (DecodeReader->posCount > 5) { // stayed low for too long
DecodeReaderReset(DecodeReader); DecodeReaderReset(DecodeReader);
} else { } else {
// do nothing, keep waiting // do nothing, keep waiting
@ -710,7 +755,7 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
case STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF: case STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF:
DecodeReader->posCount++; DecodeReader->posCount++;
if(!bit) { // detected a falling edge if (!bit) { // detected a falling edge
if (DecodeReader->posCount < 20) { // falling edge too early (nominally expected at 21 earliest) if (DecodeReader->posCount < 20) { // falling edge too early (nominally expected at 21 earliest)
DecodeReaderReset(DecodeReader); DecodeReaderReset(DecodeReader);
} else if (DecodeReader->posCount < 23) { // SOF for 1 out of 4 coding } else if (DecodeReader->posCount < 23) { // SOF for 1 out of 4 coding
@ -718,13 +763,13 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF; DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
} else if (DecodeReader->posCount < 28) { // falling edge too early (nominally expected at 29 latest) } else if (DecodeReader->posCount < 28) { // falling edge too early (nominally expected at 29 latest)
DecodeReaderReset(DecodeReader); DecodeReaderReset(DecodeReader);
} else { // SOF for 1 out of 4 coding } else { // SOF for 1 out of 256 coding
DecodeReader->Coding = CODING_1_OUT_OF_256; DecodeReader->Coding = CODING_1_OUT_OF_256;
DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF; DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
} }
} else { } else {
if(DecodeReader->posCount > 29) { // stayed high for too long if (DecodeReader->posCount > 29) { // stayed high for too long
DecodeReaderReset(DecodeReader); DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
} else { } else {
// do nothing, keep waiting // do nothing, keep waiting
} }
@ -736,7 +781,7 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
if (bit) { // detected rising edge if (bit) { // detected rising edge
if (DecodeReader->Coding == CODING_1_OUT_OF_256) { if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
if (DecodeReader->posCount < 32) { // rising edge too early (nominally expected at 33) if (DecodeReader->posCount < 32) { // rising edge too early (nominally expected at 33)
DecodeReaderReset(DecodeReader); DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
} else { } else {
DecodeReader->posCount = 1; DecodeReader->posCount = 1;
DecodeReader->bitCount = 0; DecodeReader->bitCount = 0;
@ -747,21 +792,22 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
} }
} else { // CODING_1_OUT_OF_4 } else { // CODING_1_OUT_OF_4
if (DecodeReader->posCount < 24) { // rising edge too early (nominally expected at 25) if (DecodeReader->posCount < 24) { // rising edge too early (nominally expected at 25)
DecodeReaderReset(DecodeReader); DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
} else { } else {
DecodeReader->posCount = 1;
DecodeReader->state = STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4; DecodeReader->state = STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4;
} }
} }
} else { } else {
if (DecodeReader->Coding == CODING_1_OUT_OF_256) { if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
if (DecodeReader->posCount > 34) { // signal stayed low for too long if (DecodeReader->posCount > 34) { // signal stayed low for too long
DecodeReaderReset(DecodeReader); DecodeReaderReset(DecodeReader);
} else { } else {
// do nothing, keep waiting // do nothing, keep waiting
} }
} else { // CODING_1_OUT_OF_4 } else { // CODING_1_OUT_OF_4
if (DecodeReader->posCount > 26) { // signal stayed low for too long if (DecodeReader->posCount > 26) { // signal stayed low for too long
DecodeReaderReset(DecodeReader); DecodeReaderReset(DecodeReader);
} else { } else {
// do nothing, keep waiting // do nothing, keep waiting
} }
@ -772,7 +818,7 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
case STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4: case STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4:
DecodeReader->posCount++; DecodeReader->posCount++;
if (bit) { if (bit) {
if (DecodeReader->posCount == 33) { if (DecodeReader->posCount == 9) {
DecodeReader->posCount = 1; DecodeReader->posCount = 1;
DecodeReader->bitCount = 0; DecodeReader->bitCount = 0;
DecodeReader->byteCount = 0; DecodeReader->byteCount = 0;
@ -788,6 +834,7 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
break; break;
case STATE_READER_RECEIVE_DATA_1_OUT_OF_4: case STATE_READER_RECEIVE_DATA_1_OUT_OF_4:
bit = !!bit;
DecodeReader->posCount++; DecodeReader->posCount++;
if (DecodeReader->posCount == 1) { if (DecodeReader->posCount == 1) {
DecodeReader->sum1 = bit; DecodeReader->sum1 = bit;
@ -800,17 +847,14 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
} }
if (DecodeReader->posCount == 8) { if (DecodeReader->posCount == 8) {
DecodeReader->posCount = 0; DecodeReader->posCount = 0;
int corr10 = DecodeReader->sum1 - DecodeReader->sum2; if (DecodeReader->sum1 <= 1 && DecodeReader->sum2 >= 3) { // EOF
int corr01 = DecodeReader->sum2 - DecodeReader->sum1;
int corr11 = (DecodeReader->sum1 + DecodeReader->sum2) / 2;
if (corr01 > corr11 && corr01 > corr10) { // EOF
LED_B_OFF(); // Finished receiving LED_B_OFF(); // Finished receiving
DecodeReaderReset(DecodeReader); DecodeReaderReset(DecodeReader);
if (DecodeReader->byteCount != 0) { if (DecodeReader->byteCount != 0) {
return true; return true;
} }
} }
if (corr10 > corr11) { // detected a 2bit position if (DecodeReader->sum1 >= 3 && DecodeReader->sum2 <= 1) { // detected a 2bit position
DecodeReader->shiftReg >>= 2; DecodeReader->shiftReg >>= 2;
DecodeReader->shiftReg |= (DecodeReader->bitCount << 6); DecodeReader->shiftReg |= (DecodeReader->bitCount << 6);
} }
@ -830,6 +874,7 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
break; break;
case STATE_READER_RECEIVE_DATA_1_OUT_OF_256: case STATE_READER_RECEIVE_DATA_1_OUT_OF_256:
bit = !!bit;
DecodeReader->posCount++; DecodeReader->posCount++;
if (DecodeReader->posCount == 1) { if (DecodeReader->posCount == 1) {
DecodeReader->sum1 = bit; DecodeReader->sum1 = bit;
@ -842,17 +887,14 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
} }
if (DecodeReader->posCount == 8) { if (DecodeReader->posCount == 8) {
DecodeReader->posCount = 0; DecodeReader->posCount = 0;
int corr10 = DecodeReader->sum1 - DecodeReader->sum2; if (DecodeReader->sum1 <= 1 && DecodeReader->sum2 >= 3) { // EOF
int corr01 = DecodeReader->sum2 - DecodeReader->sum1;
int corr11 = (DecodeReader->sum1 + DecodeReader->sum2) / 2;
if (corr01 > corr11 && corr01 > corr10) { // EOF
LED_B_OFF(); // Finished receiving LED_B_OFF(); // Finished receiving
DecodeReaderReset(DecodeReader); DecodeReaderReset(DecodeReader);
if (DecodeReader->byteCount != 0) { if (DecodeReader->byteCount != 0) {
return true; return true;
} }
} }
if (corr10 > corr11) { // detected the bit position if (DecodeReader->sum1 >= 3 && DecodeReader->sum2 <= 1) { // detected the bit position
DecodeReader->shiftReg = DecodeReader->bitCount; DecodeReader->shiftReg = DecodeReader->bitCount;
} }
if (DecodeReader->bitCount == 255) { // we have a full byte if (DecodeReader->bitCount == 255) { // we have a full byte
@ -881,19 +923,18 @@ static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uin
// Receive a command (from the reader to us, where we are the simulated tag), // Receive a command (from the reader to us, where we are the simulated tag),
// and store it in the given buffer, up to the given maximum length. Keeps // and store it in the given buffer, up to the given maximum length. Keeps
// spinning, waiting for a well-framed command, until either we get one // spinning, waiting for a well-framed command, until either we get one
// (returns true) or someone presses the pushbutton on the board (false). // (returns len) or someone presses the pushbutton on the board (returns -1).
// //
// Assume that we're called with the SSC (to the FPGA) and ADC path set // Assume that we're called with the SSC (to the FPGA) and ADC path set
// correctly. // correctly.
//----------------------------------------------------------------------------- //-----------------------------------------------------------------------------
static int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time) int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time) {
{
int samples = 0; int samples = 0;
bool gotFrame = false; bool gotFrame = false;
uint8_t b; uint8_t b;
uint8_t *dmaBuf = BigBuf_malloc(ISO15693_DMA_BUFFER_SIZE); uint8_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
// the decoder data structure // the decoder data structure
DecodeReader_t DecodeReader = {0}; DecodeReader_t DecodeReader = {0};
@ -910,21 +951,21 @@ static int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint3
(void) temp; (void) temp;
while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) ; while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) ;
uint32_t bit_time = GetCountSspClk() & 0xfffffff8; uint32_t dma_start_time = GetCountSspClk() & 0xfffffff8;
// Setup and start DMA. // Setup and start DMA.
FpgaSetupSscDma(dmaBuf, ISO15693_DMA_BUFFER_SIZE); FpgaSetupSscDma(dmaBuf, ISO15693_DMA_BUFFER_SIZE);
uint8_t *upTo = dmaBuf; uint8_t *upTo = dmaBuf;
for(;;) { for (;;) {
uint16_t behindBy = ((uint8_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1); uint16_t behindBy = ((uint8_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
if (behindBy == 0) continue; if (behindBy == 0) continue;
b = *upTo++; b = *upTo++;
if(upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content. if (upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
upTo = dmaBuf; // start reading the circular buffer from the beginning upTo = dmaBuf; // start reading the circular buffer from the beginning
if(behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) { if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy); Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
break; break;
} }
@ -936,7 +977,7 @@ static int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint3
for (int i = 7; i >= 0; i--) { for (int i = 7; i >= 0; i--) {
if (Handle15693SampleFromReader((b >> i) & 0x01, &DecodeReader)) { if (Handle15693SampleFromReader((b >> i) & 0x01, &DecodeReader)) {
*eof_time = bit_time + samples - DELAY_READER_TO_ARM_SIM; // end of EOF *eof_time = dma_start_time + samples - DELAY_READER_TO_ARM_SIM; // end of EOF
gotFrame = true; gotFrame = true;
break; break;
} }
@ -948,22 +989,24 @@ static int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint3
} }
if (BUTTON_PRESS()) { if (BUTTON_PRESS()) {
DecodeReader.byteCount = 0; DecodeReader.byteCount = -1;
break; break;
} }
WDT_HIT(); WDT_HIT();
} }
FpgaDisableSscDma(); FpgaDisableSscDma();
BigBuf_free_keep_EM();
if (DEBUG) Dbprintf("samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d", if (DEBUG) Dbprintf("samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d",
samples, gotFrame, DecodeReader.state, DecodeReader.byteCount, DecodeReader.bitCount, DecodeReader.posCount); samples, gotFrame, DecodeReader.state, DecodeReader.byteCount, DecodeReader.bitCount, DecodeReader.posCount);
if (DecodeReader.byteCount > 0) { if (DecodeReader.byteCount > 0) {
LogTrace(DecodeReader.output, DecodeReader.byteCount, 0, *eof_time, NULL, true); uint32_t sof_time = *eof_time
- DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128:2048) // time for byte transfers
- 32 // time for SOF transfer
- 16; // time for EOF transfer
LogTrace(DecodeReader.output, DecodeReader.byteCount, sof_time, *eof_time, NULL, true);
} }
return DecodeReader.byteCount; return DecodeReader.byteCount;
@ -985,7 +1028,7 @@ static void BuildIdentifyRequest(void)
// no mask // no mask
cmd[2] = 0x00; cmd[2] = 0x00;
//Now the CRC //Now the CRC
crc = Crc(cmd, 3); crc = Iso15693Crc(cmd, 3);
cmd[3] = crc & 0xff; cmd[3] = crc & 0xff;
cmd[4] = crc >> 8; cmd[4] = crc >> 8;
@ -1137,7 +1180,7 @@ void SnoopIso15693(void)
ReaderIsActive = (DecodeReader.state >= STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF); ReaderIsActive = (DecodeReader.state >= STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF);
} }
if (!ReaderIsActive && ExpectTagAnswer) { // no need to try decoding tag data if the reader is currently sending or no answer expected yet if (!ReaderIsActive && ExpectTagAnswer) { // no need to try decoding tag data if the reader is currently sending or no answer expected yet
if (Handle15693SamplesFromTag(snoopdata >> 2, &DecodeTag)) { if (Handle15693SamplesFromTag(snoopdata >> 2, &DecodeTag)) {
FpgaDisableSscDma(); FpgaDisableSscDma();
//Use samples as a time measurement //Use samples as a time measurement
@ -1219,7 +1262,7 @@ static void BuildReadBlockRequest(uint8_t *uid, uint8_t blockNumber )
// Block number to read // Block number to read
cmd[10] = blockNumber; cmd[10] = blockNumber;
//Now the CRC //Now the CRC
crc = Crc(cmd, 11); // the crc needs to be calculated over 11 bytes crc = Iso15693Crc(cmd, 11); // the crc needs to be calculated over 11 bytes
cmd[11] = crc & 0xff; cmd[11] = crc & 0xff;
cmd[12] = crc >> 8; cmd[12] = crc >> 8;
@ -1246,7 +1289,7 @@ static void BuildInventoryResponse(uint8_t *uid)
cmd[8] = uid[1]; //0x05; cmd[8] = uid[1]; //0x05;
cmd[9] = uid[0]; //0xe0; cmd[9] = uid[0]; //0xe0;
//Now the CRC //Now the CRC
crc = Crc(cmd, 10); crc = Iso15693Crc(cmd, 10);
cmd[10] = crc & 0xff; cmd[10] = crc & 0xff;
cmd[11] = crc >> 8; cmd[11] = crc >> 8;
@ -1254,10 +1297,10 @@ static void BuildInventoryResponse(uint8_t *uid)
} }
// Universal Method for sending to and recv bytes from a tag // Universal Method for sending to and recv bytes from a tag
// init ... should we initialize the reader? // init ... should we initialize the reader?
// speed ... 0 low speed, 1 hi speed // speed ... 0 low speed, 1 hi speed
// *recv will contain the tag's answer // *recv will contain the tag's answer
// return: lenght of received data // return: lenght of received data
int SendDataTag(uint8_t *send, int sendlen, bool init, int speed, uint8_t *recv, uint16_t max_recv_len, uint32_t start_time) { int SendDataTag(uint8_t *send, int sendlen, bool init, int speed, uint8_t *recv, uint16_t max_recv_len, uint32_t start_time) {
LED_A_ON(); LED_A_ON();
@ -1341,7 +1384,7 @@ void DbdecodeIso15693Answer(int len, uint8_t *d) {
strncat(status,"NoErr ", DBD15STATLEN); strncat(status,"NoErr ", DBD15STATLEN);
} }
crc=Crc(d,len-2); crc=Iso15693Crc(d,len-2);
if ( (( crc & 0xff ) == d[len-2]) && (( crc >> 8 ) == d[len-1]) ) if ( (( crc & 0xff ) == d[len-2]) && (( crc >> 8 ) == d[len-1]) )
strncat(status,"CrcOK",DBD15STATLEN); strncat(status,"CrcOK",DBD15STATLEN);
else else
@ -1387,8 +1430,8 @@ void ReaderIso15693(uint32_t parameter)
FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER); FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
// Start from off (no field generated) // Start from off (no field generated)
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
SpinDelay(200); SpinDelay(200);
// Give the tags time to energize // Give the tags time to energize
LED_D_ON(); LED_D_ON();
@ -1458,7 +1501,7 @@ void ReaderIso15693(uint32_t parameter)
// for the time being, switch field off to protect rdv4.0 // for the time being, switch field off to protect rdv4.0
// note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
LED_D_OFF(); LED_D_OFF();
LED_A_OFF(); LED_A_OFF();
@ -1475,7 +1518,7 @@ void SimTagIso15693(uint32_t parameter, uint8_t *uid)
FpgaDownloadAndGo(FPGA_BITSTREAM_HF); FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
SetAdcMuxFor(GPIO_MUXSEL_HIPKD); SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR); FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
StartCountSspClk(); StartCountSspClk();
@ -1493,14 +1536,14 @@ void SimTagIso15693(uint32_t parameter, uint8_t *uid)
if ((cmd_len >= 5) && (cmd[0] & ISO15693_REQ_INVENTORY) && (cmd[1] == ISO15693_INVENTORY)) { // TODO: check more flags if ((cmd_len >= 5) && (cmd[0] & ISO15693_REQ_INVENTORY) && (cmd[1] == ISO15693_INVENTORY)) { // TODO: check more flags
bool slow = !(cmd[0] & ISO15693_REQ_DATARATE_HIGH); bool slow = !(cmd[0] & ISO15693_REQ_DATARATE_HIGH);
start_time = eof_time + DELAY_ISO15693_VCD_TO_VICC_SIM - DELAY_ARM_TO_READER_SIM; start_time = eof_time + DELAY_ISO15693_VCD_TO_VICC_SIM - DELAY_ARM_TO_READER_SIM;
TransmitTo15693Reader(ToSend, ToSendMax, start_time, slow); TransmitTo15693Reader(ToSend, ToSendMax, &start_time, 0, slow);
} }
Dbprintf("%d bytes read from reader:", cmd_len); Dbprintf("%d bytes read from reader:", cmd_len);
Dbhexdump(cmd_len, cmd, false); Dbhexdump(cmd_len, cmd, false);
} }
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
LEDsoff(); LEDsoff();
} }
@ -1526,12 +1569,12 @@ void BruteforceIso15693Afi(uint32_t speed)
data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_SLOT1; data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_SLOT1;
data[1] = ISO15693_INVENTORY; data[1] = ISO15693_INVENTORY;
data[2] = 0; // mask length data[2] = 0; // mask length
datalen = AddCrc(data,3); datalen = Iso15693AddCrc(data,3);
recvlen = SendDataTag(data, datalen, false, speed, recv, sizeof(recv), 0); recvlen = SendDataTag(data, datalen, false, speed, recv, sizeof(recv), 0);
uint32_t start_time = GetCountSspClk() + DELAY_ISO15693_VICC_TO_VCD_READER; uint32_t start_time = GetCountSspClk() + DELAY_ISO15693_VICC_TO_VCD_READER;
WDT_HIT(); WDT_HIT();
if (recvlen>=12) { if (recvlen>=12) {
Dbprintf("NoAFI UID=%s", sprintUID(NULL, &recv[2])); Dbprintf("NoAFI UID=%s", Iso15693sprintUID(NULL, &recv[2]));
} }
// now with AFI // now with AFI
@ -1543,17 +1586,17 @@ void BruteforceIso15693Afi(uint32_t speed)
for (int i = 0; i < 256; i++) { for (int i = 0; i < 256; i++) {
data[2] = i & 0xFF; data[2] = i & 0xFF;
datalen = AddCrc(data,4); datalen = Iso15693AddCrc(data,4);
recvlen = SendDataTag(data, datalen, false, speed, recv, sizeof(recv), start_time); recvlen = SendDataTag(data, datalen, false, speed, recv, sizeof(recv), start_time);
start_time = GetCountSspClk() + DELAY_ISO15693_VICC_TO_VCD_READER; start_time = GetCountSspClk() + DELAY_ISO15693_VICC_TO_VCD_READER;
WDT_HIT(); WDT_HIT();
if (recvlen >= 12) { if (recvlen >= 12) {
Dbprintf("AFI=%i UID=%s", i, sprintUID(NULL, &recv[2])); Dbprintf("AFI=%i UID=%s", i, Iso15693sprintUID(NULL, &recv[2]));
} }
} }
Dbprintf("AFI Bruteforcing done."); Dbprintf("AFI Bruteforcing done.");
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
LEDsoff(); LEDsoff();
} }
@ -1585,7 +1628,7 @@ void DirectTag15693Command(uint32_t datalen, uint32_t speed, uint32_t recv, uint
// for the time being, switch field off to protect rdv4.0 // for the time being, switch field off to protect rdv4.0
// note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
LED_D_OFF(); LED_D_OFF();
LED_A_OFF(); LED_A_OFF();
@ -1599,76 +1642,76 @@ void DirectTag15693Command(uint32_t datalen, uint32_t speed, uint32_t recv, uint
// Set the UID to the tag (based on Iceman work). // Set the UID to the tag (based on Iceman work).
void SetTag15693Uid(uint8_t *uid) void SetTag15693Uid(uint8_t *uid)
{ {
uint8_t cmd[4][9] = {0x00}; uint8_t cmd[4][9] = {0x00};
uint16_t crc; uint16_t crc;
int recvlen = 0; int recvlen = 0;
uint8_t recvbuf[ISO15693_MAX_RESPONSE_LENGTH]; uint8_t recvbuf[ISO15693_MAX_RESPONSE_LENGTH];
LED_A_ON(); LED_A_ON();
// Command 1 : 02213E00000000 // Command 1 : 02213E00000000
cmd[0][0] = 0x02; cmd[0][0] = 0x02;
cmd[0][1] = 0x21; cmd[0][1] = 0x21;
cmd[0][2] = 0x3e; cmd[0][2] = 0x3e;
cmd[0][3] = 0x00; cmd[0][3] = 0x00;
cmd[0][4] = 0x00; cmd[0][4] = 0x00;
cmd[0][5] = 0x00; cmd[0][5] = 0x00;
cmd[0][6] = 0x00; cmd[0][6] = 0x00;
// Command 2 : 02213F69960000 // Command 2 : 02213F69960000
cmd[1][0] = 0x02; cmd[1][0] = 0x02;
cmd[1][1] = 0x21; cmd[1][1] = 0x21;
cmd[1][2] = 0x3f; cmd[1][2] = 0x3f;
cmd[1][3] = 0x69; cmd[1][3] = 0x69;
cmd[1][4] = 0x96; cmd[1][4] = 0x96;
cmd[1][5] = 0x00; cmd[1][5] = 0x00;
cmd[1][6] = 0x00; cmd[1][6] = 0x00;
// Command 3 : 022138u8u7u6u5 (where uX = uid byte X) // Command 3 : 022138u8u7u6u5 (where uX = uid byte X)
cmd[2][0] = 0x02; cmd[2][0] = 0x02;
cmd[2][1] = 0x21; cmd[2][1] = 0x21;
cmd[2][2] = 0x38; cmd[2][2] = 0x38;
cmd[2][3] = uid[7]; cmd[2][3] = uid[7];
cmd[2][4] = uid[6]; cmd[2][4] = uid[6];
cmd[2][5] = uid[5]; cmd[2][5] = uid[5];
cmd[2][6] = uid[4]; cmd[2][6] = uid[4];
// Command 4 : 022139u4u3u2u1 (where uX = uid byte X) // Command 4 : 022139u4u3u2u1 (where uX = uid byte X)
cmd[3][0] = 0x02; cmd[3][0] = 0x02;
cmd[3][1] = 0x21; cmd[3][1] = 0x21;
cmd[3][2] = 0x39; cmd[3][2] = 0x39;
cmd[3][3] = uid[3]; cmd[3][3] = uid[3];
cmd[3][4] = uid[2]; cmd[3][4] = uid[2];
cmd[3][5] = uid[1]; cmd[3][5] = uid[1];
cmd[3][6] = uid[0]; cmd[3][6] = uid[0];
for (int i=0; i<4; i++) { for (int i=0; i<4; i++) {
// Add the CRC // Add the CRC
crc = Crc(cmd[i], 7); crc = Iso15693Crc(cmd[i], 7);
cmd[i][7] = crc & 0xff; cmd[i][7] = crc & 0xff;
cmd[i][8] = crc >> 8; cmd[i][8] = crc >> 8;
if (DEBUG) { if (DEBUG) {
Dbprintf("SEND:"); Dbprintf("SEND:");
Dbhexdump(sizeof(cmd[i]), cmd[i], false); Dbhexdump(sizeof(cmd[i]), cmd[i], false);
} }
recvlen = SendDataTag(cmd[i], sizeof(cmd[i]), true, 1, recvbuf, sizeof(recvbuf), 0); recvlen = SendDataTag(cmd[i], sizeof(cmd[i]), true, 1, recvbuf, sizeof(recvbuf), 0);
if (DEBUG) { if (DEBUG) {
Dbprintf("RECV:"); Dbprintf("RECV:");
Dbhexdump(recvlen, recvbuf, false); Dbhexdump(recvlen, recvbuf, false);
DbdecodeIso15693Answer(recvlen, recvbuf); DbdecodeIso15693Answer(recvlen, recvbuf);
} }
cmd_send(CMD_ACK, recvlen>ISO15693_MAX_RESPONSE_LENGTH?ISO15693_MAX_RESPONSE_LENGTH:recvlen, 0, 0, recvbuf, ISO15693_MAX_RESPONSE_LENGTH); cmd_send(CMD_ACK, recvlen>ISO15693_MAX_RESPONSE_LENGTH?ISO15693_MAX_RESPONSE_LENGTH:recvlen, 0, 0, recvbuf, ISO15693_MAX_RESPONSE_LENGTH);
} }
LED_D_OFF(); LED_D_OFF();
LED_A_OFF(); LED_A_OFF();
} }
@ -1702,7 +1745,7 @@ static void __attribute__((unused)) BuildSysInfoRequest(uint8_t *uid)
cmd[8] = 0x05; cmd[8] = 0x05;
cmd[9]= 0xe0; // always e0 (not exactly unique) cmd[9]= 0xe0; // always e0 (not exactly unique)
//Now the CRC //Now the CRC
crc = Crc(cmd, 10); // the crc needs to be calculated over 2 bytes crc = Iso15693Crc(cmd, 10); // the crc needs to be calculated over 2 bytes
cmd[10] = crc & 0xff; cmd[10] = crc & 0xff;
cmd[11] = crc >> 8; cmd[11] = crc >> 8;
@ -1737,7 +1780,7 @@ static void __attribute__((unused)) BuildReadMultiBlockRequest(uint8_t *uid)
// Number of Blocks to read // Number of Blocks to read
cmd[11] = 0x2f; // read quite a few cmd[11] = 0x2f; // read quite a few
//Now the CRC //Now the CRC
crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
cmd[12] = crc & 0xff; cmd[12] = crc & 0xff;
cmd[13] = crc >> 8; cmd[13] = crc >> 8;
@ -1770,9 +1813,9 @@ static void __attribute__((unused)) BuildArbitraryRequest(uint8_t *uid,uint8_t C
cmd[10] = 0x00; cmd[10] = 0x00;
cmd[11] = 0x0a; cmd[11] = 0x0a;
// cmd[12] = 0x00; // cmd[12] = 0x00;
// cmd[13] = 0x00; //Now the CRC // cmd[13] = 0x00; //Now the CRC
crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
cmd[12] = crc & 0xff; cmd[12] = crc & 0xff;
cmd[13] = crc >> 8; cmd[13] = crc >> 8;
@ -1805,9 +1848,9 @@ static void __attribute__((unused)) BuildArbitraryCustomRequest(uint8_t uid[], u
cmd[10] = 0x05; // for custom codes this must be manufacturer code cmd[10] = 0x05; // for custom codes this must be manufacturer code
cmd[11] = 0x00; cmd[11] = 0x00;
// cmd[12] = 0x00; // cmd[12] = 0x00;
// cmd[13] = 0x00; //Now the CRC // cmd[13] = 0x00; //Now the CRC
crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
cmd[12] = crc & 0xff; cmd[12] = crc & 0xff;
cmd[13] = crc >> 8; cmd[13] = crc >> 8;

View file

@ -8,17 +8,31 @@
// Routines to support ISO 15693. // Routines to support ISO 15693.
//----------------------------------------------------------------------------- //-----------------------------------------------------------------------------
#ifndef __ISO15693_H #ifndef ISO15693_H__
#define __ISO15693_H #define ISO15693_H__
#include <stdint.h> #include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
// Delays in SSP_CLK ticks.
// SSP_CLK runs at 13,56MHz / 32 = 423.75kHz when simulating a tag
#define DELAY_READER_TO_ARM_SIM 8
#define DELAY_ARM_TO_READER_SIM 0
#define DELAY_ISO15693_VCD_TO_VICC_SIM 132 // 132/423.75kHz = 311.5us from end of command EOF to start of tag response
//SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when acting as reader
#define DELAY_ISO15693_VCD_TO_VICC_READER 1056 // 1056/3,39MHz = 311.5us from end of command EOF to start of tag response
#define DELAY_ISO15693_VICC_TO_VCD_READER 1017 // 1017/3.39MHz = 300us between end of tag response and next reader command
void CodeIso15693AsTag(uint8_t *cmd, size_t len);
int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time);
void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t *start_time, uint32_t slot_time, bool slow);
void SnoopIso15693(void); void SnoopIso15693(void);
void AcquireRawAdcSamplesIso15693(void); void AcquireRawAdcSamplesIso15693(void);
void ReaderIso15693(uint32_t parameter); void ReaderIso15693(uint32_t parameter);
void SimTagIso15693(uint32_t parameter, uint8_t *uid); void SimTagIso15693(uint32_t parameter, uint8_t *uid);
void BruteforceIso15693Afi(uint32_t speed); void BruteforceIso15693Afi(uint32_t speed);
void DirectTag15693Command(uint32_t datalen,uint32_t speed, uint32_t recv, uint8_t data[]); void DirectTag15693Command(uint32_t datalen, uint32_t speed, uint32_t recv, uint8_t data[]);
void SetTag15693Uid(uint8_t *uid); void SetTag15693Uid(uint8_t *uid);
void SetDebugIso15693(uint32_t flag); void SetDebugIso15693(uint32_t flag);

View file

@ -100,55 +100,68 @@ int usage_hf_iclass_sim(void) {
return 0; return 0;
} }
// the original malicious IDs from Flavio D. Garcia, Gerhard de Koning Gans, Roel Verdult,
// and Milosch Meriac. Dismantling iClass and iClass Elite.
#define NUM_CSNS 15 #define NUM_CSNS 15
static uint8_t csns[8 * NUM_CSNS] = {
0x00, 0x0B, 0x0F, 0xFF, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x04, 0x0E, 0x08, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x09, 0x0D, 0x05, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x0A, 0x0C, 0x06, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x0F, 0x0B, 0x03, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x08, 0x0A, 0x0C, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x0D, 0x09, 0x09, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x0E, 0x08, 0x0A, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x03, 0x07, 0x17, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x3C, 0x06, 0xE0, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x01, 0x05, 0x1D, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x02, 0x04, 0x1E, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x07, 0x03, 0x1B, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x00, 0x02, 0x24, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x05, 0x01, 0x21, 0xF7, 0xFF, 0x12, 0xE0 };
// pre-defined 9 CSNs by iceman.
// only one csn depend on several others.
// six depends only on the first csn, (0,1, 0x45)
// #define NUM_CSNS 9
// static uint8_t csns[8 * NUM_CSNS] = {
// 0x01, 0x0A, 0x0F, 0xFF, 0xF7, 0xFF, 0x12, 0xE0,
// 0x0C, 0x06, 0x0C, 0xFE, 0xF7, 0xFF, 0x12, 0xE0,
// 0x10, 0x97, 0x83, 0x7B, 0xF7, 0xFF, 0x12, 0xE0,
// 0x13, 0x97, 0x82, 0x7A, 0xF7, 0xFF, 0x12, 0xE0,
// 0x07, 0x0E, 0x0D, 0xF9, 0xF7, 0xFF, 0x12, 0xE0,
// 0x14, 0x96, 0x84, 0x76, 0xF7, 0xFF, 0x12, 0xE0,
// 0x17, 0x96, 0x85, 0x71, 0xF7, 0xFF, 0x12, 0xE0,
// 0xCE, 0xC5, 0x0F, 0x77, 0xF7, 0xFF, 0x12, 0xE0,
// 0xD2, 0x5A, 0x82, 0xF8, 0xF7, 0xFF, 0x12, 0xE0
// //0x04, 0x08, 0x9F, 0x78, 0x6E, 0xFF, 0x12, 0xE0
// };
int CmdHFiClassSim(const char *Cmd) { int CmdHFiClassSim(const char *Cmd) {
uint8_t simType = 0; uint8_t simType = 0;
uint8_t CSN[8] = {0, 0, 0, 0, 0, 0, 0, 0}; uint8_t CSN[8] = {0, 0, 0, 0, 0, 0, 0, 0};
if (strlen(Cmd)<1) { if (strlen(Cmd) < 1) {
return usage_hf_iclass_sim(); return usage_hf_iclass_sim();
} }
simType = param_get8ex(Cmd, 0, 0, 10); simType = param_get8ex(Cmd, 0, 0, 10);
if(simType == 0) if (simType == ICLASS_SIM_MODE_CSN) {
{
if (param_gethex(Cmd, 1, CSN, 16)) { if (param_gethex(Cmd, 1, CSN, 16)) {
PrintAndLog("A CSN should consist of 16 HEX symbols"); PrintAndLog("A CSN should consist of 16 HEX symbols");
return usage_hf_iclass_sim(); return usage_hf_iclass_sim();
} }
PrintAndLog("--simtype:%02x csn:%s", simType, sprint_hex(CSN, 8)); PrintAndLog("--simtype:%02x csn:%s", simType, sprint_hex(CSN, 8));
} }
if(simType > 3)
{
PrintAndLog("Undefined simptype %d", simType);
return usage_hf_iclass_sim();
}
uint8_t numberOfCSNs=0; if (simType == ICLASS_SIM_MODE_READER_ATTACK) {
if(simType == 2) UsbCommand c = {CMD_SIMULATE_TAG_ICLASS, {simType, NUM_CSNS}};
{
UsbCommand c = {CMD_SIMULATE_TAG_ICLASS, {simType,NUM_CSNS}};
UsbCommand resp = {0}; UsbCommand resp = {0};
uint8_t csns[8*NUM_CSNS] = { memcpy(c.d.asBytes, csns, 8 * NUM_CSNS);
0x00, 0x0B, 0x0F, 0xFF, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x04, 0x0E, 0x08, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x09, 0x0D, 0x05, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x0A, 0x0C, 0x06, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x0F, 0x0B, 0x03, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x08, 0x0A, 0x0C, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x0D, 0x09, 0x09, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x0E, 0x08, 0x0A, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x03, 0x07, 0x17, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x3C, 0x06, 0xE0, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x01, 0x05, 0x1D, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x02, 0x04, 0x1E, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x07, 0x03, 0x1B, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x00, 0x02, 0x24, 0xF7, 0xFF, 0x12, 0xE0,
0x00, 0x05, 0x01, 0x21, 0xF7, 0xFF, 0x12, 0xE0 };
memcpy(c.d.asBytes, csns, 8*NUM_CSNS);
SendCommand(&c); SendCommand(&c);
if (!WaitForResponseTimeout(CMD_ACK, &resp, -1)) { if (!WaitForResponseTimeout(CMD_ACK, &resp, -1)) {
@ -157,9 +170,9 @@ int CmdHFiClassSim(const char *Cmd) {
} }
uint8_t num_mac_responses = resp.arg[1]; uint8_t num_mac_responses = resp.arg[1];
PrintAndLog("Mac responses: %d MACs obtained (should be %d)", num_mac_responses,NUM_CSNS); PrintAndLog("Mac responses: %d MACs obtained (should be %d)", num_mac_responses, NUM_CSNS);
size_t datalen = NUM_CSNS*24; size_t datalen = NUM_CSNS * 24;
/* /*
* Now, time to dump to file. We'll use this format: * Now, time to dump to file. We'll use this format:
* <8-byte CSN><8-byte CC><4 byte NR><4 byte MAC>.... * <8-byte CSN><8-byte CC><4 byte NR><4 byte MAC>....
@ -167,28 +180,29 @@ int CmdHFiClassSim(const char *Cmd) {
* 8 * 24 bytes. * 8 * 24 bytes.
* *
* The returndata from the pm3 is on the following format * The returndata from the pm3 is on the following format
* <4 byte NR><4 byte MAC> * <8 byte CC><4 byte NR><4 byte MAC>
* CC are all zeroes, CSN is the same as was sent in * CSN is the same as was sent in
**/ **/
void* dump = malloc(datalen); void* dump = malloc(datalen);
memset(dump,0,datalen);//<-- Need zeroes for the CC-field for(int i = 0; i < NUM_CSNS; i++) {
uint8_t i = 0; memcpy(dump + i*24, csns+i*8, 8); //CSN
for(i = 0 ; i < NUM_CSNS ; i++) //copy CC from response
{ memcpy(dump + i*24 + 8, resp.d.asBytes + i*16, 8);
memcpy(dump+i*24, csns+i*8,8); //CSN
//8 zero bytes here...
//Then comes NR_MAC (eight bytes from the response) //Then comes NR_MAC (eight bytes from the response)
memcpy(dump+i*24+16,resp.d.asBytes+i*8,8); memcpy(dump + i*24 + 16, resp.d.asBytes + i*16 + 8, 8);
} }
/** Now, save to dumpfile **/ /** Now, save to dumpfile **/
saveFile("iclass_mac_attack", "bin", dump,datalen); saveFile("iclass_mac_attack", "bin", dump,datalen);
free(dump); free(dump);
}else
{ } else if (simType == ICLASS_SIM_MODE_CSN || simType == ICLASS_SIM_MODE_CSN_DEFAULT || simType == ICLASS_SIM_MODE_FULL) {
UsbCommand c = {CMD_SIMULATE_TAG_ICLASS, {simType,numberOfCSNs}}; UsbCommand c = {CMD_SIMULATE_TAG_ICLASS, {simType, 0}};
memcpy(c.d.asBytes, CSN, 8); memcpy(c.d.asBytes, CSN, 8);
SendCommand(&c); SendCommand(&c);
} else {
PrintAndLog("Undefined simtype %d", simType);
return usage_hf_iclass_sim();
} }
return 0; return 0;
@ -1263,24 +1277,18 @@ int CmdHFiClass_loclass(const char *Cmd) {
return 0; return 0;
} }
char fileName[255] = {0}; char fileName[255] = {0};
if(opt == 'f') if(opt == 'f') {
{ if(param_getstr(Cmd, 1, fileName, sizeof(fileName)) > 0) {
if(param_getstr(Cmd, 1, fileName, sizeof(fileName)) > 0)
{
return bruteforceFileNoKeys(fileName); return bruteforceFileNoKeys(fileName);
}else } else {
{
PrintAndLog("You must specify a filename"); PrintAndLog("You must specify a filename");
} }
} } else if(opt == 't') {
else if(opt == 't')
{
int errors = testCipherUtils(); int errors = testCipherUtils();
errors += testMAC(); errors += testMAC();
errors += doKeyTests(0); errors += doKeyTests(0);
errors += testElite(); errors += testElite();
if(errors) if(errors) {
{
prnlog("OBS! There were errors!!!"); prnlog("OBS! There were errors!!!");
} }
return errors; return errors;

View file

@ -213,30 +213,30 @@ uint8_t iclass_CRC_check(bool isResponse, uint8_t* data, uint8_t len)
} }
void annotateIclass(char *exp, size_t size, uint8_t* cmd, uint8_t cmdsize) void annotateIclass(char *exp, size_t size, uint8_t* cmd, uint8_t cmdsize) {
{
switch(cmd[0]) switch(cmd[0])
{ {
case ICLASS_CMD_ACTALL: snprintf(exp,size,"ACTALL"); break; case ICLASS_CMD_ACTALL: snprintf(exp, size, "ACTALL"); break;
case ICLASS_CMD_READ_OR_IDENTIFY:{ case ICLASS_CMD_READ_OR_IDENTIFY: {
if(cmdsize > 1){ if (cmdsize > 1){
snprintf(exp,size,"READ(%d)",cmd[1]); snprintf(exp,size,"READ(%d)",cmd[1]);
}else{ } else {
snprintf(exp,size,"IDENTIFY"); snprintf(exp,size,"IDENTIFY");
} }
break; break;
} }
case ICLASS_CMD_SELECT: snprintf(exp,size,"SELECT"); break; case ICLASS_CMD_SELECT: snprintf(exp,size, "SELECT"); break;
case ICLASS_CMD_PAGESEL: snprintf(exp,size,"PAGESEL(%d)", cmd[1]); break; case ICLASS_CMD_PAGESEL: snprintf(exp,size, "PAGESEL(%d)", cmd[1]); break;
case ICLASS_CMD_READCHECK_KC:snprintf(exp,size,"READCHECK[Kc](%d)", cmd[1]); break; case ICLASS_CMD_READCHECK_KC: snprintf(exp,size, "READCHECK[Kc](%d)", cmd[1]); break;
case ICLASS_CMD_READCHECK_KD:snprintf(exp,size,"READCHECK[Kd](%d)", cmd[1]); break; case ICLASS_CMD_READCHECK_KD: snprintf(exp,size, "READCHECK[Kd](%d)", cmd[1]); break;
case ICLASS_CMD_CHECK: snprintf(exp,size,"CHECK"); break; case ICLASS_CMD_CHECK_KC:
case ICLASS_CMD_DETECT: snprintf(exp,size,"DETECT"); break; case ICLASS_CMD_CHECK_KD: snprintf(exp,size, "CHECK"); break;
case ICLASS_CMD_HALT: snprintf(exp,size,"HALT"); break; case ICLASS_CMD_DETECT: snprintf(exp,size, "DETECT"); break;
case ICLASS_CMD_UPDATE: snprintf(exp,size,"UPDATE(%d)",cmd[1]); break; case ICLASS_CMD_HALT: snprintf(exp,size, "HALT"); break;
case ICLASS_CMD_ACT: snprintf(exp,size,"ACT"); break; case ICLASS_CMD_UPDATE: snprintf(exp,size, "UPDATE(%d)",cmd[1]); break;
case ICLASS_CMD_READ4: snprintf(exp,size,"READ4(%d)",cmd[1]); break; case ICLASS_CMD_ACT: snprintf(exp,size, "ACT"); break;
default: snprintf(exp,size,"?"); break; case ICLASS_CMD_READ4: snprintf(exp,size, "READ4(%d)",cmd[1]); break;
default: snprintf(exp,size, "?"); break;
} }
return; return;
} }
@ -901,6 +901,13 @@ uint16_t printTraceLine(uint16_t tracepos, uint16_t traceLen, uint8_t *trace, ui
} }
} }
// adjust for different time scales
if (protocol == ICLASS || protocol == ISO_15693) {
first_timestamp *= 32;
timestamp *= 32;
duration *= 32;
}
//Check the CRC status //Check the CRC status
uint8_t crcStatus = 2; uint8_t crcStatus = 2;
@ -940,6 +947,7 @@ uint16_t printTraceLine(uint16_t tracepos, uint16_t traceLen, uint8_t *trace, ui
uint8_t parityBits = parityBytes[j>>3]; uint8_t parityBits = parityBytes[j>>3];
if (protocol != ISO_14443B if (protocol != ISO_14443B
&& protocol != ISO_15693 && protocol != ISO_15693
&& protocol != ICLASS
&& protocol != ISO_7816_4 && protocol != ISO_7816_4
&& (isResponse || protocol == ISO_14443A) && (isResponse || protocol == ISO_14443A)
&& (oddparity8(frame[j]) != ((parityBits >> (7-(j&0x0007))) & 0x01))) { && (oddparity8(frame[j]) != ((parityBits >> (7-(j&0x0007))) & 0x01))) {
@ -950,8 +958,7 @@ uint16_t printTraceLine(uint16_t tracepos, uint16_t traceLen, uint8_t *trace, ui
} }
if (markCRCBytes) { if (markCRCBytes) {
if(crcStatus == 0 || crcStatus == 1) if (crcStatus == 0 || crcStatus == 1) { //CRC-command
{//CRC-command
char *pos1 = line[(data_len-2)/16]+(((data_len-2) % 16) * 4); char *pos1 = line[(data_len-2)/16]+(((data_len-2) % 16) * 4);
(*pos1) = '['; (*pos1) = '[';
char *pos2 = line[(data_len)/16]+(((data_len) % 16) * 4); char *pos2 = line[(data_len)/16]+(((data_len) % 16) * 4);
@ -967,7 +974,11 @@ uint16_t printTraceLine(uint16_t tracepos, uint16_t traceLen, uint8_t *trace, ui
} }
if (data_len == 0) { if (data_len == 0) {
sprintf(line[0]," <empty trace - possible error>"); if (protocol == ICLASS && duration == 2048) {
sprintf(line[0], " <SOF>");
} else {
sprintf(line[0], " <empty trace - possible error>");
}
} }
//--- Draw the CRC column //--- Draw the CRC column
@ -978,8 +989,7 @@ uint16_t printTraceLine(uint16_t tracepos, uint16_t traceLen, uint8_t *trace, ui
if (protocol == PROTO_MIFARE) if (protocol == PROTO_MIFARE)
annotateMifare(explanation, sizeof(explanation), frame, data_len, parityBytes, parity_len, isResponse); annotateMifare(explanation, sizeof(explanation), frame, data_len, parityBytes, parity_len, isResponse);
if(!isResponse) if (!isResponse) {
{
switch(protocol) { switch(protocol) {
case ICLASS: annotateIclass(explanation,sizeof(explanation),frame,data_len); break; case ICLASS: annotateIclass(explanation,sizeof(explanation),frame,data_len); break;
case ISO_14443A: annotateIso14443a(explanation,sizeof(explanation),frame,data_len); break; case ISO_14443A: annotateIso14443a(explanation,sizeof(explanation),frame,data_len); break;
@ -1027,6 +1037,11 @@ uint16_t printTraceLine(uint16_t tracepos, uint16_t traceLen, uint8_t *trace, ui
if (showWaitCycles && !isResponse && next_record_is_response(tracepos, trace)) { if (showWaitCycles && !isResponse && next_record_is_response(tracepos, trace)) {
uint32_t next_timestamp = *((uint32_t *)(trace + tracepos)); uint32_t next_timestamp = *((uint32_t *)(trace + tracepos));
// adjust for different time scales
if (protocol == ICLASS || protocol == ISO_15693) {
next_timestamp *= 32;
}
PrintAndLog(" %10d | %10d | %s | fdt (Frame Delay Time): %d", PrintAndLog(" %10d | %10d | %s | fdt (Frame Delay Time): %d",
(EndOfTransmissionTimestamp - first_timestamp), (EndOfTransmissionTimestamp - first_timestamp),
(next_timestamp - first_timestamp), (next_timestamp - first_timestamp),

View file

@ -240,6 +240,7 @@ void doMAC(uint8_t *cc_nr_p, uint8_t *div_key_p, uint8_t mac[4])
//free(cc_nr); //free(cc_nr);
return; return;
} }
void doMAC_N(uint8_t *address_data_p, uint8_t address_data_size, uint8_t *div_key_p, uint8_t mac[4]) void doMAC_N(uint8_t *address_data_p, uint8_t address_data_size, uint8_t *div_key_p, uint8_t mac[4])
{ {
uint8_t *address_data; uint8_t *address_data;

View file

@ -392,7 +392,7 @@ int bruteforceItem(dumpdata item, uint16_t keytable[]) {
//Diversify //Diversify
diversifyKey(item.csn, key_sel_p, div_key); diversifyKey(item.csn, key_sel_p, div_key);
//Calc mac //Calc mac
doMAC(item.cc_nr, div_key,calculated_MAC); doMAC(item.cc_nr, div_key, calculated_MAC);
if (memcmp(calculated_MAC, item.mac, 4) == 0) { if (memcmp(calculated_MAC, item.mac, 4) == 0) {
for (int i = 0; i < numbytes_to_recover; i++) for (int i = 0; i < numbytes_to_recover; i++)
@ -401,8 +401,7 @@ int bruteforceItem(dumpdata item, uint16_t keytable[]) {
break; break;
} }
brute++; brute++;
if((brute & 0xFFFF) == 0) if ((brute & 0xFFFF) == 0) {
{
printf("%d",(brute >> 16) & 0xFF); printf("%d",(brute >> 16) & 0xFF);
fflush(stdout); fflush(stdout);
} }
@ -420,7 +419,6 @@ int bruteforceItem(dumpdata item, uint16_t keytable[]) {
keytable[bytes_to_recover[i]] &= ~BEING_CRACKED; keytable[bytes_to_recover[i]] &= ~BEING_CRACKED;
keytable[bytes_to_recover[i]] |= CRACKED; keytable[bytes_to_recover[i]] |= CRACKED;
} }
} }
return errors; return errors;
@ -508,7 +506,7 @@ int bruteforceDump(uint8_t dump[], size_t dumpsize, uint16_t keytable[])
dumpdata* attack = (dumpdata* ) malloc(itemsize); dumpdata* attack = (dumpdata* ) malloc(itemsize);
for(i = 0 ; i * itemsize < dumpsize ; i++ ) for (i = 0 ; i * itemsize < dumpsize ; i++ )
{ {
memcpy(attack,dump+i*itemsize, itemsize); memcpy(attack,dump+i*itemsize, itemsize);
errors += bruteforceItem(*attack, keytable); errors += bruteforceItem(*attack, keytable);

View file

@ -1,8 +1,8 @@
// ISO15693 commons // ISO15693 commons
// Adrian Dabrowski 2010 and others, GPLv2 // Adrian Dabrowski 2010 and others, GPLv2
#ifndef ISO15693_H__ #ifndef ISO15693TOOLS_H__
#define ISO15693_H__ #define ISO15693TOOLS_H__
// ISO15693 CRC // ISO15693 CRC
#define ISO15693_CRC_PRESET (uint16_t)0xFFFF #define ISO15693_CRC_PRESET (uint16_t)0xFFFF
@ -11,7 +11,7 @@
uint16_t Iso15693Crc(uint8_t *v, int n); uint16_t Iso15693Crc(uint8_t *v, int n);
int Iso15693AddCrc(uint8_t *req, int n); int Iso15693AddCrc(uint8_t *req, int n);
char* Iso15693sprintUID(char *target,uint8_t *uid); char* Iso15693sprintUID(char *target, uint8_t *uid);
unsigned short iclass_crc16(char *data_p, unsigned short length); unsigned short iclass_crc16(char *data_p, unsigned short length);
#endif #endif

View file

@ -96,7 +96,8 @@ NXP/Philips CUSTOM COMMANDS
#define ICLASS_CMD_PAGESEL 0x84 #define ICLASS_CMD_PAGESEL 0x84
#define ICLASS_CMD_READCHECK_KD 0x88 #define ICLASS_CMD_READCHECK_KD 0x88
#define ICLASS_CMD_READCHECK_KC 0x18 #define ICLASS_CMD_READCHECK_KC 0x18
#define ICLASS_CMD_CHECK 0x05 #define ICLASS_CMD_CHECK_KC 0x95
#define ICLASS_CMD_CHECK_KD 0x05
#define ICLASS_CMD_DETECT 0x0F #define ICLASS_CMD_DETECT 0x0F
#define ICLASS_CMD_HALT 0x00 #define ICLASS_CMD_HALT 0x00
#define ICLASS_CMD_UPDATE 0x87 #define ICLASS_CMD_UPDATE 0x87

Binary file not shown.

View file

@ -33,60 +33,80 @@ module hi_simulate(
output dbg; output dbg;
input [2:0] mod_type; input [2:0] mod_type;
assign adc_clk = ck_1356meg;
// The comparator with hysteresis on the output from the peak detector. // The comparator with hysteresis on the output from the peak detector.
reg after_hysteresis; reg after_hysteresis;
assign adc_clk = ck_1356meg; reg [11:0] has_been_low_for;
always @(negedge adc_clk) always @(negedge adc_clk)
begin begin
if(& adc_d[7:5]) after_hysteresis = 1'b1; // if (adc_d >= 224) if (& adc_d[7:5]) after_hysteresis <= 1'b1; // if (adc_d >= 224)
else if(~(| adc_d[7:5])) after_hysteresis = 1'b0; // if (adc_d <= 31) else if (~(| adc_d[7:5])) after_hysteresis <= 1'b0; // if (adc_d <= 31)
if (adc_d >= 224)
begin
has_been_low_for <= 12'd0;
end
else
begin
if (has_been_low_for == 12'd4095)
begin
has_been_low_for <= 12'd0;
after_hysteresis <= 1'b1;
end
else
begin
has_been_low_for <= has_been_low_for + 1;
end
end
end end
// Divide 13.56 MHz to produce various frequencies for SSP_CLK // Divide 13.56 MHz to produce various frequencies for SSP_CLK
// and modulation. // and modulation.
reg [7:0] ssp_clk_divider; reg [8:0] ssp_clk_divider;
always @(posedge adc_clk) always @(negedge adc_clk)
ssp_clk_divider <= (ssp_clk_divider + 1); ssp_clk_divider <= (ssp_clk_divider + 1);
reg ssp_clk; reg ssp_clk;
always @(negedge adc_clk) always @(negedge adc_clk)
begin begin
if(mod_type == `FPGA_HF_SIMULATOR_MODULATE_424K_8BIT) if (mod_type == `FPGA_HF_SIMULATOR_MODULATE_424K_8BIT)
// Get bit every at 53KHz (every 8th carrier bit of 424kHz) // Get bit every at 53KHz (every 8th carrier bit of 424kHz)
ssp_clk <= ssp_clk_divider[7]; ssp_clk <= ~ssp_clk_divider[7];
else if(mod_type == `FPGA_HF_SIMULATOR_MODULATE_212K) else if (mod_type == `FPGA_HF_SIMULATOR_MODULATE_212K)
// Get next bit at 212kHz // Get next bit at 212kHz
ssp_clk <= ssp_clk_divider[5]; ssp_clk <= ~ssp_clk_divider[5];
else else
// Get next bit at 424Khz // Get next bit at 424Khz
ssp_clk <= ssp_clk_divider[4]; ssp_clk <= ~ssp_clk_divider[4];
end end
// Divide SSP_CLK by 8 to produce the byte framing signal; the phase of // Produce the byte framing signal; the phase of this signal
// this is arbitrary, because it's just a bitstream. // is arbitrary, because it's just a bit stream in this module.
// One nasty issue, though: I can't make it work with both rx and tx at
// once. The phase wrt ssp_clk must be changed. TODO to find out why
// that is and make a better fix.
reg [2:0] ssp_frame_divider_to_arm;
always @(posedge ssp_clk)
ssp_frame_divider_to_arm <= (ssp_frame_divider_to_arm + 1);
reg [2:0] ssp_frame_divider_from_arm;
always @(negedge ssp_clk)
ssp_frame_divider_from_arm <= (ssp_frame_divider_from_arm + 1);
reg ssp_frame; reg ssp_frame;
always @(ssp_frame_divider_to_arm or ssp_frame_divider_from_arm or mod_type) always @(negedge adc_clk)
if(mod_type == `FPGA_HF_SIMULATOR_NO_MODULATION) // not modulating, so listening, to ARM begin
ssp_frame = (ssp_frame_divider_to_arm == 3'b000); if (mod_type == `FPGA_HF_SIMULATOR_MODULATE_212K)
else begin
ssp_frame = (ssp_frame_divider_from_arm == 3'b000); if (ssp_clk_divider[8:5] == 4'd1)
ssp_frame <= 1'b1;
if (ssp_clk_divider[8:5] == 4'd5)
ssp_frame <= 1'b0;
end
else
begin
if (ssp_clk_divider[7:4] == 4'd1)
ssp_frame <= 1'b1;
if (ssp_clk_divider[7:4] == 4'd5)
ssp_frame <= 1'b0;
end
end
// Synchronize up the after-hysteresis signal, to produce DIN. // Synchronize up the after-hysteresis signal, to produce DIN.
reg ssp_din; reg ssp_din;
@ -112,7 +132,7 @@ always @(*)
// modulation than a real tag would. // modulation than a real tag would.
assign pwr_hi = 1'b0; // HF antenna connected to GND assign pwr_hi = 1'b0; // HF antenna connected to GND
assign pwr_oe3 = 1'b0; // 10k Load assign pwr_oe3 = 1'b0; // 10k Load
assign pwr_oe1 = modulating_carrier; // 33 Ohms Load assign pwr_oe1 = 1'b0; // 33 Ohms Load
assign pwr_oe4 = modulating_carrier; // 33 Ohms Load assign pwr_oe4 = modulating_carrier; // 33 Ohms Load
// This is all LF and doesn't matter // This is all LF and doesn't matter
@ -120,6 +140,6 @@ assign pwr_lo = 1'b0;
assign pwr_oe2 = 1'b0; assign pwr_oe2 = 1'b0;
assign dbg = ssp_din; assign dbg = ssp_frame;
endmodule endmodule

View file

@ -227,7 +227,7 @@ typedef struct{
#define CMD_UNKNOWN 0xFFFF #define CMD_UNKNOWN 0xFFFF
//Mifare simulation flags // Mifare simulation flags
#define FLAG_INTERACTIVE (1<<0) #define FLAG_INTERACTIVE (1<<0)
#define FLAG_4B_UID_IN_DATA (1<<1) #define FLAG_4B_UID_IN_DATA (1<<1)
#define FLAG_7B_UID_IN_DATA (1<<2) #define FLAG_7B_UID_IN_DATA (1<<2)
@ -235,7 +235,7 @@ typedef struct{
#define FLAG_RANDOM_NONCE (1<<5) #define FLAG_RANDOM_NONCE (1<<5)
//Iclass reader flags // iCLASS reader flags
#define FLAG_ICLASS_READER_ONLY_ONCE 0x01 #define FLAG_ICLASS_READER_ONLY_ONCE 0x01
#define FLAG_ICLASS_READER_CC 0x02 #define FLAG_ICLASS_READER_CC 0x02
#define FLAG_ICLASS_READER_CSN 0x04 #define FLAG_ICLASS_READER_CSN 0x04
@ -244,8 +244,16 @@ typedef struct{
#define FLAG_ICLASS_READER_ONE_TRY 0x20 #define FLAG_ICLASS_READER_ONE_TRY 0x20
#define FLAG_ICLASS_READER_CEDITKEY 0x40 #define FLAG_ICLASS_READER_CEDITKEY 0x40
// iCLASS simulation modes
#define ICLASS_SIM_MODE_CSN 0
#define ICLASS_SIM_MODE_CSN_DEFAULT 1
#define ICLASS_SIM_MODE_READER_ATTACK 2
#define ICLASS_SIM_MODE_FULL 3
#define ICLASS_SIM_MODE_READER_ATTACK_KEYROLL 4
#define ICLASS_SIM_MODE_EXIT_AFTER_MAC 5 // note: device internal only
//hw tune args
// hw tune args
#define FLAG_TUNE_LF 1 #define FLAG_TUNE_LF 1
#define FLAG_TUNE_HF 2 #define FLAG_TUNE_HF 2
#define FLAG_TUNE_ALL 3 #define FLAG_TUNE_ALL 3