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https://github.com/Proxmark/proxmark3.git
synced 2025-08-21 05:43:23 -07:00
fix 'hf iclass sim':
* add simulation of block 3 and 4 reads * add simulation of READ4 (4 blocks read) * fixing TransmitTo15693Reader() (again) * FPGA change (hi_simulate.v): avoid spp_clk phase changes * some whitespace fixes
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parent
3d2c9c9b06
commit
a66f26da18
5 changed files with 198 additions and 159 deletions
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@ -860,6 +860,12 @@ int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf) {
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uint8_t *resp_cc = BigBuf_malloc(18);
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int resp_cc_len;
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// Kd, Kc (blocks 3 and 4). Cannot be read. Always respond with 0xff bytes only
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uint8_t *resp_ff = BigBuf_malloc(22);
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int resp_ff_len;
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uint8_t ff_data[10] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00};
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AppendCrc(ff_data, 8);
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// Application Issuer Area (block 5)
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uint8_t *resp_aia = BigBuf_malloc(22);
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int resp_aia_len;
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@ -897,14 +903,19 @@ int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf) {
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memcpy(resp_cc, ToSend, ToSendMax);
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resp_cc_len = ToSendMax;
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// Kd, Kc (blocks 3 and 4)
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CodeIso15693AsTag(ff_data, sizeof(ff_data));
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memcpy(resp_ff, ToSend, ToSendMax);
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resp_ff_len = ToSendMax;
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// Application Issuer Area (block 5)
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CodeIso15693AsTag(aia_data, sizeof(aia_data));
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memcpy(resp_aia, ToSend, ToSendMax);
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resp_aia_len = ToSendMax;
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//This is used for responding to READ-block commands or other data which is dynamically generated
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uint8_t *data_generic_trace = BigBuf_malloc(8 + 2); // 8 bytes data + 2byte CRC is max tag answer
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uint8_t *data_response = BigBuf_malloc( (8 + 2) * 2 + 2);
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uint8_t *data_generic_trace = BigBuf_malloc(32 + 2); // 32 bytes data + 2byte CRC is max tag answer
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uint8_t *data_response = BigBuf_malloc( (32 + 2) * 2 + 2);
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LED_A_ON();
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bool buttonPressed = false;
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@ -921,7 +932,7 @@ int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf) {
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buttonPressed = true;
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break;
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}
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//Signal tracer
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LED_C_ON();
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@ -931,6 +942,7 @@ int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf) {
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modulated_response_size = 0;
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trace_data = NULL;
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trace_data_size = 0;
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if (receivedCmd[0] == ICLASS_CMD_ACTALL) {
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// Reader in anticollission phase
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modulated_response = resp_sof;
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@ -944,12 +956,11 @@ int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf) {
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modulated_response_size = resp_anticoll_len;
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trace_data = anticoll_data;
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trace_data_size = sizeof(anticoll_data);
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//DbpString("Reader requests anticollission CSN:");
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} else if (receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 4) { // read block
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uint16_t blockNo = receivedCmd[1];
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if (simulationMode != ICLASS_SIM_MODE_FULL) {
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// provide defaults for blocks 0, 1, 2, 5
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if (simulationMode == ICLASS_SIM_MODE_EXIT_AFTER_MAC) {
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// provide defaults for blocks 0 ... 5
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switch (blockNo) {
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case 0: // csn (block 00)
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modulated_response = resp_csn;
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@ -973,6 +984,13 @@ int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf) {
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memcpy(reader_mac_buf, card_challenge_data, 8);
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}
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break;
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case 3:
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case 4: // Kd, Kd, always respond with 0xff bytes
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modulated_response = resp_ff;
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modulated_response_size = resp_ff_len;
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trace_data = ff_data;
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trace_data_size = sizeof(ff_data);
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break;
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case 5: // Application Issuer Area (block 05)
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modulated_response = resp_aia;
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modulated_response_size = resp_aia_len;
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@ -981,15 +999,22 @@ int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf) {
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break;
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// default: don't respond
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}
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} else { // use data from emulator memory
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memcpy(data_generic_trace, emulator + (receivedCmd[1] << 3), 8);
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AppendCrc(data_generic_trace, 8);
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trace_data = data_generic_trace;
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trace_data_size = 10;
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CodeIso15693AsTag(trace_data, trace_data_size);
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memcpy(data_response, ToSend, ToSendMax);
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modulated_response = data_response;
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modulated_response_size = ToSendMax;
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} else if (simulationMode == ICLASS_SIM_MODE_FULL) {
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if (blockNo == 3 || blockNo == 4) { // Kd, Kc, always respond with 0xff bytes
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modulated_response = resp_ff;
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modulated_response_size = resp_ff_len;
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trace_data = ff_data;
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trace_data_size = sizeof(ff_data);
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} else { // use data from emulator memory
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memcpy(data_generic_trace, emulator + (receivedCmd[1] << 3), 8);
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AppendCrc(data_generic_trace, 8);
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trace_data = data_generic_trace;
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trace_data_size = 10;
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CodeIso15693AsTag(trace_data, trace_data_size);
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memcpy(data_response, ToSend, ToSendMax);
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modulated_response = data_response;
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modulated_response_size = ToSendMax;
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}
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}
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} else if (receivedCmd[0] == ICLASS_CMD_SELECT) {
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@ -1039,6 +1064,18 @@ int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf) {
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trace_data = NULL;
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trace_data_size = 0;
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} else if (simulationMode == ICLASS_SIM_MODE_FULL && receivedCmd[0] == ICLASS_CMD_READ4 && len == 4) { // 0x06
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//Read block
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//Take the data...
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memcpy(data_generic_trace, emulator + (receivedCmd[1] << 3), 8 * 4);
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AppendCrc(data_generic_trace, 8 * 4);
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trace_data = data_generic_trace;
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trace_data_size = 8 * 4 + 2;
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CodeIso15693AsTag(trace_data, trace_data_size);
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memcpy(data_response, ToSend, ToSendMax);
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modulated_response = data_response;
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modulated_response_size = ToSendMax;
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} else if (receivedCmd[0] == ICLASS_CMD_UPDATE && simulationMode == ICLASS_SIM_MODE_FULL) {
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// Probably the reader wants to update the nonce. Let's just ignore that for now.
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// OBS! If this is implemented, don't forget to regenerate the cipher_state
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@ -1072,7 +1109,7 @@ int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf) {
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}
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/**
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A legit tag has about 330us delay between reader EOT and tag SOF.
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A legit tag has about 311,5us delay between reader EOT and tag SOF.
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**/
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if (modulated_response_size > 0) {
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uint32_t response_time = reader_eof_time + DELAY_ISO15693_VCD_TO_VICC_SIM - DELAY_ARM_TO_READER_SIM;
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@ -1112,7 +1149,7 @@ void SimulateIClass(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain
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// setup hardware for simulation:
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
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FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
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StartCountSspClk();
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@ -1150,8 +1187,8 @@ void SimulateIClass(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain
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datain[i*8+0], datain[i*8+1], datain[i*8+2], datain[i*8+3],
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datain[i*8+4], datain[i*8+5], datain[i*8+6], datain[i*8+7]);
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Dbprintf("NR,MAC: %02x %02x %02x %02x %02x %02x %02x %02x",
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datain[i*8+ 8], datain[i*8+ 9], datain[i*8+10], datain[i*8+11],
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datain[i*8+12], datain[i*8+13], datain[i*8+14], datain[i*8+15]);
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datain[i*8+ 8], datain[i*8+ 9], datain[i*8+10], datain[i*8+11],
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datain[i*8+12], datain[i*8+13], datain[i*8+14], datain[i*8+15]);
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}
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cmd_send(CMD_ACK, CMD_SIMULATE_TAG_ICLASS, i, 0, mac_responses, i*16);
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} else if (simType == ICLASS_SIM_MODE_FULL) {
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@ -1319,10 +1356,10 @@ static int GetIClassAnswer(uint8_t *receivedResponse, int maxLen, int *samples,
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if (elapsed) (*elapsed)++;
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}
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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if (c < timeout) {
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c++;
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} else {
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return false;
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if (c < timeout) {
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c++;
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} else {
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return false;
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}
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b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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skip = !skip;
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