mirror of
https://github.com/Proxmark/proxmark3.git
synced 2025-08-19 04:49:38 -07:00
lf t55xx code cleanup +
@iceman1001 s cleanup of some t55xx read code, plus some timing tests to improve lf t5 detect/read... small typo in pcf 16 address bytes instead of 4... add option for verbose or not on bigbuf clear cmd.
This commit is contained in:
parent
59b5b7e14c
commit
7cfc777b0e
9 changed files with 165 additions and 152 deletions
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@ -50,9 +50,15 @@ uint8_t *BigBuf_get_EM_addr(void)
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// clear ALL of BigBuf
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// clear ALL of BigBuf
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void BigBuf_Clear(void)
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void BigBuf_Clear(void)
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{
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BigBuf_Clear_ext(true);
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}
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// clear ALL of BigBuf
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void BigBuf_Clear_ext(bool verbose)
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{
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{
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memset(BigBuf,0,BIGBUF_SIZE);
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memset(BigBuf,0,BIGBUF_SIZE);
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Dbprintf("Buffer cleared (%i bytes)",BIGBUF_SIZE);
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if (verbose)
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Dbprintf("Buffer cleared (%i bytes)",BIGBUF_SIZE);
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}
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}
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@ -25,6 +25,7 @@ extern uint8_t *BigBuf_get_addr(void);
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extern uint8_t *BigBuf_get_EM_addr(void);
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extern uint8_t *BigBuf_get_EM_addr(void);
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extern uint16_t BigBuf_max_traceLen(void);
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extern uint16_t BigBuf_max_traceLen(void);
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extern void BigBuf_Clear(void);
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extern void BigBuf_Clear(void);
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extern void BigBuf_Clear_ext(bool verbose);
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extern uint8_t *BigBuf_malloc(uint16_t);
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extern uint8_t *BigBuf_malloc(uint16_t);
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extern void BigBuf_free(void);
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extern void BigBuf_free(void);
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extern void BigBuf_free_keep_EM(void);
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extern void BigBuf_free_keep_EM(void);
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@ -979,14 +979,12 @@ void UsbPacketReceived(uint8_t *packet, int len)
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break;
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break;
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case CMD_T55XX_WRITE_BLOCK:
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case CMD_T55XX_WRITE_BLOCK:
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T55xxWriteBlock(c->arg[0], c->arg[1], c->arg[2], c->d.asBytes[0]);
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T55xxWriteBlock(c->arg[0], c->arg[1], c->arg[2], c->d.asBytes[0]);
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cmd_send(CMD_ACK,0,0,0,0,0);
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break;
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break;
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case CMD_T55XX_READ_TRACE:
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case CMD_T55XX_READ_TRACE:
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T55xxReadTrace();
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T55xxReadTrace();
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break;
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break;
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case CMD_PCF7931_READ:
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case CMD_PCF7931_READ:
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ReadPCF7931();
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ReadPCF7931();
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cmd_send(CMD_ACK,0,0,0,0,0);
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break;
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break;
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case CMD_PCF7931_WRITE:
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case CMD_PCF7931_WRITE:
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WritePCF7931(c->d.asBytes[0],c->d.asBytes[1],c->d.asBytes[2],c->d.asBytes[3],c->d.asBytes[4],c->d.asBytes[5],c->d.asBytes[6], c->d.asBytes[9], c->d.asBytes[7]-128,c->d.asBytes[8]-128, c->arg[0], c->arg[1], c->arg[2]);
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WritePCF7931(c->d.asBytes[0],c->d.asBytes[1],c->d.asBytes[2],c->d.asBytes[3],c->d.asBytes[4],c->d.asBytes[5],c->d.asBytes[6], c->d.asBytes[9], c->d.asBytes[7]-128,c->d.asBytes[8]-128, c->arg[0], c->arg[1], c->arg[2]);
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@ -999,7 +997,7 @@ void UsbPacketReceived(uint8_t *packet, int len)
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break;
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break;
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case CMD_AWID_DEMOD_FSK: // Set realtime AWID demodulation
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case CMD_AWID_DEMOD_FSK: // Set realtime AWID demodulation
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CmdAWIDdemodFSK(c->arg[0], 0, 0, 1);
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CmdAWIDdemodFSK(c->arg[0], 0, 0, 1);
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break;
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break;
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#endif
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#endif
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#ifdef WITH_HITAG
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#ifdef WITH_HITAG
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230
armsrc/lfops.c
230
armsrc/lfops.c
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@ -1120,23 +1120,38 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
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* Relevant times in microsecond
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* Relevant times in microsecond
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* To compensate antenna falling times shorten the write times
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* To compensate antenna falling times shorten the write times
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* and enlarge the gap ones.
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* and enlarge the gap ones.
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* Q5 tags seems to have issues when these values changes.
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*/
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*/
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#define START_GAP 31*8 // was 250 // SPEC: 1*8 to 50*8 - typ 15*8 (or 15fc)
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#define START_GAP 31*8 // was 250 // SPEC: 1*8 to 50*8 - typ 15*8 (or 15fc)
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#define WRITE_GAP 20*8 // was 160 // SPEC: 1*8 to 20*8 - typ 10*8 (or 10fc)
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#define WRITE_GAP 20*8 // was 160 // SPEC: 1*8 to 20*8 - typ 10*8 (or 10fc)
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#define WRITE_0 18*8 // was 144 // SPEC: 16*8 to 32*8 - typ 24*8 (or 24fc)
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#define WRITE_0 18*8 // was 144 // SPEC: 16*8 to 32*8 - typ 24*8 (or 24fc)
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#define WRITE_1 50*8 // was 400 // SPEC: 48*8 to 64*8 - typ 56*8 (or 56fc) 432 for T55x7; 448 for E5550
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#define WRITE_1 50*8 // was 400 // SPEC: 48*8 to 64*8 - typ 56*8 (or 56fc) 432 for T55x7; 448 for E5550
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#define READ_GAP 52*8
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#define T55xx_SAMPLES_SIZE 12000 // 32 x 32 x 10 (32 bit times numofblock (7), times clock skip..)
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// VALUES TAKEN FROM EM4x function: SendForward
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#define T55xx_READ_UPPER_THRESHOLD 128+40 // 50
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// START_GAP = 440; (55*8) cycles at 125Khz (8us = 1cycle)
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#define T55xx_READ_TOL 5
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// WRITE_GAP = 128; (16*8)
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//#define T55xx_READ_LOWER_THRESHOLD 128-40 //-50
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// WRITE_1 = 256 32*8; (32*8)
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// Write one bit to card
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void T55xxWriteBit(int bit)
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// These timings work for 4469/4269/4305 (with the 55*8 above)
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{
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// WRITE_0 = 23*8 , 9*8 SpinDelayUs(23*8);
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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// Sam7s has several timers, we will use the source TIMER_CLOCK1 (aka AT91C_TC_CLKS_TIMER_DIV1_CLOCK)
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// TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
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// Hitag units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier)
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// T0 = TIMER_CLOCK1 / 125000 = 192
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// 1 Cycle = 8 microseconds(us) == 1 field clock
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void TurnReadLFOn(int delay) {
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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if (bit == 0)
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// Give it a bit of time for the resonant antenna to settle.
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SpinDelayUs(delay); //155*8 //50*8
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}
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// Write one bit to card
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void T55xxWriteBit(int bit) {
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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if (!bit)
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SpinDelayUs(WRITE_0);
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SpinDelayUs(WRITE_0);
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else
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else
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SpinDelayUs(WRITE_1);
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SpinDelayUs(WRITE_1);
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@ -1145,68 +1160,62 @@ void T55xxWriteBit(int bit)
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}
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}
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// Write one card block in page 0, no lock
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// Write one card block in page 0, no lock
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void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
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void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode) {
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{
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LED_A_ON();
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uint32_t i = 0;
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uint32_t i = 0;
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// Set up FPGA, 125kHz
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// Set up FPGA, 125kHz
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// Wait for config.. (192+8190xPOW)x8 == 67ms
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LFSetupFPGAForADC(95, true);
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LFSetupFPGAForADC(95, true);
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// Now start writting
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// Trigger T55x7 in mode.
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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SpinDelayUs(START_GAP);
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SpinDelayUs(START_GAP);
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// Opcode
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// Opcode 10
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T55xxWriteBit(1);
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T55xxWriteBit(1);
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T55xxWriteBit(0); //Page 0
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T55xxWriteBit(0); //Page 0
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if (PwdMode == 1){
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if (PwdMode == 1){
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// Pwd
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// Send Pwd
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for (i = 0x80000000; i != 0; i >>= 1)
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for (i = 0x80000000; i != 0; i >>= 1)
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T55xxWriteBit(Pwd & i);
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T55xxWriteBit(Pwd & i);
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}
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}
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// Lock bit
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// Send Lock bit
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T55xxWriteBit(0);
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T55xxWriteBit(0);
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// Data
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// Send Data
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for (i = 0x80000000; i != 0; i >>= 1)
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for (i = 0x80000000; i != 0; i >>= 1)
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T55xxWriteBit(Data & i);
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T55xxWriteBit(Data & i);
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// Block
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// Send Block number
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for (i = 0x04; i != 0; i >>= 1)
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for (i = 0x04; i != 0; i >>= 1)
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T55xxWriteBit(Block & i);
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T55xxWriteBit(Block & i);
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// Now perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
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// Perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
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// so wait a little more)
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// so wait a little more)
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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TurnReadLFOn(20 * 1000);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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SpinDelay(20);
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// turn field off
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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cmd_send(CMD_ACK,0,0,0,0,0);
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LED_A_OFF();
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}
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}
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void TurnReadLFOn(){
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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// Give it a bit of time for the resonant antenna to settle.
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SpinDelayUs(50*8); //155*8
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}
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// Read one card block in page 0
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// Read one card block in page 0
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void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
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void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode) {
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{
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LED_A_ON();
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uint32_t i = 0;
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uint32_t i = 0;
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uint8_t *dest = BigBuf_get_addr();
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uint16_t bufferlength = BigBuf_max_traceLen();
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//clear buffer now so it does not interfere with timing later
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if ( bufferlength > T55xx_SAMPLES_SIZE )
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BigBuf_Clear_ext(false);
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bufferlength = T55xx_SAMPLES_SIZE;
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Block &= 0x7; //make sure block is at max 7
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//make sure block is at max 7
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// Clear destination buffer before sending the command
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Block &= 0x7;
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memset(dest, 0x80, bufferlength);
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// Set up FPGA, 125kHz
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// Set up FPGA, 125kHz
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// Wait for config.. (192+8190xPOW)x8 == 67ms
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LFSetupFPGAForADC(95, true);
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LFSetupFPGAForADC(95, true);
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/*
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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// Connect the A/D to the peak-detected low-frequency path.
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// Connect the A/D to the peak-detected low-frequency path.
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@ -1218,122 +1227,68 @@ void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
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// Give it a bit of time for the resonant antenna to settle.
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// Give it a bit of time for the resonant antenna to settle.
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//SpinDelayUs(8*200); //192FC
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//SpinDelayUs(8*200); //192FC
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SpinDelay(50);
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SpinDelay(50);
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*/
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// Trigger T55x7 Direct Access Mode
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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SpinDelayUs(START_GAP);
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SpinDelayUs(START_GAP);
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// Opcode
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// Opcode 10
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T55xxWriteBit(1);
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T55xxWriteBit(1);
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T55xxWriteBit(0); //Page 0
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T55xxWriteBit(0); //Page 0
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if (PwdMode == 1){
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if (PwdMode == 1){
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// Pwd
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// Send Pwd
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for (i = 0x80000000; i != 0; i >>= 1)
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for (i = 0x80000000; i != 0; i >>= 1)
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T55xxWriteBit(Pwd & i);
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T55xxWriteBit(Pwd & i);
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}
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}
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// Lock bit
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// Send a zero bit separation
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T55xxWriteBit(0);
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T55xxWriteBit(0);
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// Block
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// Send Block number
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for (i = 0x04; i != 0; i >>= 1)
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for (i = 0x04; i != 0; i >>= 1)
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T55xxWriteBit(Block & i);
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T55xxWriteBit(Block & i);
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// Turn field on to read the response
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// Turn field on to read the response
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TurnReadLFOn();
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TurnReadLFOn(READ_GAP);
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// Now do the acquisition
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i = 0;
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bool startFound = false;
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bool highFound = false;
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uint8_t curSample = 0;
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uint8_t firstSample = 0;
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for(;;) {
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
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AT91C_BASE_SSC->SSC_THR = 0x43;
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LED_D_ON();
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}
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
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curSample = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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// find first high sample
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if (!startFound && curSample > T55xx_READ_UPPER_THRESHOLD) {
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if (curSample > firstSample) firstSample = curSample;
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highFound = true;
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} else if (!highFound) {
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continue;
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}
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// skip until samples begin to change
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// Acquisition
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if (startFound || curSample < firstSample-T55xx_READ_TOL){
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doT55x7Acquisition();
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if (!startFound) dest[i++] = firstSample;
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startFound = true;
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dest[i++] = curSample;
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LED_D_OFF();
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if (i >= bufferlength) break;
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}
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}
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}
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cmd_send(CMD_ACK,0,0,0,0,0);
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// Turn the field off
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
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LED_D_OFF();
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cmd_send(CMD_ACK,0,0,0,0,0);
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LED_A_OFF();
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}
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}
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// Read card traceability data (page 1)
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// Read card traceability data (page 1)
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void T55xxReadTrace(void){
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void T55xxReadTrace(void){
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LED_A_ON();
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uint32_t i = 0;
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uint8_t *dest = BigBuf_get_addr();
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uint16_t bufferlength = BigBuf_max_traceLen();
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if ( bufferlength > T55xx_SAMPLES_SIZE )
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bufferlength= T55xx_SAMPLES_SIZE;
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// Clear destination buffer before sending the command
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//clear buffer now so it does not interfere with timing later
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memset(dest, 0x80, bufferlength);
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BigBuf_Clear_ext(false);
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LFSetupFPGAForADC(0, true);
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// Set up FPGA, 125kHz
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LFSetupFPGAForADC(95, true);
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// Trigger T55x7 Direct Access Mode
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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SpinDelayUs(START_GAP);
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SpinDelayUs(START_GAP);
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// Opcode
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// Opcode 11
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T55xxWriteBit(1);
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T55xxWriteBit(1);
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T55xxWriteBit(1); //Page 1
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T55xxWriteBit(1); //Page 1
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// Turn field on to read the response
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// Turn field on to read the response
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TurnReadLFOn();
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TurnReadLFOn(READ_GAP);
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// Now do the acquisition
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// Acquisition
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bool startFound = false;// false;
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doT55x7Acquisition();
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bool highFound = false;
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uint8_t curSample = 0;
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uint8_t firstSample = 0;
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for(;;) {
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
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AT91C_BASE_SSC->SSC_THR = 0x43;
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LED_D_ON();
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}
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
|
|
||||||
curSample = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
|
|
||||||
|
|
||||||
// find first high sample
|
|
||||||
if (!startFound && curSample > T55xx_READ_UPPER_THRESHOLD) {
|
|
||||||
if (curSample > firstSample) firstSample = curSample;
|
|
||||||
highFound = true;
|
|
||||||
} else if (!highFound) {
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
|
|
||||||
// skip until samples begin to change
|
|
||||||
if (startFound || curSample < firstSample-T55xx_READ_TOL){
|
|
||||||
if (!startFound) dest[i++] = firstSample;
|
|
||||||
startFound = true;
|
|
||||||
dest[i++] = curSample;
|
|
||||||
LED_D_OFF();
|
|
||||||
if (i >= bufferlength) break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
// Turn the field off
|
||||||
|
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
|
||||||
cmd_send(CMD_ACK,0,0,0,0,0);
|
cmd_send(CMD_ACK,0,0,0,0,0);
|
||||||
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
|
LED_A_OFF();
|
||||||
LED_D_OFF();
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*-------------- Cloning routines -----------*/
|
/*-------------- Cloning routines -----------*/
|
||||||
|
@ -1552,8 +1507,11 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
|
||||||
// Clock rate is stored in bits 8-15 of the card value
|
// Clock rate is stored in bits 8-15 of the card value
|
||||||
clock = (card & 0xFF00) >> 8;
|
clock = (card & 0xFF00) >> 8;
|
||||||
Dbprintf("Clock rate: %d", clock);
|
Dbprintf("Clock rate: %d", clock);
|
||||||
switch (clock)
|
switch (clock) {
|
||||||
{
|
case 50:
|
||||||
|
clock = T55x7_BITRATE_RF_50;
|
||||||
|
case 40:
|
||||||
|
clock = T55x7_BITRATE_RF_40;
|
||||||
case 32:
|
case 32:
|
||||||
clock = T55x7_BITRATE_RF_32;
|
clock = T55x7_BITRATE_RF_32;
|
||||||
break;
|
break;
|
||||||
|
@ -1744,14 +1702,8 @@ void SendForward(uint8_t fwd_bit_count) {
|
||||||
|
|
||||||
LED_D_ON();
|
LED_D_ON();
|
||||||
|
|
||||||
//Field on
|
// Set up FPGA, 125kHz
|
||||||
FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
|
LFSetupFPGAForADC(95, true);
|
||||||
FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
|
|
||||||
FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
|
|
||||||
|
|
||||||
// Give it a bit of time for the resonant antenna to settle.
|
|
||||||
// And for the tag to fully power up
|
|
||||||
SpinDelay(150);
|
|
||||||
|
|
||||||
// force 1st mod pulse (start gap must be longer for 4305)
|
// force 1st mod pulse (start gap must be longer for 4305)
|
||||||
fwd_bit_sz--; //prepare next bit modulation
|
fwd_bit_sz--; //prepare next bit modulation
|
||||||
|
@ -1796,7 +1748,11 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
|
||||||
|
|
||||||
uint8_t fwd_bit_count;
|
uint8_t fwd_bit_count;
|
||||||
uint8_t *dest = BigBuf_get_addr();
|
uint8_t *dest = BigBuf_get_addr();
|
||||||
int m=0, i=0;
|
uint16_t bufferlength = BigBuf_max_traceLen();
|
||||||
|
uint32_t i = 0;
|
||||||
|
|
||||||
|
// Clear destination buffer before sending the command
|
||||||
|
memset(dest, 0x80, bufferlength);
|
||||||
|
|
||||||
//If password mode do login
|
//If password mode do login
|
||||||
if (PwdMode == 1) EM4xLogin(Pwd);
|
if (PwdMode == 1) EM4xLogin(Pwd);
|
||||||
|
@ -1805,9 +1761,6 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
|
||||||
fwd_bit_count = Prepare_Cmd( FWD_CMD_READ );
|
fwd_bit_count = Prepare_Cmd( FWD_CMD_READ );
|
||||||
fwd_bit_count += Prepare_Addr( Address );
|
fwd_bit_count += Prepare_Addr( Address );
|
||||||
|
|
||||||
m = BigBuf_max_traceLen();
|
|
||||||
// Clear destination buffer before sending the command
|
|
||||||
memset(dest, 128, m);
|
|
||||||
// Connect the A/D to the peak-detected low-frequency path.
|
// Connect the A/D to the peak-detected low-frequency path.
|
||||||
SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
|
SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
|
||||||
// Now set up the SSC to get the ADC samples that are now streaming at us.
|
// Now set up the SSC to get the ADC samples that are now streaming at us.
|
||||||
|
@ -1824,10 +1777,11 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
|
||||||
if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
|
if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
|
||||||
dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
|
dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
|
||||||
i++;
|
i++;
|
||||||
if (i >= m) break;
|
if (i >= bufferlength) break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
|
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
|
||||||
|
cmd_send(CMD_ACK,0,0,0,0,0);
|
||||||
LED_D_OFF();
|
LED_D_OFF();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -103,7 +103,6 @@ void LFSetupFPGAForADC(int divisor, bool lf_field)
|
||||||
FpgaSetupSsc();
|
FpgaSetupSsc();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Does the sample acquisition. If threshold is specified, the actual sampling
|
* Does the sample acquisition. If threshold is specified, the actual sampling
|
||||||
* is not commenced until the threshold has been reached.
|
* is not commenced until the threshold has been reached.
|
||||||
|
@ -154,9 +153,6 @@ uint32_t DoAcquisition(uint8_t decimation, uint32_t bits_per_sample, bool averag
|
||||||
if ((trigger_threshold > 0) && (sample < (trigger_threshold+128)) && (sample > (128-trigger_threshold))) //
|
if ((trigger_threshold > 0) && (sample < (trigger_threshold+128)) && (sample > (128-trigger_threshold))) //
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
//if (trigger_threshold > 0 && sample < trigger_threshold) //
|
|
||||||
//continue;
|
|
||||||
|
|
||||||
trigger_threshold = 0;
|
trigger_threshold = 0;
|
||||||
sample_total_numbers++;
|
sample_total_numbers++;
|
||||||
|
|
||||||
|
@ -252,3 +248,56 @@ uint32_t SnoopLF()
|
||||||
{
|
{
|
||||||
return ReadLF(false, true);
|
return ReadLF(false, true);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* acquisition of T55x7 LF signal. Similart to other LF, but adjusted with @marshmellows thresholds
|
||||||
|
* the data is collected in BigBuf.
|
||||||
|
**/
|
||||||
|
void doT55x7Acquisition(void){
|
||||||
|
|
||||||
|
#define T55xx_SAMPLES_SIZE 12000 // 32 x 32 x 10 (32 bit times numofblock (7), times clock skip..)
|
||||||
|
#define T55xx_READ_UPPER_THRESHOLD 128+40 // 50
|
||||||
|
#define T55xx_READ_TOL 5
|
||||||
|
|
||||||
|
uint8_t *dest = BigBuf_get_addr();
|
||||||
|
uint16_t bufsize = BigBuf_max_traceLen();
|
||||||
|
|
||||||
|
if ( bufsize > T55xx_SAMPLES_SIZE )
|
||||||
|
bufsize = T55xx_SAMPLES_SIZE;
|
||||||
|
|
||||||
|
//memset(dest, 0, bufsize);
|
||||||
|
|
||||||
|
uint16_t i = 0;
|
||||||
|
bool startFound = false;
|
||||||
|
bool highFound = false;
|
||||||
|
uint8_t curSample = 0;
|
||||||
|
uint8_t firstSample = 0;
|
||||||
|
for(;;) {
|
||||||
|
if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
|
||||||
|
AT91C_BASE_SSC->SSC_THR = 0x43;
|
||||||
|
LED_D_ON();
|
||||||
|
}
|
||||||
|
if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
|
||||||
|
curSample = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
|
||||||
|
|
||||||
|
// find first high sample
|
||||||
|
if (!startFound && curSample > T55xx_READ_UPPER_THRESHOLD) {
|
||||||
|
if (curSample > firstSample)
|
||||||
|
firstSample = curSample;
|
||||||
|
highFound = true;
|
||||||
|
} else if (!highFound) {
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
|
// skip until samples begin to change
|
||||||
|
if (startFound || curSample < firstSample-T55xx_READ_TOL){
|
||||||
|
if (!startFound)
|
||||||
|
dest[i++] = firstSample;
|
||||||
|
startFound = true;
|
||||||
|
dest[i++] = curSample;
|
||||||
|
LED_D_OFF();
|
||||||
|
if (i >= bufsize) break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
|
@ -1,6 +1,12 @@
|
||||||
#ifndef LFSAMPLING_H
|
#ifndef LFSAMPLING_H
|
||||||
#define LFSAMPLING_H
|
#define LFSAMPLING_H
|
||||||
|
|
||||||
|
/**
|
||||||
|
* acquisition of T55x7 LF signal. Similart to other LF, but adjusted with @marshmellows thresholds
|
||||||
|
* the data is collected in BigBuf.
|
||||||
|
**/
|
||||||
|
void doT55x7Acquisition(void);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Initializes the FPGA for reader-mode (field on), and acquires the samples.
|
* Initializes the FPGA for reader-mode (field on), and acquires the samples.
|
||||||
* @return number of bits sampled
|
* @return number of bits sampled
|
||||||
|
@ -41,7 +47,6 @@ uint32_t DoAcquisition_config( bool silent);
|
||||||
**/
|
**/
|
||||||
void LFSetupFPGAForADC(int divisor, bool lf_field);
|
void LFSetupFPGAForADC(int divisor, bool lf_field);
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Called from the USB-handler to set the sampling configuration
|
* Called from the USB-handler to set the sampling configuration
|
||||||
* The sampling config is used for std reading and snooping.
|
* The sampling config is used for std reading and snooping.
|
||||||
|
|
|
@ -268,7 +268,7 @@ void ReadPCF7931() {
|
||||||
}
|
}
|
||||||
Dbprintf("-----------------------------------------");
|
Dbprintf("-----------------------------------------");
|
||||||
|
|
||||||
return ;
|
cmd_send(CMD_ACK,0,0,0,0,0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -67,7 +67,7 @@ int usage_pcf7931_write(){
|
||||||
PrintAndLog("Options:");
|
PrintAndLog("Options:");
|
||||||
PrintAndLog(" h This help");
|
PrintAndLog(" h This help");
|
||||||
PrintAndLog(" blockaddress Block to save [0-7]");
|
PrintAndLog(" blockaddress Block to save [0-7]");
|
||||||
PrintAndLog(" byteaddress Index of byte inside block to write [0-3]");
|
PrintAndLog(" byteaddress Index of byte inside block to write [0-15]");
|
||||||
PrintAndLog(" data one byte of data (hex)");
|
PrintAndLog(" data one byte of data (hex)");
|
||||||
PrintAndLog("Examples:");
|
PrintAndLog("Examples:");
|
||||||
PrintAndLog(" lf pcf7931 write 2 1 FF");
|
PrintAndLog(" lf pcf7931 write 2 1 FF");
|
||||||
|
|
|
@ -250,10 +250,10 @@ int CmdT55xxReadBlock(const char *Cmd) {
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t got[12000];
|
uint8_t got[12000];
|
||||||
GetFromBigBuf(got,sizeof(got),0);
|
GetFromBigBuf(got, sizeof(got), 0);
|
||||||
WaitForResponse(CMD_ACK,NULL);
|
WaitForResponse(CMD_ACK,NULL);
|
||||||
setGraphBuf(got, 12000);
|
setGraphBuf(got, sizeof(got));
|
||||||
DemodBufferLen=0;
|
//DemodBufferLen=0;
|
||||||
if (!DecodeT55xxBlock()) return 3;
|
if (!DecodeT55xxBlock()) return 3;
|
||||||
char blk[10]={0};
|
char blk[10]={0};
|
||||||
sprintf(blk,"%d", block);
|
sprintf(blk,"%d", block);
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue