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synced 2025-08-14 02:26:59 -07:00
- fixed iso1443a ManchesterDecoder in order to fix broken Snoop/Sniff
- enhanced tracing: hf 14a list now shows meaningful timing information. With new option f it also shows the frame delay times (fdt) - small fix for hf 14b list - it used to run into the trace trailer - hf 14a sim now obeys iso14443 timing (fdt of 1172 or 1234 resp.) Note: you need to flash FPGA as well. More details in http://www.proxmark.org/forum/viewtopic.php?pid=9721#p9721
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16 changed files with 1433 additions and 1381 deletions
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@ -25,21 +25,31 @@
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typedef struct {
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enum {
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DEMOD_UNSYNCD,
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DEMOD_HALF_SYNCD,
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DEMOD_MOD_FIRST_HALF,
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DEMOD_NOMOD_FIRST_HALF,
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// DEMOD_HALF_SYNCD,
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// DEMOD_MOD_FIRST_HALF,
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// DEMOD_NOMOD_FIRST_HALF,
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DEMOD_MANCHESTER_DATA
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} state;
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uint16_t twoBits;
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uint16_t highCnt;
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uint16_t bitCount;
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uint16_t collisionPos;
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uint16_t syncBit;
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uint16_t parityBits;
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uint32_t parityBits;
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uint16_t shiftReg;
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uint16_t samples;
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uint16_t len;
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uint32_t startTime, endTime;
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uint8_t *output;
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} tDemod;
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typedef enum {
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MOD_NOMOD = 0,
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MOD_SECOND_HALF,
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MOD_FIRST_HALF,
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MOD_BOTH_HALVES
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} Modulation_t;
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typedef struct {
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enum {
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STATE_UNSYNCD,
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@ -47,27 +57,24 @@ typedef struct {
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STATE_MILLER_X,
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STATE_MILLER_Y,
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STATE_MILLER_Z,
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STATE_ERROR_WAIT
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} state;
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uint16_t shiftReg;
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int bitCnt;
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int byteCnt;
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int byteCntMax;
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int posCnt;
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int syncBit;
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int parityBits;
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int samples;
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int highCnt;
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int bitBuffer;
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enum {
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DROP_NONE,
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DROP_FIRST_HALF,
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DROP_SECOND_HALF
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} drop;
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uint8_t *output;
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// DROP_NONE,
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// DROP_FIRST_HALF,
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} state;
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uint16_t shiftReg;
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uint16_t bitCount;
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uint16_t len;
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uint16_t byteCntMax;
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uint16_t posCnt;
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uint16_t syncBit;
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uint32_t parityBits;
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uint16_t highCnt;
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uint16_t twoBits;
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uint32_t startTime, endTime;
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uint8_t *output;
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} tUart;
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extern byte_t oddparity (const byte_t bt);
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extern uint32_t GetParity(const uint8_t *pbtCmd, int iLen);
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extern void AppendCrc14443a(uint8_t *data, int len);
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@ -78,7 +85,7 @@ extern void ReaderTransmitPar(uint8_t *frame, int len, uint32_t par, uint32_t *t
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extern int ReaderReceive(uint8_t *receivedAnswer);
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extern int ReaderReceivePar(uint8_t *receivedAnswer, uint32_t *parptr);
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extern void iso14443a_setup();
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extern void iso14443a_setup(uint8_t fpga_minor_mode);
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extern int iso14_apdu(uint8_t *cmd, size_t cmd_len, void *data);
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extern int iso14443a_select_card(uint8_t *uid_ptr, iso14a_card_select_t *resp_data, uint32_t *cuid_ptr);
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extern void iso14a_set_trigger(bool enable);
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