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rework iso14443b device functions including FPGA I/Q signal transfer (#669)
* rework iso14443b device functions * hf_read_rx_xcorr.v: transfer i/q pair in one 16bit frame * hi_read_tx.v: invert ssp_dout. When nothing is transferred (ssp_dout=0), this results in no modulation (carrier on) * adjust arm sources accordingly * iso14443b.c: switch off carrier after hf 14b sri512read and hf 14b srix4kread * iso14443b.c: fix DMA circular buffer handling
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14 changed files with 212 additions and 321 deletions
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@ -676,7 +676,7 @@ void RAMFUNC SnoopIClass(void)
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Demod.state = DEMOD_UNSYNCD;
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// Setup for the DMA.
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FpgaSetupSsc();
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FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
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upTo = dmaBuf;
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lastRxCounter = DMA_BUFFER_SIZE;
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FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
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@ -1163,7 +1163,7 @@ int doIClassSimulation( int simulationMode, uint8_t *reader_mac_buf)
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StartCountSspClk();
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// We need to listen to the high-frequency, peak-detected path.
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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FpgaSetupSsc();
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FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
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// To control where we are in the protocol
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int cmdsRecvd = 0;
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@ -1360,7 +1360,7 @@ static int SendIClassAnswer(uint8_t *resp, int respLen, int delay)
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K_8BIT);
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AT91C_BASE_SSC->SSC_THR = 0x00;
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FpgaSetupSsc();
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FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
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while(!BUTTON_PRESS()) {
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if((AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)){
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b = AT91C_BASE_SSC->SSC_RHR; (void) b;
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@ -1398,7 +1398,7 @@ static void TransmitIClassCommand(const uint8_t *cmd, int len, int *samples, int
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int c;
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
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AT91C_BASE_SSC->SSC_THR = 0x00;
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FpgaSetupSsc();
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FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
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if (wait)
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{
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@ -1586,7 +1586,7 @@ void setupIclassReader()
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clear_trace();
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// Setup SSC
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FpgaSetupSsc();
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FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
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// Start from off (no field generated)
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// Signal field is off with the appropriate LED
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LED_D_OFF();
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