mirror of
https://github.com/Proxmark/proxmark3.git
synced 2025-08-14 18:47:24 -07:00
Pushed standard AT91 defines into main code
This commit is contained in:
d18c7db
parent
5d32e2bf60
commit
6949aca9fa
16 changed files with 1368 additions and 1521 deletions
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#include <at91sam7s512.h>
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#ifndef __AT91SAM7S128_H
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#define __AT91SAM7S128_H
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/***************************************************************
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* Start of translation between PM3 defines and AT91 defines
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* TODO these should be replaced throughout the code at some stage
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***************************************************************/
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#define PERIPH_PIOA AT91C_ID_PIOA
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#define PERIPH_ADC AT91C_ID_ADC
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#define PERIPH_SPI AT91C_ID_SPI
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#define PERIPH_SSC AT91C_ID_SSC
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#define PERIPH_PWMC AT91C_ID_PWMC
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#define PERIPH_UDP AT91C_ID_UDP
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#define PERIPH_TC1 AT91C_ID_TC1
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#define SSC_BASE AT91C_BASE_SSC
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#define WDT_CONTROL AT91C_BASE_WDTC->WDTC_WDCR
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#define PWM_ENABLE AT91C_BASE_PWMC->PWMC_ENA
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// TODO WARNING these PWM defines MUST be replaced in the code ASAP before
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// someone starts using a value of x other than that selected below
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#define PWM_CH_PERIOD(x) AT91C_BASE_PWMC_CH0->PWMC_CPRDR
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#define PWM_CH_COUNTER(x) AT91C_BASE_PWMC_CH0->PWMC_CCNTR
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#define PWM_CH_MODE(x) AT91C_BASE_PWMC_CH0->PWMC_CMR
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#define PWM_CH_DUTY_CYCLE(x) AT91C_BASE_PWMC_CH0->PWMC_CDTYR
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#define PDC_RX_POINTER(x) AT91C_BASE_PDC_SSC->PDC_RPR
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#define PDC_RX_COUNTER(x) AT91C_BASE_PDC_SSC->PDC_RCR
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#define PDC_RX_NEXT_POINTER(x) AT91C_BASE_PDC_SSC->PDC_RNPR
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#define PDC_RX_NEXT_COUNTER(x) AT91C_BASE_PDC_SSC->PDC_RNCR
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#define PDC_CONTROL(x) AT91C_BASE_PDC_SSC->PDC_PTCR
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// End WARNING
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#define DBGU_CIDR AT91C_BASE_DBGU->DBGU_CIDR
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#define RSTC_CONTROL AT91C_BASE_RSTC->RSTC_RCR
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#define RSTC_STATUS AT91C_BASE_RSTC->RSTC_RSR
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#define MC_FLASH_COMMAND AT91C_BASE_EFC0->EFC_FCR
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#define MC_FLASH_MODE0 AT91C_BASE_EFC0->EFC_FMR
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#define MC_FLASH_MODE1 AT91C_BASE_EFC1->EFC_FMR
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#define MC_FLASH_STATUS AT91C_BASE_EFC0->EFC_FSR
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#define ADC_CONTROL AT91C_BASE_ADC->ADC_CR
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#define ADC_MODE AT91C_BASE_ADC->ADC_MR
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#define ADC_CHANNEL_ENABLE AT91C_BASE_ADC->ADC_CHER
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#define ADC_STATUS AT91C_BASE_ADC->ADC_SR
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#define ADC_CHANNEL_DATA(x) AT91C_BASE_ADC->ADC_CDR[x]
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#define PIO_ENABLE AT91C_BASE_PIOA->PIO_PER
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#define PIO_DISABLE AT91C_BASE_PIOA->PIO_PDR
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#define PIO_OUTPUT_ENABLE AT91C_BASE_PIOA->PIO_OER
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#define PIO_OUTPUT_DISABLE AT91C_BASE_PIOA->PIO_ODR
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#define PIO_OUTPUT_DATA_SET AT91C_BASE_PIOA->PIO_SODR
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#define PIO_OUTPUT_DATA_CLEAR AT91C_BASE_PIOA->PIO_CODR
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#define PIO_PIN_DATA_STATUS AT91C_BASE_PIOA->PIO_PDSR
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#define PIO_NO_PULL_UP_ENABLE AT91C_BASE_PIOA->PIO_PPUDR
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#define PIO_NO_PULL_UP_DISABLE AT91C_BASE_PIOA->PIO_PPUER
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#define PIO_PERIPHERAL_B_SEL AT91C_BASE_PIOA->PIO_BSR
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#define PIO_PERIPHERAL_A_SEL AT91C_BASE_PIOA->PIO_ASR
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#define PMC_SYS_CLK_ENABLE AT91C_BASE_PMC->PMC_SCER
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#define PMC_PERIPHERAL_CLK_ENABLE AT91C_BASE_PMC->PMC_PCER
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#define PMC_MAIN_OSCILLATOR AT91C_BASE_PMC->PMC_MOR
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#define PMC_PLL AT91C_BASE_PMC->PMC_PLLR
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#define PMC_MASTER_CLK AT91C_BASE_PMC->PMC_MCKR
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#define PMC_PROGRAMMABLE_CLK_0 AT91C_BASE_PMC->PMC_PCKR[0]
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#define PMC_INTERRUPT_STATUS AT91C_BASE_PMC->PMC_SR
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#define SSC_CONTROL AT91C_BASE_SSC->SSC_CR
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#define SSC_CLOCK_DIVISOR AT91C_BASE_SSC->SSC_CMR
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#define SSC_RECEIVE_CLOCK_MODE AT91C_BASE_SSC->SSC_RCMR
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#define SSC_RECEIVE_FRAME_MODE AT91C_BASE_SSC->SSC_RFMR
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#define SSC_TRANSMIT_CLOCK_MODE AT91C_BASE_SSC->SSC_TCMR
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#define SSC_TRANSMIT_FRAME_MODE AT91C_BASE_SSC->SSC_TFMR
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#define SSC_RECEIVE_HOLDING AT91C_BASE_SSC->SSC_RHR
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#define SSC_TRANSMIT_HOLDING AT91C_BASE_SSC->SSC_THR
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#define SSC_STATUS AT91C_BASE_SSC->SSC_SR
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#define SPI_CONTROL AT91C_BASE_SPI->SPI_CR
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#define SPI_MODE AT91C_BASE_SPI->SPI_MR
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#define SPI_TX_DATA AT91C_BASE_SPI->SPI_TDR
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#define SPI_STATUS AT91C_BASE_SPI->SPI_SR
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#define SPI_FOR_CHIPSEL_0 AT91C_BASE_SPI->SPI_CSR[0]
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#define SPI_FOR_CHIPSEL_1 AT91C_BASE_SPI->SPI_CSR[1]
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#define SPI_FOR_CHIPSEL_2 AT91C_BASE_SPI->SPI_CSR[2]
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#define SPI_FOR_CHIPSEL_3 AT91C_BASE_SPI->SPI_CSR[3]
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#define TC1_CCR AT91C_BASE_TC1->TC_CCR
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#define TC1_CMR AT91C_BASE_TC1->TC_CMR
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#define TC1_CV AT91C_BASE_TC1->TC_CV
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#define TC1_RA AT91C_BASE_TC1->TC_RA
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#define TC1_SR AT91C_BASE_TC1->TC_SR
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#define PDC_RX_ENABLE AT91C_PDC_RXTEN
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#define PDC_RX_DISABLE AT91C_PDC_RXTDIS
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#define TC_CMR_ETRGEDG_RISING AT91C_TC_ETRGEDG_RISING
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#define TC_CMR_ABETRG AT91C_TC_ABETRG
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#define TC_CMR_LDRA_RISING AT91C_TC_LDRA_RISING
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#define TC_CMR_LDRB_RISING AT91C_TC_LDRB_RISING
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#define TC_CCR_CLKEN AT91C_TC_CLKEN
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#define TC_CCR_SWTRG AT91C_TC_SWTRG
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#define TC_SR_LDRAS AT91C_TC_LDRAS
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#define TC_CMR_ETRGEDG AT91C_TC_ETRGEDG
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#define TC_CCR_CLKDIS AT91C_TC_CLKDIS
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#define ADC_CONTROL_RESET AT91C_ADC_SWRST
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#define ADC_CONTROL_START AT91C_ADC_START
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#define SPI_CONTROL_ENABLE AT91C_SPI_SPIEN
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#define SPI_CONTROL_LAST_TRANSFER AT91C_SPI_LASTXFER
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#define SPI_CONTROL_RESET AT91C_SPI_SWRST
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#define SPI_CONTROL_DISABLE AT91C_SPI_SPIDIS
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#define SPI_STATUS_TX_EMPTY AT91C_SPI_TXEMPTY
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#define SSC_CONTROL_RX_ENABLE AT91C_SSC_RXEN
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#define SSC_CONTROL_TX_ENABLE AT91C_SSC_TXEN
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#define SSC_FRAME_MODE_MSB_FIRST AT91C_SSC_MSBF
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#define SSC_CONTROL_RESET AT91C_SSC_SWRST
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#define SSC_STATUS_TX_READY AT91C_SSC_TXRDY
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#define SSC_STATUS_RX_READY AT91C_SSC_RXRDY
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#define FCMD_WRITE_PAGE AT91C_MC_FCMD_START_PROG
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#define FLASH_PAGE_SIZE_BYTES AT91C_IFLASH_PAGE_SIZE
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#define RST_CONTROL_PROCESSOR_RESET AT91C_RSTC_PROCRST
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#define RST_STATUS_TYPE_MASK AT91C_RSTC_RSTTYP
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#define RST_STATUS_TYPE_WATCHDOG AT91C_RSTC_RSTTYP_WATCHDOG
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#define RST_STATUS_TYPE_SOFTWARE AT91C_RSTC_RSTTYP_SOFTWARE
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#define RST_STATUS_TYPE_USER AT91C_RSTC_RSTTYP_USER
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#define PMC_SYS_CLK_PROCESSOR_CLK AT91C_PMC_PCK
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#define PMC_SYS_CLK_UDP_CLK AT91C_PMC_UDP
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#define PMC_CLK_SELECTION_PLL_CLOCK AT91C_PMC_CSS_PLL_CLK
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#define PMC_CLK_PRESCALE_DIV_4 AT91C_PMC_PRES_CLK_4
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#define PMC_SYS_CLK_PROGRAMMABLE_CLK_0 AT91C_PMC_PCK0
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#define UDP_INTERRUPT_STATUS AT91C_BASE_UDP->UDP_ISR
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#define UDP_INTERRUPT_CLEAR AT91C_BASE_UDP->UDP_ICR
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#define UDP_FUNCTION_ADDR AT91C_BASE_UDP->UDP_FADDR
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#define UDP_RESET_ENDPOINT AT91C_BASE_UDP->UDP_RSTEP
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#define UDP_GLOBAL_STATE AT91C_BASE_UDP->UDP_GLBSTATE
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#define UDP_ENDPOINT_CSR(x) AT91C_BASE_UDP->UDP_CSR[x]
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#define UDP_ENDPOINT_FIFO(x) AT91C_BASE_UDP->UDP_FDR[x]
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#define UDP_CSR_CONTROL_DATA_DIR AT91C_UDP_DIR
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#define UDP_CSR_ENABLE_EP AT91C_UDP_EPEDS
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#define UDP_CSR_EPTYPE_CONTROL AT91C_UDP_EPTYPE_CTRL
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#define UDP_CSR_EPTYPE_INTERRUPT_IN AT91C_UDP_EPTYPE_INT_IN
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#define UDP_CSR_EPTYPE_INTERRUPT_OUT AT91C_UDP_EPTYPE_INT_OUT
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#define UDP_CSR_FORCE_STALL AT91C_UDP_FORCESTALL
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#define UDP_CSR_RX_HAVE_READ_SETUP_DATA AT91C_UDP_RXSETUP
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#define UDP_CSR_RX_PACKET_RECEIVED_BANK_0 AT91C_UDP_RX_DATA_BK0
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#define UDP_CSR_RX_PACKET_RECEIVED_BANK_1 AT91C_UDP_RX_DATA_BK1
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#define UDP_CSR_STALL_SENT AT91C_UDP_STALLSENT
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#define UDP_CSR_TX_PACKET AT91C_UDP_TXPKTRDY
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#define UDP_CSR_TX_PACKET_ACKED AT91C_UDP_TXCOMP
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#define UDP_FUNCTION_ADDR_ENABLED AT91C_UDP_FEN
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#define UDP_GLOBAL_STATE_ADDRESSED AT91C_UDP_FADDEN
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#define UDP_GLOBAL_STATE_CONFIGURED AT91C_UDP_CONFG
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#define UDP_INTERRUPT_END_OF_BUS_RESET AT91C_UDP_ENDBUSRES
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/***************************************************************
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* end of translation between PM3 defines and AT91 defines
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***************************************************************/
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/***************************************************************
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* the defines below this line have no AT91 equivalents and can
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* be ideally moved to proxmark3.h
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***************************************************************/
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#define WDT_HIT() WDT_CONTROL = 0xa5000001
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#define PWM_CH_MODE_PRESCALER(x) ((x)<<0)
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#define PWM_CHANNEL(x) (1<<(x))
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#define TC_CMR_TCCLKS_TIMER_CLOCK1 (0<<0)
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#define ADC_CHAN_LF 4
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#define ADC_CHAN_HF 5
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#define ADC_MODE_PRESCALE(x) ((x)<<8)
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#define ADC_MODE_STARTUP_TIME(x) ((x)<<16)
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#define ADC_MODE_SAMPLE_HOLD_TIME(x) ((x)<<24)
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#define ADC_CHANNEL(x) (1<<(x))
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#define ADC_END_OF_CONVERSION(x) (1<<(x))
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#define SSC_CLOCK_MODE_START(x) ((x)<<8)
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#define SSC_FRAME_MODE_WORDS_PER_TRANSFER(x) ((x)<<8)
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#define SSC_CLOCK_MODE_SELECT(x) ((x)<<0)
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#define SSC_FRAME_MODE_BITS_IN_WORD(x) (((x)-1)<<0)
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#define MC_FLASH_COMMAND_KEY ((0x5A)<<24)
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#define MC_FLASH_STATUS_READY (1<<0)
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#define MC_FLASH_MODE_FLASH_WAIT_STATES(x) ((x)<<8)
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#define MC_FLASH_MODE_MASTER_CLK_IN_MHZ(x) ((x)<<16)
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#define MC_FLASH_COMMAND_PAGEN(x) ((x)<<8)
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#define RST_CONTROL_KEY (0xA5<<24)
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#define PMC_MAIN_OSCILLATOR_ENABLE (1<<0)
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#define PMC_MAIN_OSCILLATOR_STABILIZED (1<<0)
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#define PMC_MAIN_OSCILLATOR_PLL_LOCK (1<<2)
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#define PMC_MAIN_OSCILLATOR_MCK_READY (1<<3)
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#define PMC_PLL_DIVISOR(x) (x)
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#define PMC_MAIN_OSCILLATOR_STARTUP_DELAY(x) ((x)<<8)
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#define PMC_CLK_PRESCALE_DIV_2 (1<<2)
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#define PMC_PLL_MULTIPLIER(x) (((x)-1)<<16)
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#define PMC_PLL_COUNT_BEFORE_LOCK(x) ((x)<<8)
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#define PMC_PLL_FREQUENCY_RANGE(x) ((x)<<14)
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#define PMC_PLL_USB_DIVISOR(x) ((x)<<28)
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#define UDP_INTERRUPT_ENDPOINT(x) (1<<(x))
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#define UDP_CSR_BYTES_RECEIVED(x) (((x) >> 16) & 0x7ff)
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#endif
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#ifndef __CONFIG_GPIO_H
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#define __CONFIG_GPIO_H
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#define GPIO_LED_A 0
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#define GPIO_PA1 1
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#define GPIO_LED_D 2
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#define GPIO_NVDD_ON 3
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#define GPIO_FPGA_NINIT 4
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#define GPIO_PA5 5
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#define GPIO_PCK0 6
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#define GPIO_LRST 7
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#define GPIO_LED_B 8
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#define GPIO_LED_C 9
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#define GPIO_NCS2 10
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#define GPIO_NCS0 11
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#define GPIO_MISO 12
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#define GPIO_MOSI 13
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#define GPIO_SPCK 14
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#define GPIO_SSC_FRAME 15
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#define GPIO_SSC_CLK 16
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#define GPIO_SSC_DOUT 17
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#define GPIO_SSC_DIN 18
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#define GPIO_MUXSEL_HIPKD 19
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#define GPIO_MUXSEL_LOPKD 20
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#define GPIO_MUXSEL_HIRAW 21
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#define GPIO_MUXSEL_LORAW 22
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#define GPIO_BUTTON 23
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#define GPIO_USB_PU 24
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#define GPIO_RELAY 25
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#define GPIO_FPGA_ON 26
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#define GPIO_FPGA_DONE 27
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#define GPIO_FPGA_NPROGRAM 28
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#define GPIO_FPGA_CCLK 29
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#define GPIO_FPGA_DIN 30
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#define GPIO_FPGA_DOUT 31
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#define ANIN_AMPL_LO 4
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#define ANIN_AMPL_HI 5
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#define GPIO_LED_A AT91C_PIO_PA0
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#define GPIO_PA1 AT91C_PIO_PA1
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#define GPIO_LED_D AT91C_PIO_PA2
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#define GPIO_NVDD_ON AT91C_PIO_PA3
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#define GPIO_FPGA_NINIT AT91C_PIO_PA4
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#define GPIO_PA5 AT91C_PIO_PA5
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#define GPIO_PCK0 AT91C_PA6_PCK0
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#define GPIO_LRST AT91C_PIO_PA7
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#define GPIO_LED_B AT91C_PIO_PA8
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#define GPIO_LED_C AT91C_PIO_PA9
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#define GPIO_NCS2 AT91C_PA10_NPCS2
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#define GPIO_NCS0 AT91C_PA11_NPCS0
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#define GPIO_MISO AT91C_PA12_MISO
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#define GPIO_MOSI AT91C_PA13_MOSI
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#define GPIO_SPCK AT91C_PA14_SPCK
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#define GPIO_SSC_FRAME AT91C_PA15_TF
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#define GPIO_SSC_CLK AT91C_PA16_TK
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#define GPIO_SSC_DOUT AT91C_PA17_TD
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#define GPIO_SSC_DIN AT91C_PA18_RD
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#define GPIO_MUXSEL_HIPKD AT91C_PIO_PA19
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#define GPIO_MUXSEL_LOPKD AT91C_PIO_PA20
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#define GPIO_MUXSEL_HIRAW AT91C_PIO_PA21
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#define GPIO_MUXSEL_LORAW AT91C_PIO_PA22
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#define GPIO_BUTTON AT91C_PIO_PA23
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#define GPIO_USB_PU AT91C_PIO_PA24
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#define GPIO_RELAY AT91C_PIO_PA25
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#define GPIO_FPGA_ON AT91C_PIO_PA26
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#define GPIO_FPGA_DONE AT91C_PIO_PA27
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#define GPIO_FPGA_NPROGRAM AT91C_PIO_PA28
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#define GPIO_FPGA_CCLK AT91C_PIO_PA29
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#define GPIO_FPGA_DIN AT91C_PIO_PA30
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#define GPIO_FPGA_DOUT AT91C_PIO_PA31
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#endif
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@ -7,11 +7,56 @@
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#define __PROXMARK3_H
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// Might as well have the hardware-specific defines everywhere.
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#include <at91sam7s128.h>
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#include <at91sam7s512.h>
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#include <config_gpio.h>
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#define LOW(x) PIO_OUTPUT_DATA_CLEAR = (1 << (x))
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#define HIGH(x) PIO_OUTPUT_DATA_SET = (1 << (x))
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#define WDT_HIT() AT91C_BASE_WDTC->WDTC_WDCR = 0xa5000001
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#define PWM_CH_MODE_PRESCALER(x) ((x)<<0)
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#define PWM_CHANNEL(x) (1<<(x))
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#define TC_CMR_TCCLKS_TIMER_CLOCK1 (0<<0)
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#define ADC_CHAN_LF 4
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#define ADC_CHAN_HF 5
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#define ADC_MODE_PRESCALE(x) ((x)<<8)
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#define ADC_MODE_STARTUP_TIME(x) ((x)<<16)
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#define ADC_MODE_SAMPLE_HOLD_TIME(x) ((x)<<24)
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#define ADC_CHANNEL(x) (1<<(x))
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#define ADC_END_OF_CONVERSION(x) (1<<(x))
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#define SSC_CLOCK_MODE_START(x) ((x)<<8)
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#define SSC_FRAME_MODE_WORDS_PER_TRANSFER(x) ((x)<<8)
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#define SSC_CLOCK_MODE_SELECT(x) ((x)<<0)
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#define SSC_FRAME_MODE_BITS_IN_WORD(x) (((x)-1)<<0)
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#define MC_FLASH_COMMAND_KEY ((0x5a)<<24)
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#define MC_FLASH_STATUS_READY (1<<0)
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#define MC_FLASH_MODE_FLASH_WAIT_STATES(x) ((x)<<8)
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#define MC_FLASH_MODE_MASTER_CLK_IN_MHZ(x) ((x)<<16)
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#define MC_FLASH_COMMAND_PAGEN(x) ((x)<<8)
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#define RST_CONTROL_KEY (0xa5<<24)
|
||||
|
||||
#define PMC_MAIN_OSC_ENABLE (1<<0)
|
||||
#define PMC_MAIN_OSC_STABILIZED (1<<0)
|
||||
#define PMC_MAIN_OSC_PLL_LOCK (1<<2)
|
||||
#define PMC_MAIN_OSC_MCK_READY (1<<3)
|
||||
|
||||
#define PMC_MAIN_OSC_STARTUP_DELAY(x) ((x)<<8)
|
||||
#define PMC_PLL_DIVISOR(x) (x)
|
||||
#define PMC_CLK_PRESCALE_DIV_2 (1<<2)
|
||||
#define PMC_PLL_MULTIPLIER(x) (((x)-1)<<16)
|
||||
#define PMC_PLL_COUNT_BEFORE_LOCK(x) ((x)<<8)
|
||||
#define PMC_PLL_FREQUENCY_RANGE(x) ((x)<<14)
|
||||
#define PMC_PLL_USB_DIVISOR(x) ((x)<<28)
|
||||
|
||||
#define UDP_INTERRUPT_ENDPOINT(x) (1<<(x))
|
||||
#define UDP_CSR_BYTES_RECEIVED(x) (((x) >> 16) & 0x7ff)
|
||||
//**************************************************************
|
||||
|
||||
#define LOW(x) AT91C_BASE_PIOA->PIO_CODR = (x)
|
||||
#define HIGH(x) AT91C_BASE_PIOA->PIO_SODR = (x)
|
||||
|
||||
#define SPI_FPGA_MODE 0
|
||||
#define SPI_LCD_MODE 1
|
||||
|
|
@ -32,22 +77,22 @@ typedef signed short SWORD;
|
|||
#define PACKED __attribute__((__packed__))
|
||||
|
||||
#define USB_D_PLUS_PULLUP_ON() { \
|
||||
PIO_OUTPUT_DATA_SET = (1<<GPIO_USB_PU); \
|
||||
PIO_OUTPUT_ENABLE = (1<<GPIO_USB_PU); \
|
||||
HIGH(GPIO_USB_PU); \
|
||||
AT91C_BASE_PIOA->PIO_OER = GPIO_USB_PU; \
|
||||
}
|
||||
#define USB_D_PLUS_PULLUP_OFF() PIO_OUTPUT_DISABLE = (1<<GPIO_USB_PU)
|
||||
#define USB_D_PLUS_PULLUP_OFF() AT91C_BASE_PIOA->PIO_ODR = GPIO_USB_PU
|
||||
|
||||
#define LED_A_ON() PIO_OUTPUT_DATA_SET = (1<<GPIO_LED_A)
|
||||
#define LED_A_OFF() PIO_OUTPUT_DATA_CLEAR = (1<<GPIO_LED_A)
|
||||
#define LED_B_ON() PIO_OUTPUT_DATA_SET = (1<<GPIO_LED_B)
|
||||
#define LED_B_OFF() PIO_OUTPUT_DATA_CLEAR = (1<<GPIO_LED_B)
|
||||
#define LED_C_ON() PIO_OUTPUT_DATA_SET = (1<<GPIO_LED_C)
|
||||
#define LED_C_OFF() PIO_OUTPUT_DATA_CLEAR = (1<<GPIO_LED_C)
|
||||
#define LED_D_ON() PIO_OUTPUT_DATA_SET = (1<<GPIO_LED_D)
|
||||
#define LED_D_OFF() PIO_OUTPUT_DATA_CLEAR = (1<<GPIO_LED_D)
|
||||
#define RELAY_ON() PIO_OUTPUT_DATA_SET = (1<<GPIO_RELAY)
|
||||
#define RELAY_OFF() PIO_OUTPUT_DATA_CLEAR = (1<<GPIO_RELAY)
|
||||
#define BUTTON_PRESS() !(PIO_PIN_DATA_STATUS & (1<<GPIO_BUTTON))
|
||||
#define LED_A_ON() HIGH(GPIO_LED_A)
|
||||
#define LED_A_OFF() LOW(GPIO_LED_A)
|
||||
#define LED_B_ON() HIGH(GPIO_LED_B)
|
||||
#define LED_B_OFF() LOW(GPIO_LED_B)
|
||||
#define LED_C_ON() HIGH(GPIO_LED_C)
|
||||
#define LED_C_OFF() LOW(GPIO_LED_C)
|
||||
#define LED_D_ON() HIGH(GPIO_LED_D)
|
||||
#define LED_D_OFF() LOW(GPIO_LED_D)
|
||||
#define RELAY_ON() HIGH(GPIO_RELAY)
|
||||
#define RELAY_OFF() LOW(GPIO_RELAY)
|
||||
#define BUTTON_PRESS() !(AT91C_BASE_PIOA->PIO_PDSR & GPIO_BUTTON)
|
||||
//--------------------------------
|
||||
// USB declarations
|
||||
|
||||
|
|
@ -62,7 +107,7 @@ void UsbPacketReceived(BYTE *packet, int len);
|
|||
|
||||
#define VERSION_INFORMATION_MAGIC 0x56334d50
|
||||
struct version_information {
|
||||
int magic; /* Magic sequence to identify this as a correct version information structure. Must be VERSION_INFORMATION_MAGIC */
|
||||
int magic; /* Magic sequence to identify this as a correct version information structure. Must be VERSION_INFORMATION_MAGIC */
|
||||
char versionversion; /* Must be 1 */
|
||||
char present; /* 1 if the version information could be created at compile time, otherwise 0 and the remaining fields (except for magic) are empty */
|
||||
char clean; /* 1: Tree was clean, no local changes. 0: Tree was unclean. 2: Couldn't be determined */
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue