mirror of
https://github.com/Proxmark/proxmark3.git
synced 2025-07-16 02:03:00 -07:00
Initial commit for the firmware. Used the 20090306_ela version as baseline.
It is identical to the popular 20081211, with the doob addition (20090301), a linux client, and two additional commands for LF analysis. Let me know if you find issues here!
This commit is contained in:
parent
b811cc51f9
commit
6658905f18
91 changed files with 16661 additions and 0 deletions
27
fpga/sim.tcl
Normal file
27
fpga/sim.tcl
Normal file
|
@ -0,0 +1,27 @@
|
|||
#------------------------------------------------------------------------------
|
||||
# Run the simulation testbench in ModelSim: recompile both Verilog source
|
||||
# files, then start the simulation, add a lot of signals to the waveform
|
||||
# viewer, and run. I should (TODO) fix the absolute paths at some point.
|
||||
#
|
||||
# Jonathan Westhues, Mar 2006
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
vlog -work work -O0 C:/depot/proximity/mark3/fpga/fpga.v
|
||||
vlog -work work -O0 C:/depot/proximity/mark3/fpga/fpga_tb.v
|
||||
|
||||
vsim work.fpga_tb
|
||||
|
||||
add wave sim:/fpga_tb/adc_clk
|
||||
add wave sim:/fpga_tb/adc_d
|
||||
add wave sim:/fpga_tb/pwr_lo
|
||||
add wave sim:/fpga_tb/ssp_clk
|
||||
add wave sim:/fpga_tb/ssp_frame
|
||||
add wave sim:/fpga_tb/ssp_din
|
||||
add wave sim:/fpga_tb/ssp_dout
|
||||
|
||||
add wave sim:/fpga_tb/dut/clk_lo
|
||||
add wave sim:/fpga_tb/dut/pck_divider
|
||||
add wave sim:/fpga_tb/dut/carrier_divider_lo
|
||||
add wave sim:/fpga_tb/dut/conf_word
|
||||
|
||||
run 30000
|
Loading…
Add table
Add a link
Reference in a new issue