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legic write/simulate [Anon]

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This commit is contained in:
adam@algroup.co.uk 2010-05-06 11:24:01 +00:00
commit 3612a8a8e2
8 changed files with 636 additions and 32 deletions
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8
armsrc/appmain.c
View file

@ -608,6 +608,14 @@ void UsbPacketReceived(uint8_t *packet, int len)
break;
#endif
case CMD_SIMULATE_TAG_LEGIC_RF:
LegicRfSimulate(c->arg[0], c->arg[1], c->arg[2]);
break;
case CMD_WRITER_LEGIC_RF:
LegicRfWriter(c->arg[1], c->arg[0]);
break;
case CMD_READER_LEGIC_RF:
LegicRfReader(c->arg[0], c->arg[1]);
break;

499
armsrc/legicrf.c
View file

@ -22,9 +22,23 @@ static struct legic_frame {
uint32_t data;
} current_frame;
static crc_t legic_crc;
static enum {
STATE_DISCON,
STATE_IV,
STATE_CON,
} legic_state;
static crc_t legic_crc;
static int legic_read_count;
static uint32_t legic_prng_bc;
static uint32_t legic_prng_iv;
static int legic_phase_drift;
static int legic_frame_drift;
static int legic_reqresp_drift;
AT91PS_TC timer;
AT91PS_TC prng_timer;
static void setup_timer(void)
{
@ -37,6 +51,17 @@ static void setup_timer(void)
timer->TC_CMR = AT91C_TC_CLKS_TIMER_DIV3_CLOCK;
timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
/*
* Set up Timer 2 to use for measuring time between frames in
* tag simulation mode. Runs 4x faster as Timer 1
*/
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC2);
prng_timer = AT91C_BASE_TC2;
prng_timer->TC_CCR = AT91C_TC_CLKDIS;
prng_timer->TC_CMR = AT91C_TC_CLKS_TIMER_DIV2_CLOCK;
prng_timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
}
/* At TIMER_CLOCK3 (MCK/32) */
#define RWD_TIME_1 150 /* RWD_TIME_PAUSE off, 80us on = 100us */
#define RWD_TIME_0 90 /* RWD_TIME_PAUSE off, 40us on = 60us */
@ -45,10 +70,90 @@ static void setup_timer(void)
#define TAG_TIME_BIT 150 /* 100us for every bit */
#define TAG_TIME_WAIT 490 /* time from RWD frame end to tag frame start, experimentally determined */
}
#define SIM_DIVISOR 586 /* prng_time/SIM_DIVISOR count prng needs to be forwared */
#define SIM_SHIFT 900 /* prng_time+SIM_SHIFT shift of delayed start */
#define SESSION_IV 0x55
#define OFFSET_LOG 1024
#define FUZZ_EQUAL(value, target, fuzz) ((value) > ((target)-(fuzz)) && (value) < ((target)+(fuzz)))
/* Generate Keystream */
static uint32_t get_key_stream(int skip, int count)
{
uint32_t key=0; int i;
/* Use int to enlarge timer tc to 32bit */
legic_prng_bc += prng_timer->TC_CV;
prng_timer->TC_CCR = AT91C_TC_SWTRG;
/* If skip == -1, forward prng time based */
if(skip == -1) {
i = (legic_prng_bc+SIM_SHIFT)/SIM_DIVISOR; /* Calculate Cycles based on timer */
i -= legic_prng_count(); /* substract cycles of finished frames */
i -= count; /* substract current frame length, rewidn to bedinning */
legic_prng_forward(i);
} else {
legic_prng_forward(skip);
}
/* Write Time Data into LOG */
if(count == 6) { i = -1; } else { i = legic_read_count; }
((uint8_t*)BigBuf)[OFFSET_LOG+128+i] = legic_prng_count();
((uint8_t*)BigBuf)[OFFSET_LOG+256+i*4] = (legic_prng_bc >> 0) & 0xff;
((uint8_t*)BigBuf)[OFFSET_LOG+256+i*4+1] = (legic_prng_bc >> 8) & 0xff;
((uint8_t*)BigBuf)[OFFSET_LOG+256+i*4+2] = (legic_prng_bc >>16) & 0xff;
((uint8_t*)BigBuf)[OFFSET_LOG+256+i*4+3] = (legic_prng_bc >>24) & 0xff;
((uint8_t*)BigBuf)[OFFSET_LOG+384+i] = count;
/* Generate KeyStream */
for(i=0; i<count; i++) {
key |= legic_prng_get_bit() << i;
legic_prng_forward(1);
}
return key;
}
/* Send a frame in tag mode, the FPGA must have been set up by
* LegicRfSimulate
*/
static void frame_send_tag(uint16_t response, int bits, int crypt)
{
/* Bitbang the response */
AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
/* Use time to crypt frame */
if(crypt) {
legic_prng_forward(2); /* TAG_TIME_WAIT -> shift by 2 */
int i; int key = 0;
for(i=0; i<bits; i++) {
key |= legic_prng_get_bit() << i;
legic_prng_forward(1);
}
//Dbprintf("key = 0x%x", key);
response = response ^ key;
}
/* Wait for the frame start */
while(timer->TC_CV < (TAG_TIME_WAIT - 30)) ;
int i;
for(i=0; i<bits; i++) {
int nextbit = timer->TC_CV + TAG_TIME_BIT;
int bit = response & 1;
response = response >> 1;
if(bit) {
AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT;
} else {
AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
}
while(timer->TC_CV < nextbit) ;
}
AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
}
/* Send a frame in reader mode, the FPGA must have been set up by
* LegicRfReader
*/
@ -121,16 +226,16 @@ static void frame_receive_rwd(struct legic_frame * const f, int bits, int crypt)
uint32_t data=0;
int i, old_level=0, edges=0;
int next_bit_at = TAG_TIME_WAIT;
if(bits > 16)
bits = 16;
if(bits > 32) {
bits = 32;
}
AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN;
AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN;
/* we have some time now, precompute the cipher
* since we cannot compute it on the fly while reading */
* since we cannot compute it on the fly while reading */
legic_prng_forward(2);
if(crypt)
@ -147,7 +252,6 @@ static void frame_receive_rwd(struct legic_frame * const f, int bits, int crypt)
for(i=0; i<bits; i++) {
edges = 0;
while(timer->TC_CV < next_bit_at) {
int level = (AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN);
if(level != old_level)
@ -155,11 +259,10 @@ static void frame_receive_rwd(struct legic_frame * const f, int bits, int crypt)
old_level = level;
}
next_bit_at += TAG_TIME_BIT;
if(edges > 20 && edges < 60) { /* expected are 42 edges */
data ^= the_bit;
}
the_bit <<= 1;
}
@ -171,6 +274,15 @@ static void frame_receive_rwd(struct legic_frame * const f, int bits, int crypt)
while(timer->TC_CV > 1) ; /* Wait till the clock has reset */
}
static void frame_append_bit(struct legic_frame * const f, int bit)
{
if(f->bits >= 31) {
return; /* Overflow, won't happen */
}
f->data |= (bit<<f->bits);
f->bits++;
}
static void frame_clean(struct legic_frame * const f)
{
f->data = 0;
@ -186,7 +298,7 @@ static uint32_t perform_setup_phase_rwd(int iv)
legic_prng_init(0); /* no keystream yet */
frame_send_rwd(iv, 7);
legic_prng_init(iv);
legic_prng_init(iv);
frame_clean(&current_frame);
frame_receive_rwd(&current_frame, 6, 1);
@ -233,7 +345,7 @@ int legic_read_byte(int byte_index, int cmd_sz) {
int byte;
legic_prng_forward(4); /* we wait anyways */
while(timer->TC_CV < 387) ; /* ~ 258us + 100us*delay */
while(timer->TC_CV < 387) ; /* ~ 258us + 100us*delay */
frame_send_rwd(1 | (byte_index << 1), cmd_sz);
frame_clean(&current_frame);
@ -242,7 +354,8 @@ int legic_read_byte(int byte_index, int cmd_sz) {
byte = current_frame.data & 0xff;
if( LegicCRC(byte_index, byte, cmd_sz) != (current_frame.data >> 8) ) {
Dbprintf("!!! crc mismatch: expected %x but got %x !!!", LegicCRC(byte_index, current_frame.data & 0xff, cmd_sz), current_frame.data >> 8);
Dbprintf("!!! crc mismatch: expected %x but got %x !!!",
LegicCRC(byte_index, current_frame.data & 0xff, cmd_sz), current_frame.data >> 8);
return -1;
}
@ -256,9 +369,58 @@ int legic_read_byte(int byte_index, int cmd_sz) {
* * wait until the tag sends back an ACK ('1' bit unencrypted)
* * forward the prng based on the timing
*/
int legic_write_byte(int byte, int addr, int addr_sz) {
//do not write UID, CRC, DCF
if(addr <= 0x06) {
return 0;
}
//== send write command ==============================
crc_clear(&legic_crc);
crc_update(&legic_crc, 0, 1); /* CMD_WRITE */
crc_update(&legic_crc, addr, addr_sz);
crc_update(&legic_crc, byte, 8);
void LegicRfReader(int offset, int bytes) {
uint32_t crc = crc_finish(&legic_crc);
uint32_t cmd = ((crc <<(addr_sz+1+8)) //CRC
|(byte <<(addr_sz+1)) //Data
|(addr <<1) //Address
|(0x00 <<0)); //CMD = W
uint32_t cmd_sz = addr_sz+1+8+4; //crc+data+cmd
legic_prng_forward(2); /* we wait anyways */
while(timer->TC_CV < 387) ; /* ~ 258us */
frame_send_rwd(cmd, cmd_sz);
//== wait for ack ====================================
int t, old_level=0, edges=0;
int next_bit_at =0;
while(timer->TC_CV < 387) ; /* ~ 258us */
for(t=0; t<80; t++) {
edges = 0;
next_bit_at += TAG_TIME_BIT;
while(timer->TC_CV < next_bit_at) {
int level = (AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN);
if(level != old_level) {
edges++;
}
old_level = level;
}
if(edges > 20 && edges < 60) { /* expected are 42 edges */
int t = timer->TC_CV;
int c = t/TAG_TIME_BIT;
timer->TC_CCR = AT91C_TC_SWTRG;
while(timer->TC_CV > 1) ; /* Wait till the clock has reset */
legic_prng_forward(c);
return 0;
}
}
timer->TC_CCR = AT91C_TC_SWTRG;
while(timer->TC_CV > 1) ; /* Wait till the clock has reset */
return -1;
}
int LegicRfReader(int offset, int bytes) {
int byte_index=0, cmd_sz=0, card_sz=0;
LegicCommonInit();
@ -266,44 +428,325 @@ void LegicRfReader(int offset, int bytes) {
memset(BigBuf, 0, 1024);
DbpString("setting up legic card");
uint32_t tag_type = perform_setup_phase_rwd(0x55);
uint32_t tag_type = perform_setup_phase_rwd(SESSION_IV);
switch_off_tag_rwd(); //we lose to mutch time with dprintf
switch(tag_type) {
case 0x1d:
DbpString("MIM 256 card found, reading card ...");
cmd_sz = 9;
cmd_sz = 9;
card_sz = 256;
break;
case 0x3d:
DbpString("MIM 1024 card found, reading card ...");
cmd_sz = 11;
cmd_sz = 11;
card_sz = 1024;
break;
default:
Dbprintf("Unknown card format: %x",tag_type);
switch_off_tag_rwd();
return;
return -1;
}
if(bytes == -1) {
bytes = card_sz;
}
if(bytes+offset >= card_sz) {
if(bytes+offset >= card_sz) {
bytes = card_sz-offset;
}
}
switch_off_tag_rwd(); //we lost to mutch time with dprintf
perform_setup_phase_rwd(0x55);
perform_setup_phase_rwd(SESSION_IV);
LED_B_ON();
while(byte_index < bytes) {
int r = legic_read_byte(byte_index+offset, cmd_sz);
if(r == -1) {
Dbprintf("aborting");
int r = legic_read_byte(byte_index+offset, cmd_sz);
if(r == -1 ||BUTTON_PRESS()) {
DbpString("operation aborted");
switch_off_tag_rwd();
return;
LED_B_OFF();
LED_C_OFF();
return -1;
}
((uint8_t*)BigBuf)[byte_index] = r;
WDT_HIT();
byte_index++;
if(byte_index & 0x10) LED_C_ON(); else LED_C_OFF();
}
LED_B_OFF();
LED_C_OFF();
switch_off_tag_rwd();
Dbprintf("Card read, use 'hf legic decode' or 'data hexsamples %d' to view results", (bytes+7) & ~7);
Dbprintf("Card read, use 'hf legic decode' or");
Dbprintf("'data hexsamples %d' to view results", (bytes+7) & ~7);
return 0;
}
void LegicRfWriter(int bytes, int offset) {
int byte_index=0, addr_sz=0;
LegicCommonInit();
DbpString("setting up legic card");
uint32_t tag_type = perform_setup_phase_rwd(SESSION_IV);
switch_off_tag_rwd();
switch(tag_type) {
case 0x1d:
if(offset+bytes > 0x100) {
Dbprintf("Error: can not write to 0x%03.3x on MIM 256", offset+bytes);
return;
}
addr_sz = 8;
Dbprintf("MIM 256 card found, writing 0x%02.2x - 0x%02.2x ...", offset, offset+bytes);
break;
case 0x3d:
if(offset+bytes > 0x400) {
Dbprintf("Error: can not write to 0x%03.3x on MIM 1024", offset+bytes);
return;
}
addr_sz = 10;
Dbprintf("MIM 1024 card found, writing 0x%03.3x - 0x%03.3x ...", offset, offset+bytes);
break;
default:
Dbprintf("No or unknown card found, aborting");
return;
}
LED_B_ON();
perform_setup_phase_rwd(SESSION_IV);
legic_prng_forward(2);
while(byte_index < bytes) {
int r = legic_write_byte(((uint8_t*)BigBuf)[byte_index+offset], byte_index+offset, addr_sz);
if((r != 0) || BUTTON_PRESS()) {
Dbprintf("operation aborted @ 0x%03.3x", byte_index);
switch_off_tag_rwd();
LED_B_OFF();
LED_C_OFF();
return;
}
WDT_HIT();
byte_index++;
if(byte_index & 0x10) LED_C_ON(); else LED_C_OFF();
}
LED_B_OFF();
LED_C_OFF();
DbpString("write successful");
}
int timestamp;
/* Handle (whether to respond) a frame in tag mode */
static void frame_handle_tag(struct legic_frame const * const f)
{
/* First Part of Handshake (IV) */
if(f->bits == 7) {
if(f->data == SESSION_IV) {
LED_C_ON();
prng_timer->TC_CCR = AT91C_TC_SWTRG;
legic_prng_init(f->data);
frame_send_tag(0x3d, 6, 1); /* 0x3d^0x26 = 0x1b */
legic_state = STATE_IV;
legic_read_count = 0;
legic_prng_bc = 0;
legic_prng_iv = f->data;
/* TIMEOUT */
timer->TC_CCR = AT91C_TC_SWTRG;
while(timer->TC_CV > 1);
while(timer->TC_CV < 280);
return;
} else if((prng_timer->TC_CV % 50) > 40) {
legic_prng_init(f->data);
frame_send_tag(0x3d, 6, 1);
SpinDelay(20);
return;
}
}
/* 0x19==??? */
if(legic_state == STATE_IV) {
if((f->bits == 6) && (f->data == (0x19 ^ get_key_stream(1, 6)))) {
legic_state = STATE_CON;
/* TIMEOUT */
timer->TC_CCR = AT91C_TC_SWTRG;
while(timer->TC_CV > 1);
while(timer->TC_CV < 200);
return;
} else {
legic_state = STATE_DISCON;
LED_C_OFF();
Dbprintf("0x19 - Frame: %03.3x", f->data);
return;
}
}
/* Read */
if(f->bits == 11) {
if(legic_state == STATE_CON) {
int key = get_key_stream(-1, 11); //legic_phase_drift, 11);
int addr = f->data ^ key; addr = addr >> 1;
int data = ((uint8_t*)BigBuf)[addr];
int hash = LegicCRC(addr, data, 11) << 8;
((uint8_t*)BigBuf)[OFFSET_LOG+legic_read_count] = (uint8_t)addr;
legic_read_count++;
//Dbprintf("Data:%03.3x, key:%03.3x, addr: %03.3x, read_c:%u", f->data, key, addr, read_c);
legic_prng_forward(legic_reqresp_drift);
frame_send_tag(hash | data, 12, 1);
/* SHORT TIMEOUT */
timer->TC_CCR = AT91C_TC_SWTRG;
while(timer->TC_CV > 1);
legic_prng_forward(legic_frame_drift);
while(timer->TC_CV < 180);
return;
}
}
/* Write */
if(f->bits == 23) {
int key = get_key_stream(-1, 23); //legic_frame_drift, 23);
int addr = f->data ^ key; addr = addr >> 1; addr = addr & 0x3ff;
int data = f->data ^ key; data = data >> 11; data = data & 0xff;
/* write command */
legic_state = STATE_DISCON;
LED_C_OFF();
Dbprintf("write - addr: %x, data: %x", addr, data);
return;
}
if(legic_state != STATE_DISCON) {
Dbprintf("Unexpected: sz:%u, Data:%03.3x, State:%u, Count:%u", f->bits, f->data, legic_state, legic_read_count);
int i;
Dbprintf("IV: %03.3x", legic_prng_iv);
for(i = 0; i<legic_read_count; i++) {
Dbprintf("Read Nb: %u, Addr: %u", i, ((uint8_t*)BigBuf)[OFFSET_LOG+i]);
}
for(i = -1; i<legic_read_count; i++) {
uint32_t t;
t = ((uint8_t*)BigBuf)[OFFSET_LOG+256+i*4];
t |= ((uint8_t*)BigBuf)[OFFSET_LOG+256+i*4+1] << 8;
t |= ((uint8_t*)BigBuf)[OFFSET_LOG+256+i*4+2] <<16;
t |= ((uint8_t*)BigBuf)[OFFSET_LOG+256+i*4+3] <<24;
Dbprintf("Cycles: %u, Frame Length: %u, Time: %u",
((uint8_t*)BigBuf)[OFFSET_LOG+128+i],
((uint8_t*)BigBuf)[OFFSET_LOG+384+i],
t);
}
}
legic_state = STATE_DISCON;
legic_read_count = 0;
SpinDelay(10);
LED_C_OFF();
return;
}
/* Read bit by bit untill full frame is received
* Call to process frame end answer
*/
static void emit(int bit)
{
if(bit == -1) {
if(current_frame.bits <= 4) {
frame_clean(&current_frame);
} else {
frame_handle_tag(&current_frame);
frame_clean(&current_frame);
}
WDT_HIT();
} else if(bit == 0) {
frame_append_bit(&current_frame, 0);
} else if(bit == 1) {
frame_append_bit(&current_frame, 1);
}
}
void LegicRfSimulate(int phase, int frame, int reqresp)
{
/* ADC path high-frequency peak detector, FPGA in high-frequency simulator mode,
* modulation mode set to 212kHz subcarrier. We are getting the incoming raw
* envelope waveform on DIN and should send our response on DOUT.
*
* The LEGIC RF protocol is pulse-pause-encoding from reader to card, so we'll
* measure the time between two rising edges on DIN, and no encoding on the
* subcarrier from card to reader, so we'll just shift out our verbatim data
* on DOUT, 1 bit is 100us. The time from reader to card frame is still unclear,
* seems to be 300us-ish.
*/
if(phase < 0) {
int i;
for(i=0; i<=reqresp; i++) {
legic_prng_init(SESSION_IV);
Dbprintf("i=%u, key 0x%3.3x", i, get_key_stream(i, frame));
}
return;
}
legic_phase_drift = phase;
legic_frame_drift = frame;
legic_reqresp_drift = reqresp;
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
FpgaSetupSsc();
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_212K);
/* Bitbang the receiver */
AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN;
AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN;
setup_timer();
crc_init(&legic_crc, 4, 0x19 >> 1, 0x5, 0);
int old_level = 0;
int active = 0;
legic_state = STATE_DISCON;
LED_B_ON();
DbpString("Starting Legic emulator, press button to end");
while(!BUTTON_PRESS()) {
int level = !!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN);
int time = timer->TC_CV;
if(level != old_level) {
if(level == 1) {
timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
if(FUZZ_EQUAL(time, RWD_TIME_1, RWD_TIME_FUZZ)) {
/* 1 bit */
emit(1);
active = 1;
LED_A_ON();
} else if(FUZZ_EQUAL(time, RWD_TIME_0, RWD_TIME_FUZZ)) {
/* 0 bit */
emit(0);
active = 1;
LED_A_ON();
} else if(active) {
/* invalid */
emit(-1);
active = 0;
LED_A_OFF();
}
}
}
if(time >= (RWD_TIME_1+RWD_TIME_FUZZ) && active) {
/* Frame end */
emit(-1);
active = 0;
LED_A_OFF();
}
if(time >= (20*RWD_TIME_1) && (timer->TC_SR & AT91C_TC_CLKSTA)) {
timer->TC_CCR = AT91C_TC_CLKDIS;
}
old_level = level;
WDT_HIT();
}
DbpString("Stopped");
LED_B_OFF();
LED_A_OFF();
LED_C_OFF();
}

5
armsrc/legicrf.h
View file

@ -11,7 +11,8 @@
#ifndef __LEGICRF_H
#define __LEGICRF_H
extern void LegicRfSimulate(void);
extern void LegicRfReader(int bytes, int offset);
extern void LegicRfSimulate(int phase, int frame, int reqresp);
extern int LegicRfReader(int bytes, int offset);
extern void LegicRfWriter(int bytes, int offset);
#endif /* __LEGICRF_H */

138
client/cmdhflegic.c
View file

@ -24,6 +24,11 @@ static command_t CommandTable[] =
{"help", CmdHelp, 1, "This help"},
{"decode", CmdLegicDecode, 0, "Display deobfuscated and decoded LEGIC RF tag data (use after hf legic reader)"},
{"reader", CmdLegicRFRead, 0, "[offset [length]] -- read bytes from a LEGIC card"},
{"save", CmdLegicSave, 0, "<filename> [<length>] -- Store samples"},
{"load", CmdLegicLoad, 0, "<filename> -- Restore samples"},
{"sim", CmdLegicRfSim, 0, "[phase drift [frame drift [req/resp drift]]] Start tag simulator (use after load or read)"},
{"write", CmdLegicRfWrite,0, "<offset> <length> -- Write sample buffer (user after load or read)"},
{"fill", CmdLegicRfFill, 0, "<offset> <length> <value> -- Fill/Write tag with constant value"},
{NULL, NULL, 0, NULL}
};
@ -225,3 +230,136 @@ int CmdLegicRFRead(const char *Cmd)
SendCommand(&c);
return 0;
}
int CmdLegicLoad(const char *Cmd)
{
FILE *f = fopen(Cmd, "r");
if(!f) {
PrintAndLog("couldn't open '%s'", Cmd);
return -1;
}
char line[80]; int offset = 0; unsigned int data[8];
while(fgets(line, sizeof(line), f)) {
int res = sscanf(line, "%x %x %x %x %x %x %x %x",
&data[0], &data[1], &data[2], &data[3],
&data[4], &data[5], &data[6], &data[7]);
if(res != 8) {
PrintAndLog("Error: could not read samples");
fclose(f);
return -1;
}
UsbCommand c={CMD_DOWNLOADED_SIM_SAMPLES_125K, {offset, 0, 0}};
int j; for(j = 0; j < 8; j++) {
c.d.asBytes[j] = data[j];
}
SendCommand(&c);
WaitForResponse(CMD_ACK);
offset += 8;
}
fclose(f);
PrintAndLog("loaded %u samples", offset);
return 0;
}
int CmdLegicSave(const char *Cmd)
{
int n;
int requested = 1024;
int offset = 0;
char filename[1024];
sscanf(Cmd, " %s %i %i", filename, &requested, &offset);
if (offset % 4 != 0) {
PrintAndLog("Offset must be a multiple of 4");
return 0;
}
offset = offset/4;
int delivered = 0;
if (requested == 0) {
n = 12;
requested = 12;
} else {
n = requested/4;
}
FILE *f = fopen(filename, "w");
if(!f) {
PrintAndLog("couldn't open '%s'", Cmd+1);
return -1;
}
for (int i = offset; i < n+offset; i += 12) {
UsbCommand c = {CMD_DOWNLOAD_RAW_ADC_SAMPLES_125K, {i, 0, 0}};
SendCommand(&c);
WaitForResponse(CMD_DOWNLOADED_RAW_ADC_SAMPLES_125K);
for (int j = 0; j < 48; j += 8) {
fprintf(f, "%02x %02x %02x %02x %02x %02x %02x %02x\n",
sample_buf[j+0],
sample_buf[j+1],
sample_buf[j+2],
sample_buf[j+3],
sample_buf[j+4],
sample_buf[j+5],
sample_buf[j+6],
sample_buf[j+7]
);
delivered += 8;
if (delivered >= requested)
break;
}
if (delivered >= requested)
break;
}
fclose(f);
PrintAndLog("saved %u samples", delivered);
return 0;
}
int CmdLegicRfSim(const char *Cmd)
{
UsbCommand c={CMD_SIMULATE_TAG_LEGIC_RF};
c.arg[0] = 6;
c.arg[1] = 3;
c.arg[2] = 0;
sscanf(Cmd, " %i %i %i", &c.arg[0], &c.arg[1], &c.arg[2]);
SendCommand(&c);
return 0;
}
int CmdLegicRfWrite(const char *Cmd)
{
UsbCommand c={CMD_WRITER_LEGIC_RF};
int res = sscanf(Cmd, " 0x%x 0x%x", &c.arg[0], &c.arg[1]);
if(res != 2) {
PrintAndLog("Please specify the offset and length as two hex strings");
return -1;
}
SendCommand(&c);
return 0;
}
int CmdLegicRfFill(const char *Cmd)
{
UsbCommand cmd ={CMD_WRITER_LEGIC_RF};
int res = sscanf(Cmd, " 0x%x 0x%x 0x%x", &cmd.arg[0], &cmd.arg[1], &cmd.arg[2]);
if(res != 3) {
PrintAndLog("Please specify the offset, length and value as two hex strings");
return -1;
}
int i;
UsbCommand c={CMD_DOWNLOADED_SIM_SAMPLES_125K, {0, 0, 0}};
for(i = 0; i < 48; i++) {
c.d.asBytes[i] = cmd.arg[2];
}
for(i = 0; i < 22; i++) {
c.arg[0] = i*48;
SendCommand(&c);
WaitForResponse(CMD_ACK);
}
SendCommand(&cmd);
return 0;
}

5
client/cmdhflegic.h
View file

@ -15,5 +15,10 @@ int CmdHFLegic(const char *Cmd);
int CmdLegicRFRead(const char *Cmd);
int CmdLegicDecode(const char *Cmd);
int CmdLegicLoad(const char *Cmd);
int CmdLegicSave(const char *Cmd);
int CmdLegicRfSim(const char *Cmd);
int CmdLegicRfWrite(const char *Cmd);
int CmdLegicRfFill(const char *Cmd);
#endif

11
common/legic_prng.c
View file

@ -9,11 +9,13 @@
#include "legic_prng.h"
struct lfsr {
uint8_t a;
uint8_t b;
uint8_t a;
uint8_t b;
uint32_t c;
} lfsr;
void legic_prng_init(uint8_t init) {
lfsr.c = 0;
lfsr.a = init;
if(init == 0) /* hack to get a always 0 keystream */
lfsr.b = 0;
@ -22,12 +24,17 @@ void legic_prng_init(uint8_t init) {
}
void legic_prng_forward(int count) {
lfsr.c += count;
while(count--) {
lfsr.a = lfsr.a >> 1 | (lfsr.a ^ lfsr.a >> 6) << 6;
lfsr.b = lfsr.b >> 1 | (lfsr.b ^ lfsr.b >> 2 ^ lfsr.b >> 3 ^ lfsr.b >> 7) << 7;
}
}
int legic_prng_count() {
return lfsr.c;
}
uint8_t legic_prng_get_bit() {
uint8_t idx = 7 - ( (lfsr.a & 4) | (lfsr.a >> 2 & 2) | (lfsr.a >> 4 & 1) );
return lfsr.b >> idx & 1;

1
include/legic_prng.h
View file

@ -12,6 +12,7 @@
#include <stdint.h>
extern void legic_prng_init(uint8_t init);
extern void legic_prng_forward(int count);
extern int legic_prng_count();
extern uint8_t legic_prng_get_bit();
#endif

1
include/usb_cmd.h
View file

@ -84,6 +84,7 @@ typedef struct {
#define CMD_SIMULATE_MIFARE_CARD 0x0386
#define CMD_SIMULATE_TAG_LEGIC_RF 0x0387
#define CMD_READER_LEGIC_RF 0x0388
#define CMD_WRITER_LEGIC_RF 0x0399
#define CMD_READER_MIFARE 0x0389
// For measurements of the antenna tuning