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refactor lfops t55xx functions

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share t55xx configuration register definitions with client for later use
(warning - compiled but not fully tested yet)
This commit is contained in:
marshmellow42 2015-10-24 09:54:04 -04:00
parent 88f475cf6b
commit 3606ac0a2b
7 changed files with 180 additions and 313 deletions
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3
armsrc/Makefile
View file

@ -15,7 +15,7 @@ APP_CFLAGS = -DWITH_ISO14443a_StandAlone -DWITH_LF -DWITH_ISO15693 -DWITH_ISO144
#-DWITH_LCD #-DWITH_LCD
#SRC_LCD = fonts.c LCD.c #SRC_LCD = fonts.c LCD.c
SRC_LF = lfops.c hitag2.c lfsampling.c pcf7931.c SRC_LF = lfops.c hitag2.c lfsampling.c pcf7931.c lfdemod.c protocols.c
SRC_ISO15693 = iso15693.c iso15693tools.c SRC_ISO15693 = iso15693.c iso15693tools.c
SRC_ISO14443a = epa.c iso14443a.c mifareutil.c mifarecmd.c mifaresniff.c SRC_ISO14443a = epa.c iso14443a.c mifareutil.c mifarecmd.c mifaresniff.c
SRC_ISO14443b = iso14443b.c SRC_ISO14443b = iso14443b.c
@ -52,7 +52,6 @@ THUMBSRC = start.c \
# These are to be compiled in ARM mode # These are to be compiled in ARM mode
ARMSRC = fpgaloader.c \ ARMSRC = fpgaloader.c \
legicrf.c \ legicrf.c \
lfdemod.c \
$(SRC_ISO14443a) \ $(SRC_ISO14443a) \
$(SRC_ISO14443b) \ $(SRC_ISO14443b) \
$(SRC_CRAPTO1) \ $(SRC_CRAPTO1) \

4
armsrc/apps.h
View file

@ -77,8 +77,8 @@ void CopyIOtoT55x7(uint32_t hi, uint32_t lo, uint8_t longFMT); // Clone an ioPro
void SimulateTagLowFrequencyBidir(int divisor, int max_bitlen); void SimulateTagLowFrequencyBidir(int divisor, int max_bitlen);
void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT); // Clone an HID card to T5557/T5567 void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT); // Clone an HID card to T5557/T5567
void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo); void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo);
void CopyIndala64toT55x7(int hi, int lo); // Clone Indala 64-bit tag by UID to T55x7 void CopyIndala64toT55x7(uint32_t hi, uint32_t lo); // Clone Indala 64-bit tag by UID to T55x7
void CopyIndala224toT55x7(int uid1, int uid2, int uid3, int uid4, int uid5, int uid6, int uid7); // Clone Indala 224-bit tag by UID to T55x7 void CopyIndala224toT55x7(uint32_t uid1, uint32_t uid2, uint32_t uid3, uint32_t uid4, uint32_t uid5, uint32_t uid6, uint32_t uid7); // Clone Indala 224-bit tag by UID to T55x7
void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode); void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode);
void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd); void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd);
void T55xxWakeUp(uint32_t Pwd); void T55xxWakeUp(uint32_t Pwd);

344
armsrc/lfops.c
View file

@ -16,6 +16,7 @@
#include "string.h" #include "string.h"
#include "lfdemod.h" #include "lfdemod.h"
#include "lfsampling.h" #include "lfsampling.h"
#include "protocols.h"
#include "usb_cdc.h" //test #include "usb_cdc.h" //test
/** /**
@ -648,7 +649,6 @@ static void biphaseSimBit(uint8_t c, int *n, uint8_t clock, uint8_t *phase)
memset(dest+(*n), c ^ *phase, clock); memset(dest+(*n), c ^ *phase, clock);
*phase ^= 1; *phase ^= 1;
} }
} }
// args clock, ask/man or askraw, invert, transmission separator // args clock, ask/man or askraw, invert, transmission separator
@ -1062,62 +1062,14 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
} }
/*------------------------------ /*------------------------------
* T5555/T5557/T5567 routines * T5555/T5557/T5567/T5577 routines
*------------------------------ *------------------------------
*/ */
/* T55x7 configuration register definitions */ /* NOTE: T55x7/T5555 configuration register definitions moved to protocols.h */
#define T55x7_POR_DELAY 0x00000001
#define T55x7_ST_TERMINATOR 0x00000008
#define T55x7_PWD 0x00000010
#define T55x7_MAXBLOCK_SHIFT 5
#define T55x7_AOR 0x00000200
#define T55x7_PSKCF_RF_2 0
#define T55x7_PSKCF_RF_4 0x00000400
#define T55x7_PSKCF_RF_8 0x00000800
#define T55x7_MODULATION_DIRECT 0
#define T55x7_MODULATION_PSK1 0x00001000
#define T55x7_MODULATION_PSK2 0x00002000
#define T55x7_MODULATION_PSK3 0x00003000
#define T55x7_MODULATION_FSK1 0x00004000
#define T55x7_MODULATION_FSK2 0x00005000
#define T55x7_MODULATION_FSK1a 0x00006000
#define T55x7_MODULATION_FSK2a 0x00007000
#define T55x7_MODULATION_MANCHESTER 0x00008000
#define T55x7_MODULATION_BIPHASE 0x00010000
#define T55x7_MODULATION_DIPHASE 0x00018000
#define T55x7_BITRATE_RF_8 0
#define T55x7_BITRATE_RF_16 0x00040000
#define T55x7_BITRATE_RF_32 0x00080000
#define T55x7_BITRATE_RF_40 0x000C0000
#define T55x7_BITRATE_RF_50 0x00100000
#define T55x7_BITRATE_RF_64 0x00140000
#define T55x7_BITRATE_RF_100 0x00180000
#define T55x7_BITRATE_RF_128 0x001C0000
/* T5555 (Q5) configuration register definitions */
#define T5555_ST_TERMINATOR 0x00000001
#define T5555_MAXBLOCK_SHIFT 0x00000001
#define T5555_MODULATION_MANCHESTER 0
#define T5555_MODULATION_PSK1 0x00000010
#define T5555_MODULATION_PSK2 0x00000020
#define T5555_MODULATION_PSK3 0x00000030
#define T5555_MODULATION_FSK1 0x00000040
#define T5555_MODULATION_FSK2 0x00000050
#define T5555_MODULATION_BIPHASE 0x00000060
#define T5555_MODULATION_DIRECT 0x00000070
#define T5555_INVERT_OUTPUT 0x00000080
#define T5555_PSK_RF_2 0
#define T5555_PSK_RF_4 0x00000100
#define T5555_PSK_RF_8 0x00000200
#define T5555_USE_PWD 0x00000400
#define T5555_USE_AOR 0x00000800
#define T5555_BITRATE_SHIFT 12
#define T5555_FAST_WRITE 0x00004000
#define T5555_PAGE_SELECT 0x00008000
/* /*
* Relevant times in microsecond * Relevant communication times in microsecond
* To compensate antenna falling times shorten the write times * To compensate antenna falling times shorten the write times
* and enlarge the gap ones. * and enlarge the gap ones.
* Q5 tags seems to have issues when these values changes. * Q5 tags seems to have issues when these values changes.
@ -1150,11 +1102,10 @@ void TurnReadLFOn(int delay) {
// Write one bit to card // Write one bit to card
void T55xxWriteBit(int bit) { void T55xxWriteBit(int bit) {
FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
if (!bit) if (!bit)
SpinDelayUs(WRITE_0); TurnReadLFOn(WRITE_0);
else else
SpinDelayUs(WRITE_1); TurnReadLFOn(WRITE_1);
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
SpinDelayUs(WRITE_GAP); SpinDelayUs(WRITE_GAP);
} }
@ -1227,7 +1178,7 @@ void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) {
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
SpinDelayUs(START_GAP); SpinDelayUs(START_GAP);
// Opcode 10 // Opcode 1[page]
T55xxWriteBit(1); T55xxWriteBit(1);
T55xxWriteBit(Page); //Page 0 T55xxWriteBit(Page); //Page 0
@ -1256,37 +1207,6 @@ void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) {
LED_A_OFF(); LED_A_OFF();
} }
/*
// Read card traceability data (page 1)
void T55xxReadTrace(void){
LED_A_ON();
//clear buffer now so it does not interfere with timing later
BigBuf_Clear_ext(false);
// Set up FPGA, 125kHz
LFSetupFPGAForADC(95, true);
// Trigger T55x7 Direct Access Mode
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
SpinDelayUs(START_GAP);
// Opcode 11
T55xxWriteBit(1);
T55xxWriteBit(1); //Page 1
// Turn field on to read the response
TurnReadLFOn(READ_GAP);
// Acquisition
doT55x7Acquisition();
// Turn the field off
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
cmd_send(CMD_ACK,0,0,0,0,0);
LED_A_OFF();
}
*/
void T55xxWakeUp(uint32_t Pwd){ void T55xxWakeUp(uint32_t Pwd){
LED_B_ON(); LED_B_ON();
uint32_t i = 0; uint32_t i = 0;
@ -1311,13 +1231,20 @@ void T55xxWakeUp(uint32_t Pwd){
} }
/*-------------- Cloning routines -----------*/ /*-------------- Cloning routines -----------*/
// Copy HID id to card and setup block 0 config
void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
{
int data1=0, data2=0, data3=0, data4=0, data5=0, data6=0; //up to six blocks for long format
int last_block = 0;
if (longFMT){ void WriteT55xx(uint32_t *blockdata, uint8_t startblock, uint8_t numblocks) {
// write last block first and config block last (if included)
for (uint8_t i = numblocks; i > startblock; i--)
T55xxWriteBlock(blockdata[i-1],i-1,0,0);
}
// Copy HID id to card and setup block 0 config
void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT) {
uint32_t data[] = {0,0,0,0,0,0,0};
//int data1=0, data2=0, data3=0, data4=0, data5=0, data6=0; //up to six blocks for long format
uint8_t last_block = 0;
if (longFMT) {
// Ensure no more than 84 bits supplied // Ensure no more than 84 bits supplied
if (hi2>0xFFFFF) { if (hi2>0xFFFFF) {
DbpString("Tags can only have 84 bits."); DbpString("Tags can only have 84 bits.");
@ -1325,108 +1252,34 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
} }
// Build the 6 data blocks for supplied 84bit ID // Build the 6 data blocks for supplied 84bit ID
last_block = 6; last_block = 6;
data1 = 0x1D96A900; // load preamble (1D) & long format identifier (9E manchester encoded) // load preamble (1D) & long format identifier (9E manchester encoded)
for (int i=0;i<4;i++) { data[1] = 0x1D96A900 | manchesterEncode2Bytes((hi2 >> 16) & 0xF);
if (hi2 & (1<<(19-i))) // load raw id from hi2, hi, lo to data blocks (manchester encoded)
data1 |= (1<<(((3-i)*2)+1)); // 1 -> 10 data[2] = manchesterEncode2Bytes(hi2 & 0xFFFF);
else data[3] = manchesterEncode2Bytes(hi >> 16);
data1 |= (1<<((3-i)*2)); // 0 -> 01 data[4] = manchesterEncode2Bytes(hi & 0xFFFF);
} data[5] = manchesterEncode2Bytes(lo >> 16);
data[6] = manchesterEncode2Bytes(lo & 0xFFFF);
data2 = 0; } else {
for (int i=0;i<16;i++) {
if (hi2 & (1<<(15-i)))
data2 |= (1<<(((15-i)*2)+1)); // 1 -> 10
else
data2 |= (1<<((15-i)*2)); // 0 -> 01
}
data3 = 0;
for (int i=0;i<16;i++) {
if (hi & (1<<(31-i)))
data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
else
data3 |= (1<<((15-i)*2)); // 0 -> 01
}
data4 = 0;
for (int i=0;i<16;i++) {
if (hi & (1<<(15-i)))
data4 |= (1<<(((15-i)*2)+1)); // 1 -> 10
else
data4 |= (1<<((15-i)*2)); // 0 -> 01
}
data5 = 0;
for (int i=0;i<16;i++) {
if (lo & (1<<(31-i)))
data5 |= (1<<(((15-i)*2)+1)); // 1 -> 10
else
data5 |= (1<<((15-i)*2)); // 0 -> 01
}
data6 = 0;
for (int i=0;i<16;i++) {
if (lo & (1<<(15-i)))
data6 |= (1<<(((15-i)*2)+1)); // 1 -> 10
else
data6 |= (1<<((15-i)*2)); // 0 -> 01
}
}
else {
// Ensure no more than 44 bits supplied // Ensure no more than 44 bits supplied
if (hi>0xFFF) { if (hi>0xFFF) {
DbpString("Tags can only have 44 bits."); DbpString("Tags can only have 44 bits.");
return; return;
} }
// Build the 3 data blocks for supplied 44bit ID // Build the 3 data blocks for supplied 44bit ID
last_block = 3; last_block = 3;
// load preamble
data1 = 0x1D000000; // load preamble data[1] = 0x1D000000 | manchesterEncode2Bytes(hi & 0xFFF);
data[2] = manchesterEncode2Bytes(lo >> 16);
for (int i=0;i<12;i++) { data[3] = manchesterEncode2Bytes(lo & 0xFFFF);
if (hi & (1<<(11-i)))
data1 |= (1<<(((11-i)*2)+1)); // 1 -> 10
else
data1 |= (1<<((11-i)*2)); // 0 -> 01
}
data2 = 0;
for (int i=0;i<16;i++) {
if (lo & (1<<(31-i)))
data2 |= (1<<(((15-i)*2)+1)); // 1 -> 10
else
data2 |= (1<<((15-i)*2)); // 0 -> 01
}
data3 = 0;
for (int i=0;i<16;i++) {
if (lo & (1<<(15-i)))
data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
else
data3 |= (1<<((15-i)*2)); // 0 -> 01
}
} }
// load chip config block
data[0] = T55x7_BITRATE_RF_50 | T55x7_MODULATION_FSK2a | last_block << T55x7_MAXBLOCK_SHIFT;
LED_D_ON(); LED_D_ON();
// Program the data blocks for supplied ID // Program the data blocks for supplied ID
// and the block 0 for HID format // and the block 0 for HID format
T55xxWriteBlock(data1,1,0,0); WriteT55xx(data, 0, last_block+1);
T55xxWriteBlock(data2,2,0,0);
T55xxWriteBlock(data3,3,0,0);
if (longFMT) { // if long format there are 6 blocks
T55xxWriteBlock(data4,4,0,0);
T55xxWriteBlock(data5,5,0,0);
T55xxWriteBlock(data6,6,0,0);
}
// Config for HID (RF/50, FSK2a, Maxblock=3 for short/6 for long)
T55xxWriteBlock(T55x7_BITRATE_RF_50 |
T55x7_MODULATION_FSK2a |
last_block << T55x7_MAXBLOCK_SHIFT,
0,0,0);
LED_D_OFF(); LED_D_OFF();
@ -1435,26 +1288,44 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
void CopyIOtoT55x7(uint32_t hi, uint32_t lo, uint8_t longFMT) void CopyIOtoT55x7(uint32_t hi, uint32_t lo, uint8_t longFMT)
{ {
int data1=0, data2=0; //up to six blocks for long format uint32_t data[] = {T55x7_BITRATE_RF_64 | T55x7_MODULATION_FSK2a | (2 << T55x7_MAXBLOCK_SHIFT), hi, lo};
data1 = hi; // load preamble
data2 = lo;
LED_D_ON(); LED_D_ON();
// Program the data blocks for supplied ID // Program the data blocks for supplied ID
// and the block 0 for HID format // and the block 0 config
T55xxWriteBlock(data1,1,0,0); WriteT55xx(data, 0, 3);
T55xxWriteBlock(data2,2,0,0);
//Config Block
T55xxWriteBlock(0x00147040,0,0,0);
LED_D_OFF(); LED_D_OFF();
DbpString("DONE!"); DbpString("DONE!");
} }
// Clone Indala 64-bit tag by UID to T55x7
void CopyIndala64toT55x7(uint32_t hi, uint32_t lo) {
//Program the 2 data blocks for supplied 64bit UID
// and the Config for Indala 64 format (RF/32;PSK1 with RF/2;Maxblock=2)
uint32_t data[] = { T55x7_BITRATE_RF_32 | T55x7_MODULATION_PSK1 | (2 << T55x7_MAXBLOCK_SHIFT), hi, lo};
WriteT55xx(data, 0, 3);
//Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=2;Inverse data)
// T5567WriteBlock(0x603E1042,0);
DbpString("DONE!");
}
// Clone Indala 224-bit tag by UID to T55x7
void CopyIndala224toT55x7(uint32_t uid1, uint32_t uid2, uint32_t uid3, uint32_t uid4, uint32_t uid5, uint32_t uid6, uint32_t uid7)
{
//Program the 7 data blocks for supplied 224bit UID
uint32_t data[] = {0, uid1, uid2, uid3, uid4, uid5, uid6, uid7};
// and the block 0 for Indala224 format
//Config for Indala (RF/32;PSK1 with RF/2;Maxblock=7)
data[0] = T55x7_BITRATE_RF_32 | T55x7_MODULATION_PSK1 | (7 << T55x7_MAXBLOCK_SHIFT);
WriteT55xx(data, 0, 8);
//Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=7;Inverse data)
// T5567WriteBlock(0x603E10E2,0);
DbpString("DONE!");
}
// Define 9bit header for EM410x tags // Define 9bit header for EM410x tags
#define EM410X_HEADER 0x1FF #define EM410X_HEADER 0x1FF
#define EM410X_ID_LENGTH 40 #define EM410X_ID_LENGTH 40
void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo) void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
@ -1518,98 +1389,29 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
LED_D_ON(); LED_D_ON();
// Write EM410x ID // Write EM410x ID
T55xxWriteBlock((uint32_t)(id >> 32), 1, 0, 0); uint32_t data[] = {0, id>>32, id & 0xFFFF};
T55xxWriteBlock((uint32_t)id, 2, 0, 0);
// Config for EM410x (RF/64, Manchester, Maxblock=2)
if (card) { if (card) {
// Clock rate is stored in bits 8-15 of the card value
clock = (card & 0xFF00) >> 8; clock = (card & 0xFF00) >> 8;
clock = (clock == 0) ? 64 : clock;
Dbprintf("Clock rate: %d", clock); Dbprintf("Clock rate: %d", clock);
switch (clock) { clock = GetT55xxClockBit(clock);
case 50: if (clock == 0) {
clock = T55x7_BITRATE_RF_50;
case 40:
clock = T55x7_BITRATE_RF_40;
case 32:
clock = T55x7_BITRATE_RF_32;
break;
case 16:
clock = T55x7_BITRATE_RF_16;
break;
case 0:
// A value of 0 is assumed to be 64 for backwards-compatibility
// Fall through...
case 64:
clock = T55x7_BITRATE_RF_64;
break;
default:
Dbprintf("Invalid clock rate: %d", clock); Dbprintf("Invalid clock rate: %d", clock);
return; return;
} }
// Writing configuration for T55x7 tag data[0] = clock | T55x7_MODULATION_MANCHESTER | (2 << T55x7_MAXBLOCK_SHIFT);
T55xxWriteBlock(clock | } else {
T55x7_MODULATION_MANCHESTER | data[0] = (0x1F << T5555_BITRATE_SHIFT) | T5555_MODULATION_MANCHESTER | (2 << T5555_MAXBLOCK_SHIFT);
2 << T55x7_MAXBLOCK_SHIFT,
0, 0, 0);
} }
else
// Writing configuration for T5555(Q5) tag WriteT55xx(data, 0, 3);
T55xxWriteBlock(0x1F << T5555_BITRATE_SHIFT |
T5555_MODULATION_MANCHESTER |
2 << T5555_MAXBLOCK_SHIFT,
0, 0, 0);
LED_D_OFF(); LED_D_OFF();
Dbprintf("Tag %s written with 0x%08x%08x\n", card ? "T55x7":"T5555", Dbprintf("Tag %s written with 0x%08x%08x\n", card ? "T55x7":"T5555",
(uint32_t)(id >> 32), (uint32_t)id); (uint32_t)(id >> 32), (uint32_t)id);
} }
// Clone Indala 64-bit tag by UID to T55x7
void CopyIndala64toT55x7(int hi, int lo)
{
//Program the 2 data blocks for supplied 64bit UID
// and the block 0 for Indala64 format
T55xxWriteBlock(hi,1,0,0);
T55xxWriteBlock(lo,2,0,0);
//Config for Indala (RF/32;PSK1 with RF/2;Maxblock=2)
T55xxWriteBlock(T55x7_BITRATE_RF_32 |
T55x7_MODULATION_PSK1 |
2 << T55x7_MAXBLOCK_SHIFT,
0, 0, 0);
//Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=2;Inverse data)
// T5567WriteBlock(0x603E1042,0);
DbpString("DONE!");
}
void CopyIndala224toT55x7(int uid1, int uid2, int uid3, int uid4, int uid5, int uid6, int uid7)
{
//Program the 7 data blocks for supplied 224bit UID
// and the block 0 for Indala224 format
T55xxWriteBlock(uid1,1,0,0);
T55xxWriteBlock(uid2,2,0,0);
T55xxWriteBlock(uid3,3,0,0);
T55xxWriteBlock(uid4,4,0,0);
T55xxWriteBlock(uid5,5,0,0);
T55xxWriteBlock(uid6,6,0,0);
T55xxWriteBlock(uid7,7,0,0);
//Config for Indala (RF/32;PSK1 with RF/2;Maxblock=7)
T55xxWriteBlock(T55x7_BITRATE_RF_32 |
T55x7_MODULATION_PSK1 |
7 << T55x7_MAXBLOCK_SHIFT,
0,0,0);
//Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=7;Inverse data)
// T5567WriteBlock(0x603E10E2,0);
DbpString("DONE!");
}
//----------------------------------- //-----------------------------------
// EM4469 / EM4305 routines // EM4469 / EM4305 routines
//----------------------------------- //-----------------------------------

10
common/lfdemod.c
View file

@ -282,6 +282,16 @@ int manrawdecode(uint8_t * BitStream, size_t *size, uint8_t invert)
return bestErr; return bestErr;
} }
uint32_t manchesterEncode2Bytes(uint16_t datain) {
uint32_t output = 0;
uint8_t curBit = 0;
for (uint8_t i=0; i<16; i++) {
curBit = (datain >> (15-i) & 1);
output |= (1<<(((15-i)*2)+curBit));
}
return output;
}
//by marshmellow //by marshmellow
//encode binary data into binary manchester //encode binary data into binary manchester
int ManchesterEncode(uint8_t *BitStream, size_t size) int ManchesterEncode(uint8_t *BitStream, size_t size)

1
common/lfdemod.h
View file

@ -30,6 +30,7 @@ int DetectStrongAskClock(uint8_t dest[], size_t size, uint8_t high, uint8_t
uint8_t Em410xDecode(uint8_t *BitStream, size_t *size, size_t *startIdx, uint32_t *hi, uint64_t *lo); uint8_t Em410xDecode(uint8_t *BitStream, size_t *size, size_t *startIdx, uint32_t *hi, uint64_t *lo);
int fskdemod(uint8_t *dest, size_t size, uint8_t rfLen, uint8_t invert, uint8_t fchigh, uint8_t fclow); int fskdemod(uint8_t *dest, size_t size, uint8_t rfLen, uint8_t invert, uint8_t fchigh, uint8_t fclow);
int getHiLo(uint8_t *BitStream, size_t size, int *high, int *low, uint8_t fuzzHi, uint8_t fuzzLo); int getHiLo(uint8_t *BitStream, size_t size, int *high, int *low, uint8_t fuzzHi, uint8_t fuzzLo);
uint32_t manchesterEncode2Bytes(uint16_t datain);
int ManchesterEncode(uint8_t *BitStream, size_t size); int ManchesterEncode(uint8_t *BitStream, size_t size);
int manrawdecode(uint8_t *BitStream, size_t *size, uint8_t invert); int manrawdecode(uint8_t *BitStream, size_t *size, uint8_t invert);
int nrzRawDemod(uint8_t *dest, size_t *size, int *clk, int *invert, int maxErr); int nrzRawDemod(uint8_t *dest, size_t *size, int *clk, int *invert, int maxErr);

75
common/protocols.c
View file

@ -3,13 +3,36 @@
#include <stdint.h> #include <stdint.h>
#include <stdarg.h> #include <stdarg.h>
#include "protocols.h" #include "protocols.h"
// ATA55xx shared presets & routines
uint32_t GetT55xxClockBit(uint32_t clock) {
switch (clock) {
case 128:
return T55x7_BITRATE_RF_128;
case 100:
return T55x7_BITRATE_RF_100;
case 64:
return T55x7_BITRATE_RF_64;
case 50:
return T55x7_BITRATE_RF_50;
case 40:
return T55x7_BITRATE_RF_40;
case 32:
return T55x7_BITRATE_RF_32;
case 16:
return T55x7_BITRATE_RF_16;
case 8:
return T55x7_BITRATE_RF_8;
default:
return 0;
}
}
#ifndef ON_DEVICE #ifndef ON_DEVICE
#include "ui.h" #include "ui.h"
#define prnt PrintAndLog #define prnt PrintAndLog
#endif
// iclass / picopass chip config structures and shared routines
typedef struct { typedef struct {
uint8_t app_limit; //[8] uint8_t app_limit; //[8]
uint8_t otp[2]; //[9-10] uint8_t otp[2]; //[9-10]
@ -18,8 +41,7 @@ typedef struct {
uint8_t mem_config; //[13] uint8_t mem_config; //[13]
uint8_t eas; //[14] uint8_t eas; //[14]
uint8_t fuses; //[15] uint8_t fuses; //[15]
}picopass_conf_block; } picopass_conf_block;
typedef struct { typedef struct {
uint8_t csn[8]; uint8_t csn[8];
@ -28,32 +50,17 @@ typedef struct {
uint8_t key_d[8]; uint8_t key_d[8];
uint8_t key_c[8]; uint8_t key_c[8];
uint8_t app_issuer_area[8]; uint8_t app_issuer_area[8];
} picopass_hdr;
}picopass_hdr; uint8_t isset(uint8_t val, uint8_t mask) {
//#define prnt printf
/*void prnt(char *fmt,...)
{
va_list argptr;
va_start(argptr, fmt);
vprintf(fmt, argptr);
printf(" "); // cleaning prompt
va_end(argptr);
printf("\n");
}
*/
uint8_t isset(uint8_t val, uint8_t mask)
{
return (val & mask); return (val & mask);
} }
uint8_t notset(uint8_t val, uint8_t mask){ uint8_t notset(uint8_t val, uint8_t mask) {
return !(val & mask); return !(val & mask);
} }
void fuse_config(const picopass_hdr *hdr) void fuse_config(const picopass_hdr *hdr) {
{
uint8_t fuses = hdr->conf.fuses; uint8_t fuses = hdr->conf.fuses;
if (isset(fuses,FUSE_FPERS))prnt(" Mode: Personalization [Programmable]"); if (isset(fuses,FUSE_FPERS))prnt(" Mode: Personalization [Programmable]");
@ -104,8 +111,7 @@ void getMemConfig(uint8_t mem_cfg, uint8_t chip_cfg, uint8_t *max_blk, uint8_t *
} }
} }
void mem_app_config(const picopass_hdr *hdr) void mem_app_config(const picopass_hdr *hdr) {
{
uint8_t mem = hdr->conf.mem_config; uint8_t mem = hdr->conf.mem_config;
uint8_t chip = hdr->conf.chip_config; uint8_t chip = hdr->conf.chip_config;
uint8_t applimit = hdr->conf.app_limit; uint8_t applimit = hdr->conf.app_limit;
@ -118,28 +124,25 @@ void mem_app_config(const picopass_hdr *hdr)
prnt(" AA1: blocks 06-%02X", applimit); prnt(" AA1: blocks 06-%02X", applimit);
prnt(" AA2: blocks %02X-%02X", applimit+1, max_blk); prnt(" AA2: blocks %02X-%02X", applimit+1, max_blk);
} }
void print_picopass_info(const picopass_hdr *hdr) void print_picopass_info(const picopass_hdr *hdr) {
{
fuse_config(hdr); fuse_config(hdr);
mem_app_config(hdr); mem_app_config(hdr);
} }
void printIclassDumpInfo(uint8_t* iclass_dump) void printIclassDumpInfo(uint8_t* iclass_dump) {
{
// picopass_hdr hdr;
// memcpy(&hdr, iclass_dump, sizeof(picopass_hdr));
print_picopass_info((picopass_hdr *) iclass_dump); print_picopass_info((picopass_hdr *) iclass_dump);
} }
/* /*
void test() void test() {
{
picopass_hdr hdr = {0x27,0xaf,0x48,0x01,0xf9,0xff,0x12,0xe0,0x12,0xff,0xff,0xff,0x7f,0x1f,0xff,0x3c}; picopass_hdr hdr = {0x27,0xaf,0x48,0x01,0xf9,0xff,0x12,0xe0,0x12,0xff,0xff,0xff,0x7f,0x1f,0xff,0x3c};
prnt("Picopass configuration:"); prnt("Picopass configuration:");
print_picopass_info(&hdr); print_picopass_info(&hdr);
} }
int main(int argc, char *argv[]) int main(int argc, char *argv[]) {
{
test(); test();
return 0; return 0;
} }
*/ */
#endif
//ON_DEVICE

56
common/protocols.h
View file

@ -194,8 +194,60 @@ NXP/Philips CUSTOM COMMANDS
#define FUSE_FPROD0 0x02 #define FUSE_FPROD0 0x02
#define FUSE_RA 0x01 #define FUSE_RA 0x01
void printIclassDumpInfo(uint8_t* iclass_dump); void printIclassDumpInfo(uint8_t* iclass_dump);
void getMemConfig(uint8_t mem_cfg, uint8_t chip_cfg, uint8_t *max_blk, uint8_t *app_areas, uint8_t *kb); void getMemConfig(uint8_t mem_cfg, uint8_t chip_cfg, uint8_t *max_blk, uint8_t *app_areas, uint8_t *kb);
#endif // PROTOCOLS_H /* T55x7 configuration register definitions */
#define T55x7_POR_DELAY 0x00000001
#define T55x7_ST_TERMINATOR 0x00000008
#define T55x7_PWD 0x00000010
#define T55x7_MAXBLOCK_SHIFT 5
#define T55x7_AOR 0x00000200
#define T55x7_PSKCF_RF_2 0
#define T55x7_PSKCF_RF_4 0x00000400
#define T55x7_PSKCF_RF_8 0x00000800
#define T55x7_MODULATION_DIRECT 0
#define T55x7_MODULATION_PSK1 0x00001000
#define T55x7_MODULATION_PSK2 0x00002000
#define T55x7_MODULATION_PSK3 0x00003000
#define T55x7_MODULATION_FSK1 0x00004000
#define T55x7_MODULATION_FSK2 0x00005000
#define T55x7_MODULATION_FSK1a 0x00006000
#define T55x7_MODULATION_FSK2a 0x00007000
#define T55x7_MODULATION_MANCHESTER 0x00008000
#define T55x7_MODULATION_BIPHASE 0x00010000
#define T55x7_MODULATION_DIPHASE 0x00018000
#define T55x7_BITRATE_RF_8 0
#define T55x7_BITRATE_RF_16 0x00040000
#define T55x7_BITRATE_RF_32 0x00080000
#define T55x7_BITRATE_RF_40 0x000C0000
#define T55x7_BITRATE_RF_50 0x00100000
#define T55x7_BITRATE_RF_64 0x00140000
#define T55x7_BITRATE_RF_100 0x00180000
#define T55x7_BITRATE_RF_128 0x001C0000
/* T5555 (Q5) configuration register definitions */
#define T5555_ST_TERMINATOR 0x00000001
#define T5555_MAXBLOCK_SHIFT 0x00000001
#define T5555_MODULATION_MANCHESTER 0
#define T5555_MODULATION_PSK1 0x00000010
#define T5555_MODULATION_PSK2 0x00000020
#define T5555_MODULATION_PSK3 0x00000030
#define T5555_MODULATION_FSK1 0x00000040
#define T5555_MODULATION_FSK2 0x00000050
#define T5555_MODULATION_BIPHASE 0x00000060
#define T5555_MODULATION_DIRECT 0x00000070
#define T5555_INVERT_OUTPUT 0x00000080
#define T5555_PSK_RF_2 0
#define T5555_PSK_RF_4 0x00000100
#define T5555_PSK_RF_8 0x00000200
#define T5555_USE_PWD 0x00000400
#define T5555_USE_AOR 0x00000800
#define T5555_BITRATE_SHIFT 12
#define T5555_FAST_WRITE 0x00004000
#define T5555_PAGE_SELECT 0x00008000
uint32_t GetT55xxClockBit(uint32_t clock);
#endif
// PROTOCOLS_H