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Added LF frequency adjustments from d18c7db, cleaned up code,
typo fixes in iso14443a code, added the missing "tools" directory, added initial elements for online/offline detection for commands.
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16 changed files with 10914 additions and 161 deletions
25
fpga/fpga.v
25
fpga/fpga.v
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@ -21,7 +21,7 @@
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`include "util.v"
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module fpga(
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spck, miso, mosi, ncs,
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spcki, miso, mosi, ncs,
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pck0i, ck_1356meg, ck_1356megb,
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pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4,
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adc_d, adc_clk, adc_noe,
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@ -29,7 +29,7 @@ module fpga(
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cross_hi, cross_lo,
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dbg
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);
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input spck, mosi, ncs;
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input spcki, mosi, ncs;
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output miso;
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input pck0i, ck_1356meg, ck_1356megb;
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output pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4;
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@ -40,11 +40,16 @@ module fpga(
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input cross_hi, cross_lo;
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output dbg;
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//assign pck0 = pck0i;
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IBUFG #(.IOSTANDARD("DEFAULT") ) pck0b(
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.O(pck0),
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.I(pck0i)
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);
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//assign pck0 = pck0i;
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//assign spck = spcki;
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IBUFG #(.IOSTANDARD("DEFAULT") ) spckb(
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.O(spck),
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.I(spcki)
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);
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//-----------------------------------------------------------------------------
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// The SPI receiver. This sets up the configuration word, which the rest of
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// the logic looks at to determine how to connect the A/D and the coil
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@ -52,7 +57,8 @@ module fpga(
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// to the configuration bits, for use below.
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//-----------------------------------------------------------------------------
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reg [7:0] conf_word_shift;
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reg [15:0] shift_reg;
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reg [7:0] divisor;
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reg [7:0] conf_word;
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// We switch modes between transmitting to the 13.56 MHz tag and receiving
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@ -60,15 +66,18 @@ reg [7:0] conf_word;
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// glitching, or else we will glitch the transmitted carrier.
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always @(posedge ncs)
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begin
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conf_word <= conf_word_shift;
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case(shift_reg[15:12])
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4'b0001: conf_word <= shift_reg[7:0];
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4'b0010: divisor <= shift_reg[7:0];
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endcase
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end
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always @(posedge spck)
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begin
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if(~ncs)
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begin
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conf_word_shift[7:1] <= conf_word_shift[6:0];
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conf_word_shift[0] <= mosi;
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shift_reg[15:1] <= shift_reg[14:0];
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shift_reg[0] <= mosi;
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end
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end
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@ -110,7 +119,7 @@ lo_read lr(
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lr_ssp_frame, lr_ssp_din, ssp_dout, lr_ssp_clk,
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cross_hi, cross_lo,
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lr_dbg,
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lo_is_125khz
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lo_is_125khz, divisor
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);
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lo_simulate ls(
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