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Added LF frequency adjustments from d18c7db, cleaned up code,
typo fixes in iso14443a code, added the missing "tools" directory, added initial elements for online/offline detection for commands.
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16 changed files with 10914 additions and 161 deletions
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@ -53,7 +53,7 @@ void SetupSpi(int mode)
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( 1 << 24) | // Delay between Consecutive Transfers (32 MCK periods)
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( 1 << 16) | // Delay Before SPCK (1 MCK period)
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( 6 << 8) | // Serial Clock Baud Rate (baudrate = MCK/6 = 24Mhz/6 = 4M baud
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( 0 << 4) | // Bits per Transfer (8 bits)
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( 8 << 4) | // Bits per Transfer (16 bits)
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( 0 << 3) | // Chip Select inactive after transfer
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( 1 << 1) | // Clock Phase data captured on leading edge, changes on following edge
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( 0 << 0); // Clock Polarity inactive state is logic 0
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@ -185,15 +185,25 @@ void FpgaDownloadAndGo(void)
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LED_D_OFF();
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}
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//-----------------------------------------------------------------------------
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// Send a 16 bit command/data pair to the FPGA.
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// The bit format is: C3 C2 C1 C0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
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// where C is the 4 bit command and D is the 12 bit data
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//-----------------------------------------------------------------------------
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void FpgaSendCommand(WORD cmd, WORD v)
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{
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SetupSpi(SPI_FPGA_MODE);
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while ((SPI_STATUS & SPI_STATUS_TX_EMPTY) == 0); // wait for the transfer to complete
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SPI_TX_DATA = SPI_CONTROL_LAST_TRANSFER | cmd | v; // send the data
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}
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//-----------------------------------------------------------------------------
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// Write the FPGA setup word (that determines what mode the logic is in, read
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// vs. clone vs. etc.).
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// vs. clone vs. etc.). This is now a special case of FpgaSendCommand() to
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// avoid changing this function's occurence everywhere in the source code.
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//-----------------------------------------------------------------------------
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void FpgaWriteConfWord(BYTE v)
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{
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SetupSpi(SPI_FPGA_MODE);
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while ((SPI_STATUS & SPI_STATUS_TX_EMPTY) == 0); // wait for the transfer to complete
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SPI_TX_DATA = SPI_CONTROL_LAST_TRANSFER | v; // send the data
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FpgaSendCommand(FPGA_CMD_SET_CONFREG, v);
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}
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//-----------------------------------------------------------------------------
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