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lf updates
applies icemans full ata55x7 read/write settings adds checksum to ioprox (thanks to iceman) adds silent mode for lf read and getSamples fix lf em em410xwatch and lf em410xspoof improve data rawdemod ar - for biphase demods improve detectclock a for strong antennas
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13d77ef964
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1fbf895616
11 changed files with 188 additions and 139 deletions
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@ -648,7 +648,7 @@ void UsbPacketReceived(uint8_t *packet, int len)
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setSamplingConfig((sample_config *) c->d.asBytes);
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break;
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case CMD_ACQUIRE_RAW_ADC_SAMPLES_125K:
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cmd_send(CMD_ACK,SampleLF(),0,0,0,0);
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cmd_send(CMD_ACK,SampleLF(c->arg[0]),0,0,0,0);
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break;
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case CMD_MOD_THEN_ACQUIRE_RAW_ADC_SAMPLES_125K:
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ModThenAcquireRawAdcSamples125k(c->arg[0],c->arg[1],c->arg[2],c->d.asBytes);
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@ -1054,15 +1054,11 @@ void T55xxWriteBit(int bit)
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// Write one card block in page 0, no lock
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void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
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{
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uint32_t i;
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uint32_t i = 0;
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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// Give it a bit of time for the resonant antenna to settle.
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// And for the tag to fully power up
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//SpinDelay(150);
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// Set up FPGA, 125kHz
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// Wait for config.. (192+8190xPOW)x8 == 67ms
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LFSetupFPGAForADC(0, true);
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// Now start writting
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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@ -224,21 +224,21 @@ uint32_t DoAcquisition_config( bool silent)
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,silent);
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}
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uint32_t ReadLF(bool activeField)
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uint32_t ReadLF(bool activeField, bool silent)
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{
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printConfig();
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if (!silent) printConfig();
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LFSetupFPGAForADC(config.divisor, activeField);
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// Now call the acquisition routine
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return DoAcquisition_config(false);
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return DoAcquisition_config(silent);
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}
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/**
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* Initializes the FPGA for reader-mode (field on), and acquires the samples.
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* @return number of bits sampled
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**/
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uint32_t SampleLF()
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uint32_t SampleLF(bool printCfg)
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{
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return ReadLF(true);
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return ReadLF(true, printCfg);
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}
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/**
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* Initializes the FPGA for snoop-mode (field off), and acquires the samples.
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@ -247,5 +247,5 @@ uint32_t SampleLF()
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uint32_t SnoopLF()
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{
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return ReadLF(false);
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return ReadLF(false, true);
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}
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@ -5,7 +5,7 @@
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* Initializes the FPGA for reader-mode (field on), and acquires the samples.
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* @return number of bits sampled
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**/
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uint32_t SampleLF();
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uint32_t SampleLF(bool silent);
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/**
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* Initializes the FPGA for snoop-mode (field off), and acquires the samples.
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