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Fix up small error in main osc startup delay and replace more custom defines with standard Atmel defines
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0aa4cfc2f1
5 changed files with 21 additions and 35 deletions
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@ -1415,7 +1415,7 @@ typedef struct _AT91S_TC {
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#define AT91C_TC_CLKS_TIMER_DIV1_CLOCK (0x0) // (TC) Clock selected: TIMER_DIV1_CLOCK
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#define AT91C_TC_CLKS_TIMER_DIV2_CLOCK (0x1) // (TC) Clock selected: TIMER_DIV2_CLOCK
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#define AT91C_TC_CLKS_TIMER_DIV3_CLOCK (0x2) // (TC) Clock selected: TIMER_DIV3_CLOCK
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#define T91C_TC_CLKS_TIMER_DIV4_CLOCK (0x3) // (TC) Clock selected: TIMER_DIV4_CLOCK
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#define AT91C_TC_CLKS_TIMER_DIV4_CLOCK (0x3) // (TC) Clock selected: TIMER_DIV4_CLOCK
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#define AT91C_TC_CLKS_TIMER_DIV5_CLOCK (0x4) // (TC) Clock selected: TIMER_DIV5_CLOCK
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#define AT91C_TC_CLKS_XC0 (0x5) // (TC) Clock selected: XC0
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#define AT91C_TC_CLKS_XC1 (0x6) // (TC) Clock selected: XC1
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@ -20,12 +20,6 @@
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#define PWM_CH_MODE_PRESCALER(x) ((x)<<0)
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#define PWM_CHANNEL(x) (1<<(x))
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#define TC_CMR_TCCLKS_TIMER_CLOCK1 (0<<0)
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#define TC_CMR_TCCLKS_TIMER_CLOCK2 (1<<0)
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#define TC_CMR_TCCLKS_TIMER_CLOCK3 (2<<0)
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#define TC_CMR_TCCLKS_TIMER_CLOCK4 (3<<0)
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#define TC_CMR_TCCLKS_TIMER_CLOCK5 (4<<0)
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#define ADC_CHAN_LF 4
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#define ADC_CHAN_HF 5
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#define ADC_MODE_PRESCALE(x) ((x)<<8)
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@ -40,23 +34,14 @@
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#define SSC_FRAME_MODE_BITS_IN_WORD(x) (((x)-1)<<0)
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#define MC_FLASH_COMMAND_KEY ((0x5a)<<24)
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#define MC_FLASH_STATUS_READY (1<<0)
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#define MC_FLASH_STATUS_LOCKE (1<<2)
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#define MC_FLASH_STATUS_PROGE (1<<3)
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#define MC_FLASH_MODE_FLASH_WAIT_STATES(x) ((x)<<8)
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#define MC_FLASH_MODE_MASTER_CLK_IN_MHZ(x) (((x)+((x)/2))<<16)
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#define MC_FLASH_COMMAND_PAGEN(x) ((x)<<8)
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#define RST_CONTROL_KEY (0xa5<<24)
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#define PMC_MAIN_OSC_ENABLE (1<<0)
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#define PMC_MAIN_OSC_STABILIZED (1<<0)
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#define PMC_MAIN_OSC_PLL_LOCK (1<<2)
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#define PMC_MAIN_OSC_MCK_READY (1<<3)
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#define PMC_MAIN_OSC_STARTUP_DELAY(x) ((x)<<8)
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#define PMC_PLL_DIVISOR(x) (x)
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#define PMC_CLK_PRESCALE_DIV_2 (1<<2)
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#define PMC_PLL_MULTIPLIER(x) (((x)-1)<<16)
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#define PMC_PLL_COUNT_BEFORE_LOCK(x) ((x)<<8)
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#define PMC_PLL_FREQUENCY_RANGE(x) ((x)<<14)
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