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Hitag fixes (#887)

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* don't display error message during 'lf search' when no Hitag tag is present
* remove superfluous options in 'lf hitag read'
* fix setting of default threshold when selecting FPGA_CMD_SET_EDGE_DETECT_THRESHOLD major mode
* some refactoring
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pwpiwi 2019-11-25 08:38:23 +01:00 • committed by GitHub
commit 00848e096b
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7 changed files with 66 additions and 56 deletions
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6
fpga/min_max_tracker.v
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@ -25,7 +25,7 @@ module min_max_tracker(input clk, input [7:0] adc_d, input [7:0] threshold,
always @(posedge clk)
begin
case (state)
0:
0: // initialize
begin
if (cur_max_val >= ({1'b0, adc_d} + threshold))
state <= 2;
@ -36,7 +36,7 @@ module min_max_tracker(input clk, input [7:0] adc_d, input [7:0] threshold,
else if (adc_d <= cur_min_val)
cur_min_val <= adc_d;
end
1:
1: // high phase
begin
if (cur_max_val <= adc_d)
cur_max_val <= adc_d;
@ -46,7 +46,7 @@ module min_max_tracker(input clk, input [7:0] adc_d, input [7:0] threshold,
max_val <= cur_max_val;
end
end
2:
2: // low phase
begin
if (adc_d <= cur_min_val)
cur_min_val <= adc_d;