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https://github.com/ZeroTier/ZeroTierOne
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Fix ed25519-amd64-asm PIC compatibility
The Hyperledger implementation (https://github.com/hyperledger/iroha-ed25519) contains changes to the assembly code to allow PIC. This in turn fixes compilation/linking of ZeroTier One when "full hardening" flags are used.
This commit is contained in:
Jonathon Fernyhough
parent
94f41e2332
commit
e4e0be979e
11 changed files with 185 additions and 185 deletions
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@ -185,7 +185,7 @@ xor %r11,%r11
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movq 24(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU3
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mulq crypto_sign_ed25519_amd64_64_MU3
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mulq crypto_sign_ed25519_amd64_64_MU3(%rip)
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# qhasm: q23 = rax
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# asm 1: mov <rax=int64#7,>q23=int64#10
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@ -203,7 +203,7 @@ mov %rdx,%r13
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movq 24(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU4
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mulq crypto_sign_ed25519_amd64_64_MU4
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mulq crypto_sign_ed25519_amd64_64_MU4(%rip)
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# qhasm: q24 = rax
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# asm 1: mov <rax=int64#7,>q24=int64#12
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@ -226,7 +226,7 @@ adc %rdx,%r8
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movq 32(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU2
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mulq crypto_sign_ed25519_amd64_64_MU2
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mulq crypto_sign_ed25519_amd64_64_MU2(%rip)
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# qhasm: carry? q23 += rax
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# asm 1: add <rax=int64#7,<q23=int64#10
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@ -249,7 +249,7 @@ adc %rdx,%r13
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movq 32(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU3
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mulq crypto_sign_ed25519_amd64_64_MU3
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mulq crypto_sign_ed25519_amd64_64_MU3(%rip)
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# qhasm: carry? q24 += rax
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# asm 1: add <rax=int64#7,<q24=int64#12
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@ -282,7 +282,7 @@ adc %rdx,%r13
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movq 32(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU4
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mulq crypto_sign_ed25519_amd64_64_MU4
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mulq crypto_sign_ed25519_amd64_64_MU4(%rip)
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# qhasm: carry? q30 += rax
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# asm 1: add <rax=int64#7,<q30=int64#5
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@ -310,7 +310,7 @@ adc %rdx,%r9
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movq 40(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU1
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mulq crypto_sign_ed25519_amd64_64_MU1
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mulq crypto_sign_ed25519_amd64_64_MU1(%rip)
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# qhasm: carry? q23 += rax
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# asm 1: add <rax=int64#7,<q23=int64#10
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@ -333,7 +333,7 @@ adc %rdx,%r13
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movq 40(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU2
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mulq crypto_sign_ed25519_amd64_64_MU2
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mulq crypto_sign_ed25519_amd64_64_MU2(%rip)
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# qhasm: carry? q24 += rax
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# asm 1: add <rax=int64#7,<q24=int64#12
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@ -366,7 +366,7 @@ adc %rdx,%r13
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movq 40(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU3
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mulq crypto_sign_ed25519_amd64_64_MU3
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mulq crypto_sign_ed25519_amd64_64_MU3(%rip)
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# qhasm: carry? q30 += rax
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# asm 1: add <rax=int64#7,<q30=int64#5
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@ -399,7 +399,7 @@ adc %rdx,%r13
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movq 40(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU4
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mulq crypto_sign_ed25519_amd64_64_MU4
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mulq crypto_sign_ed25519_amd64_64_MU4(%rip)
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# qhasm: carry? q31 += rax
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# asm 1: add <rax=int64#7,<q31=int64#6
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@ -427,7 +427,7 @@ adc %rdx,%r10
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movq 48(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU0
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mulq crypto_sign_ed25519_amd64_64_MU0
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mulq crypto_sign_ed25519_amd64_64_MU0(%rip)
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# qhasm: carry? q23 += rax
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# asm 1: add <rax=int64#7,<q23=int64#10
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@ -450,7 +450,7 @@ adc %rdx,%r12
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movq 48(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU1
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mulq crypto_sign_ed25519_amd64_64_MU1
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mulq crypto_sign_ed25519_amd64_64_MU1(%rip)
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# qhasm: carry? q24 += rax
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# asm 1: add <rax=int64#7,<q24=int64#12
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@ -483,7 +483,7 @@ adc %rdx,%r12
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movq 48(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU2
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mulq crypto_sign_ed25519_amd64_64_MU2
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mulq crypto_sign_ed25519_amd64_64_MU2(%rip)
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# qhasm: carry? q30 += rax
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# asm 1: add <rax=int64#7,<q30=int64#5
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@ -516,7 +516,7 @@ adc %rdx,%r12
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movq 48(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU3
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mulq crypto_sign_ed25519_amd64_64_MU3
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mulq crypto_sign_ed25519_amd64_64_MU3(%rip)
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# qhasm: carry? q31 += rax
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# asm 1: add <rax=int64#7,<q31=int64#6
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@ -549,7 +549,7 @@ adc %rdx,%r12
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movq 48(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU4
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mulq crypto_sign_ed25519_amd64_64_MU4
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mulq crypto_sign_ed25519_amd64_64_MU4(%rip)
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# qhasm: carry? q32 += rax
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# asm 1: add <rax=int64#7,<q32=int64#8
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@ -577,7 +577,7 @@ adc %rdx,%r11
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movq 56(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU0
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mulq crypto_sign_ed25519_amd64_64_MU0
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mulq crypto_sign_ed25519_amd64_64_MU0(%rip)
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# qhasm: carry? q24 += rax
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# asm 1: add <rax=int64#7,<q24=int64#12
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@ -602,7 +602,7 @@ adc %rdx,%r12
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movq 56(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU1
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mulq crypto_sign_ed25519_amd64_64_MU1
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mulq crypto_sign_ed25519_amd64_64_MU1(%rip)
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# qhasm: carry? q30 += rax
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# asm 1: add <rax=int64#7,<q30=int64#5
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@ -640,7 +640,7 @@ movq %r8,56(%rsp)
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movq 56(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU2
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mulq crypto_sign_ed25519_amd64_64_MU2
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mulq crypto_sign_ed25519_amd64_64_MU2(%rip)
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# qhasm: carry? q31 += rax
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# asm 1: add <rax=int64#7,<q31=int64#6
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@ -678,7 +678,7 @@ movq %r9,64(%rsp)
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movq 56(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU3
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mulq crypto_sign_ed25519_amd64_64_MU3
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mulq crypto_sign_ed25519_amd64_64_MU3(%rip)
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# qhasm: carry? q32 += rax
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# asm 1: add <rax=int64#7,<q32=int64#8
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@ -716,7 +716,7 @@ movq %r10,72(%rsp)
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movq 56(%rsi),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_MU4
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mulq crypto_sign_ed25519_amd64_64_MU4
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mulq crypto_sign_ed25519_amd64_64_MU4(%rip)
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# qhasm: carry? q33 += rax
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# asm 1: add <rax=int64#7,<q33=int64#9
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@ -744,7 +744,7 @@ movq %r11,80(%rsp)
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movq 56(%rsp),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER0
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mulq crypto_sign_ed25519_amd64_64_ORDER0
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mulq crypto_sign_ed25519_amd64_64_ORDER0(%rip)
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# qhasm: r20 = rax
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# asm 1: mov <rax=int64#7,>r20=int64#5
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@ -762,7 +762,7 @@ mov %rdx,%r9
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movq 56(%rsp),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER1
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mulq crypto_sign_ed25519_amd64_64_ORDER1
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mulq crypto_sign_ed25519_amd64_64_ORDER1(%rip)
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# qhasm: r21 = rax
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# asm 1: mov <rax=int64#7,>r21=int64#8
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@ -790,7 +790,7 @@ adc %rdx,%r9
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movq 56(%rsp),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER2
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mulq crypto_sign_ed25519_amd64_64_ORDER2
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mulq crypto_sign_ed25519_amd64_64_ORDER2(%rip)
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# qhasm: r22 = rax
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# asm 1: mov <rax=int64#7,>r22=int64#9
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@ -818,7 +818,7 @@ adc %rdx,%r9
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movq 56(%rsp),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER3
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mulq crypto_sign_ed25519_amd64_64_ORDER3
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mulq crypto_sign_ed25519_amd64_64_ORDER3(%rip)
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# qhasm: free rdx
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@ -838,7 +838,7 @@ add %r9,%r12
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movq 64(%rsp),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER0
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mulq crypto_sign_ed25519_amd64_64_ORDER0
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mulq crypto_sign_ed25519_amd64_64_ORDER0(%rip)
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# qhasm: carry? r21 += rax
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# asm 1: add <rax=int64#7,<r21=int64#8
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@ -861,7 +861,7 @@ adc %rdx,%r9
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movq 64(%rsp),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER1
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mulq crypto_sign_ed25519_amd64_64_ORDER1
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mulq crypto_sign_ed25519_amd64_64_ORDER1(%rip)
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# qhasm: carry? r22 += rax
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# asm 1: add <rax=int64#7,<r22=int64#9
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@ -894,7 +894,7 @@ adc %rdx,%rcx
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movq 64(%rsp),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER2
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mulq crypto_sign_ed25519_amd64_64_ORDER2
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mulq crypto_sign_ed25519_amd64_64_ORDER2(%rip)
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# qhasm: free rdx
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@ -914,7 +914,7 @@ add %rcx,%r12
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movq 72(%rsp),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER0
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mulq crypto_sign_ed25519_amd64_64_ORDER0
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mulq crypto_sign_ed25519_amd64_64_ORDER0(%rip)
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# qhasm: carry? r22 += rax
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# asm 1: add <rax=int64#7,<r22=int64#9
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@ -937,7 +937,7 @@ adc %rdx,%rcx
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movq 72(%rsp),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER1
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mulq crypto_sign_ed25519_amd64_64_ORDER1
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mulq crypto_sign_ed25519_amd64_64_ORDER1(%rip)
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# qhasm: free rdx
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@ -957,7 +957,7 @@ add %rcx,%r12
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movq 80(%rsp),%rax
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# qhasm: (uint128) rdx rax = rax * *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER0
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mulq crypto_sign_ed25519_amd64_64_ORDER0
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mulq crypto_sign_ed25519_amd64_64_ORDER0(%rip)
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# qhasm: free rdx
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@ -1029,22 +1029,22 @@ mov %rsi,%r11
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# qhasm: carry? t0 -= *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER0
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# asm 1: sub crypto_sign_ed25519_amd64_64_ORDER0,<t0=int64#4
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# asm 2: sub crypto_sign_ed25519_amd64_64_ORDER0,<t0=%rcx
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sub crypto_sign_ed25519_amd64_64_ORDER0,%rcx
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sub crypto_sign_ed25519_amd64_64_ORDER0(%rip),%rcx
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# qhasm: carry? t1 -= *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER1 - carry
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# asm 1: sbb crypto_sign_ed25519_amd64_64_ORDER1,<t1=int64#6
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# asm 2: sbb crypto_sign_ed25519_amd64_64_ORDER1,<t1=%r9
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sbb crypto_sign_ed25519_amd64_64_ORDER1,%r9
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sbb crypto_sign_ed25519_amd64_64_ORDER1(%rip),%r9
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# qhasm: carry? t2 -= *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER2 - carry
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# asm 1: sbb crypto_sign_ed25519_amd64_64_ORDER2,<t2=int64#8
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# asm 2: sbb crypto_sign_ed25519_amd64_64_ORDER2,<t2=%r10
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sbb crypto_sign_ed25519_amd64_64_ORDER2,%r10
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sbb crypto_sign_ed25519_amd64_64_ORDER2(%rip),%r10
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# qhasm: unsigned<? t3 -= *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER3 - carry
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# asm 1: sbb crypto_sign_ed25519_amd64_64_ORDER3,<t3=int64#9
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# asm 2: sbb crypto_sign_ed25519_amd64_64_ORDER3,<t3=%r11
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sbb crypto_sign_ed25519_amd64_64_ORDER3,%r11
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sbb crypto_sign_ed25519_amd64_64_ORDER3(%rip),%r11
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# qhasm: r0 = t0 if !unsigned<
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# asm 1: cmovae <t0=int64#4,<r0=int64#3
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@ -1089,22 +1089,22 @@ mov %rsi,%r11
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# qhasm: carry? t0 -= *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER0
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# asm 1: sub crypto_sign_ed25519_amd64_64_ORDER0,<t0=int64#4
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# asm 2: sub crypto_sign_ed25519_amd64_64_ORDER0,<t0=%rcx
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sub crypto_sign_ed25519_amd64_64_ORDER0,%rcx
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sub crypto_sign_ed25519_amd64_64_ORDER0(%rip),%rcx
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# qhasm: carry? t1 -= *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER1 - carry
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# asm 1: sbb crypto_sign_ed25519_amd64_64_ORDER1,<t1=int64#6
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# asm 2: sbb crypto_sign_ed25519_amd64_64_ORDER1,<t1=%r9
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sbb crypto_sign_ed25519_amd64_64_ORDER1,%r9
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sbb crypto_sign_ed25519_amd64_64_ORDER1(%rip),%r9
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# qhasm: carry? t2 -= *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER2 - carry
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# asm 1: sbb crypto_sign_ed25519_amd64_64_ORDER2,<t2=int64#8
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# asm 2: sbb crypto_sign_ed25519_amd64_64_ORDER2,<t2=%r10
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sbb crypto_sign_ed25519_amd64_64_ORDER2,%r10
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sbb crypto_sign_ed25519_amd64_64_ORDER2(%rip),%r10
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# qhasm: unsigned<? t3 -= *(uint64 *) &crypto_sign_ed25519_amd64_64_ORDER3 - carry
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# asm 1: sbb crypto_sign_ed25519_amd64_64_ORDER3,<t3=int64#9
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# asm 2: sbb crypto_sign_ed25519_amd64_64_ORDER3,<t3=%r11
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sbb crypto_sign_ed25519_amd64_64_ORDER3,%r11
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sbb crypto_sign_ed25519_amd64_64_ORDER3(%rip),%r11
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# qhasm: r0 = t0 if !unsigned<
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# asm 1: cmovae <t0=int64#4,<r0=int64#3
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