iceman1001
16cbb4a446
style
2025-06-30 14:28:24 +02:00
iceman1001
5de4dd68e5
text
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2025-06-22 20:34:54 +02:00
iceman1001
65607fc727
added Ultralight-C simulation. hf mfu sim -t 13. Use eload first. Also added support to upload UL-C dictionaries and UL-AES to spiffs memory. A lot of textual reworked across client. Unifiy texts and a bit more color ;)
2025-06-19 17:26:20 +02:00
Henry Gabryjelski
69a2cc1ff0
em4x70 --par
deprecation: Step 4: remove client references to client->arm field that used to store this
2025-06-09 14:03:05 -07:00
Henry Gabryjelski
31b1117a51
em4x70 --par
deprecation: Step 2: arm-side always uses false
2025-06-09 12:58:50 -07:00
Antiklesys
80e1c7f0d4
Implemented hf iclass sim -t 7
...
Implemented an iclass sim function that prevents simulated card responses after updating block 3.
Block 3 gets updated with the XOR key as if it was in personalization mode.
2025-06-07 23:12:21 +08:00
Antiklesys
5558db3019
Update iclass_cmd.h
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Signed-off-by: Antiklesys <syselkitna@gmail.com>
2025-06-07 02:24:45 +08:00
Antiklesys
94794f7519
Implemented a hf iclass sim variation
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hf iclass sim -t 3 variation that glitches specific block responses during read/write operations based on the value of the last byte of block 31.
2025-06-07 02:15:01 +08:00
Antiklesys
e68be39a41
Updated hf iclass legrec to be able to use shorter delays
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Added an option for hf iclass legrec to further increase speeds by using a shorter delay of 1500 vs the default of 3390.
This seems to be stable on new silicon especially now that we're keeping the field always on.
It may be more risky for the --fast operation.
2025-06-06 16:06:53 +08:00
Antiklesys
083a9ce945
Updated hf iclass legrec with a fast option and improved AA2 selection
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1- Added a --fast option for hf iclass legrec that further increases the speed from 4.6 key updates/second to 7.4 key updates/second. This is achieved by skipping some safety checks and is a very fast but more risky operation.
2- Automated AA2 block selection based on the values in the config block
3- Other minor code cleanups
2025-06-05 20:44:58 +08:00
iceman1001
804acfbefa
the device side of iclass tear off is implemented. The base was done by @antiklesys. This version differs by the concept of trying to stabilize weak bits by performing a write operation in conjuction with the detected tear. Its untested but I can replicate most of the tears we performed client side. You will need to call the proxmark3 client with -f
, ./pm3 -f
to force flush out text which is needed for the inplace printing. I thought this was done automatically but it wasnt. hf iclass tear --arm + all the normal params
to run on device side
2025-05-30 01:37:13 +02:00
Jakub Kramarz
9744f8afbb
Add option to override default USART baud rate in platform settings
2025-05-09 15:53:30 +02:00
iceman1001
cb4a0e2333
rename struct to follow code style
2025-04-30 13:27:41 +02:00
kormax
3550f11726
Remove mag argument from commands; Add support for magsafe polling via 14a config
2025-04-20 17:55:55 +03:00
kormax
56336d9d82
Add support for polling loop annotations
2025-04-09 12:31:21 +03:00
douniwan5788
5122039547
Refactor hitag config_page_t for better memory alignment
2025-03-22 20:54:13 +08:00
iceman1001
87c2e82e2f
style
2025-03-19 12:53:24 +01:00
douniwan5788
214ded2b97
Replace all μ(greek small letter mu, UTF-8 \xce\xbc) to µ(micro sign, UTF-8 \xc2\xb5)
2025-03-19 19:21:01 +08:00
douniwan5788
4bde83b89d
Added lf hitag htu
support for Hitag µ/8265
2025-03-19 18:56:23 +08:00
douniwan5788
3d0c8cab5c
Refactor Hitag low-level functions into hitag_common
2025-03-19 17:05:39 +08:00
Iceman
e2de8c6644
Merge pull request #2781 from douniwan5788/refactor_concatbits
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Refactor the concatbits function to support both MSB and LSB first src
2025-03-18 07:43:36 +01:00
Henry Gabryjelski
21ad101ff5
Major update to EM4x70 support:
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1. Rework how communications with tag occur.
a. bitstream to be sent to the tag is now fully pre-generated.
b. bits sent and received are logged with start / end times.
2. Support built-in `hw dbg` for controlling verbosity of debug output
The new bitstream generation and logging has exposed a surprising legacy behavior ... each of the command that sent additional data (beyond the command) were:
* inserting an extra RM zero bit
* force-enabling command parity is used
This was not expected. However, this PR maintains the behavior of the existing code.
TODO: Root-cause why the third RM bit is needed. Fix code to remove that hack.
TODO: change the arm/client interface to ONLY use arrays of bytes, with well-defined content endianness, to avoid this problem.
2025-03-16 01:05:55 -07:00
douniwan5788
d13e7b0b64
Refactor the concatbits function to support both MSB and LSB first src
2025-03-15 15:21:58 +08:00
iceman1001
2137284a93
style\n Some improvements to trace list -t seos
annotations.
2025-03-12 16:41:06 +01:00
leecher1337
0e2a02bdf0
Implement new command hf 15 slixprotectpage to do ISO15693_PROTECT_PAGE on slix tags
2025-03-09 11:54:51 +01:00
iceman1001
cef07dedf6
code style, code clean up of redundant functions, comments, its many minor fixes across the platform. Sorry for not making 20 commits
2025-02-21 15:38:33 +01:00
iceman1001
4c6e74c3ce
revert
2025-02-18 19:47:51 +01:00
Philippe Teuwen
1acc030fd4
rework simaid & rename few vars
2025-02-12 08:44:42 +01:00
n-hutton
8dbe1c7b06
more
2025-01-21 23:52:33 +00:00
n-hutton
acb7de9d8d
more cleanup noticed just now
2025-01-21 23:51:26 +00:00
n-hutton
3eb0238481
appears to work - using normal mifare sim init
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working demo
works
seems to work so far
more cleanup and works
working copy
working, clean one more pass
cleanup continues
back in buisness babyyy
final cleanup before PR I hope
2025-01-21 23:39:25 +00:00
Iceman
76ad5a5b51
Merge branch 'master' into cherry_pick_emv
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Signed-off-by: Iceman <iceman@iuse.se>
2025-01-14 16:26:35 +01:00
nvx
29e0c51393
Changed hf mf info
- now differentiates between full USCUID and cut down ZUID chips
2025-01-14 22:36:59 +10:00
Piotr Rzeszut
adadfb7fad
Corrected documentation on SPI FLASH memory usage after SPIFFS area extension.
2024-12-29 22:45:50 +01:00
Piotr Rzeszut
e3486e57b1
Extend spiffs area to full FLASH array except last two sectors (signature and reserve one for future use)
2024-12-29 22:20:49 +01:00
Piotr Rzeszut
2ccfa187ab
Remove unused definitions related to fixed-size SPI flash, improve comments for documentation
2024-12-29 22:19:32 +01:00
Piotr Rzeszut
b1ba5b3ea6
Merge branch 'master' into extend-spiffs-partition-last-page
2024-12-29 22:03:21 +01:00
Piotr Rzeszut
dd17effaab
Move T55XX config to spiffs file
2024-12-26 19:46:55 +01:00
Piotr Rzeszut
d1db0aa799
Extending SPIFFS into last page of the SPI FLASH
2024-12-26 15:04:05 +01:00
Piotr Rzeszut
34883cf91f
Remove unused pointers to statically alocated storage for keys from pmflash.h. iClass flash-stores password dictionary seem not to be used anywhere.
2024-12-26 03:03:48 +01:00
Piotr Rzeszut
d9a3e4f050
Refactor keys in flash statistics to check for files
2024-12-26 01:11:46 +01:00
Piotr Rzeszut
5af815f271
Mifare dictionary uploaded to spiffs using legacy function
2024-12-25 21:08:44 +01:00
klks
df3916c7b6
Add annotations for FMCOS2.0 CPU Card
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Adding annotations for the FMCOS 2.0 CPU Card that is used/sold in China.
2024-12-20 22:50:20 +08:00
Piotr Rzeszut
565f3f1feb
Extend storage allocated for Mifare keys to 4095 keys. Update documentation on the feature and memory map
2024-12-07 00:34:29 +01:00
douniwan5788
f0b93405fa
fix Hitag S concatbits and lf em 410x clone --hts
2024-11-27 00:02:00 +08:00
n-hutton
4a23fb05f0
Cherry pick POC of emv simulation
2024-11-21 19:23:03 +00:00
ANTodorov
d49e1f6af6
remove unused definition
2024-11-17 22:16:43 +02:00
ANTodorov
34e317a9df
address review comments
2024-11-17 22:07:58 +02:00
ANTodorov
48ec109a1e
use all spi flash v0.1
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* introduced a new communication command CMD_FLASHMEM_PAGES64K to get the number of 64k pages
* "the last page" is a special, holding the dicts and some other stuff, relocated to there
* raised timeout when wiping a mem page (W25Q16 looks a bit slower than W25X20BV)
* loop all pages in Flash_WipeMemory()
2024-11-17 19:03:15 +02:00
Philippe Teuwen
46813e0e50
hf mf isen: rewrite counters, add specific NONCE_SUPERSTATIC case (when first nt == nested nt)
2024-11-05 17:07:54 +01:00