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https://github.com/RfidResearchGroup/proxmark3.git
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chg: lf simulation - trying the new clock for better timings.
This commit is contained in:
Chris
parent
fd1c0cac79
commit
faef1a0938
1 changed files with 57 additions and 52 deletions
107
armsrc/lfops.c
107
armsrc/lfops.c
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@ -575,9 +575,12 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
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// this may destroy the bigbuf so be sure this is called before calling SimulateTagLowFrequencyEx
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void SimulateTagLowFrequencyEx(int period, int gap, int ledcontrol, int numcycles) {
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// start us timer
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StartTicks();
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//FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_TOGGLE_MODE );
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
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SpinDelay(20);
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WaitMS(20);
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int i = 0, x = 0;
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uint8_t *buf = BigBuf_get_addr();
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@ -617,7 +620,7 @@ void SimulateTagLowFrequencyEx(int period, int gap, int ledcontrol, int numcycle
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goto OUT;
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}
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if(buf[i])
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if (buf[i])
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OPEN_COIL();
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else
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SHORT_COIL();
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@ -631,17 +634,18 @@ void SimulateTagLowFrequencyEx(int period, int gap, int ledcontrol, int numcycle
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}
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i++;
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if(i == period) {
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if (i == period) {
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i = 0;
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if (gap) {
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SHORT_COIL();
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SpinDelayUs(gap);
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WaitUS(gap);
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}
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}
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if (ledcontrol) LED_D_OFF();
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}
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OUT:
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StopTicks();
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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LED_D_OFF();
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}
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@ -665,44 +669,44 @@ static void fc(int c, int *n)
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int idx;
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// for when we want an fc8 pattern every 4 logical bits
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if(c==0) {
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dest[((*n)++)]=1;
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dest[((*n)++)]=1;
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dest[((*n)++)]=1;
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dest[((*n)++)]=1;
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dest[((*n)++)]=0;
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dest[((*n)++)]=0;
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dest[((*n)++)]=0;
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dest[((*n)++)]=0;
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if (c == 0) {
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dest[((*n)++)] = 1;
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dest[((*n)++)] = 1;
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dest[((*n)++)] = 1;
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dest[((*n)++)] = 1;
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dest[((*n)++)] = 0;
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dest[((*n)++)] = 0;
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dest[((*n)++)] = 0;
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dest[((*n)++)] = 0;
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}
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// an fc/8 encoded bit is a bit pattern of 11110000 x6 = 48 samples
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if(c==8) {
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for (idx=0; idx<6; idx++) {
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dest[((*n)++)]=1;
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dest[((*n)++)]=1;
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dest[((*n)++)]=1;
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dest[((*n)++)]=1;
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dest[((*n)++)]=0;
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dest[((*n)++)]=0;
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dest[((*n)++)]=0;
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dest[((*n)++)]=0;
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if (c == 8) {
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for (idx=0; idx < 6; idx++) {
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dest[((*n)++)] = 1;
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dest[((*n)++)] = 1;
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dest[((*n)++)] = 1;
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dest[((*n)++)] = 1;
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dest[((*n)++)] = 0;
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dest[((*n)++)] = 0;
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dest[((*n)++)] = 0;
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dest[((*n)++)] = 0;
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}
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}
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// an fc/10 encoded bit is a bit pattern of 1111100000 x5 = 50 samples
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if(c==10) {
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for (idx=0; idx<5; idx++) {
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dest[((*n)++)]=1;
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dest[((*n)++)]=1;
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dest[((*n)++)]=1;
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dest[((*n)++)]=1;
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dest[((*n)++)]=1;
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dest[((*n)++)]=0;
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dest[((*n)++)]=0;
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dest[((*n)++)]=0;
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dest[((*n)++)]=0;
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dest[((*n)++)]=0;
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if (c == 10) {
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for (idx = 0; idx < 5; idx++) {
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dest[((*n)++)] = 1;
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dest[((*n)++)] = 1;
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dest[((*n)++)] = 1;
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dest[((*n)++)] = 1;
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dest[((*n)++)] = 1;
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dest[((*n)++)] = 0;
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dest[((*n)++)] = 0;
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dest[((*n)++)] = 0;
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dest[((*n)++)] = 0;
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dest[((*n)++)] = 0;
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}
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}
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}
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@ -720,7 +724,7 @@ static void fcSTT(int *n) {
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static void fcAll(uint8_t fc, int *n, uint8_t clock, uint16_t *modCnt)
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{
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uint8_t *dest = BigBuf_get_addr();
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uint8_t halfFC = fc/2;
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uint8_t halfFC = fc >> 1;
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uint8_t wavesPerClock = clock/fc;
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uint8_t mod = clock % fc; //modifier
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uint8_t modAdj = fc/mod; //how often to apply modifier
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@ -729,21 +733,22 @@ static void fcAll(uint8_t fc, int *n, uint8_t clock, uint16_t *modCnt)
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// loop through clock - step field clock
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for (uint8_t idx=0; idx < wavesPerClock; idx++){
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// put 1/2 FC length 1's and 1/2 0's per field clock wave (to create the wave)
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memset(dest+(*n), 0, fc-halfFC); //in case of odd number use extra here
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memset(dest+(*n)+(fc-halfFC), 1, halfFC);
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memset(dest + (*n), 0, fc - halfFC); //in case of odd number use extra here
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memset(dest + (*n) + (fc - halfFC), 1, halfFC);
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*n += fc;
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}
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if (mod>0) (*modCnt)++;
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if ((mod>0) && modAdjOk){ //fsk2
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if (mod > 0) (*modCnt)++;
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if ((mod > 0) && modAdjOk){ //fsk2
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if ((*modCnt % modAdj) == 0){ //if 4th 8 length wave in a rf/50 add extra 8 length wave
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memset(dest+(*n), 0, fc-halfFC);
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memset(dest+(*n)+(fc-halfFC), 1, halfFC);
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memset(dest + (*n), 0, fc - halfFC);
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memset(dest + (*n) + ( fc - halfFC), 1, halfFC);
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*n += fc;
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}
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}
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if (mod>0 && !modAdjOk){ //fsk1
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memset(dest+(*n), 0, mod-(mod/2));
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memset(dest+(*n)+(mod-(mod/2)), 1, mod/2);
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if (mod > 0 && !modAdjOk){ //fsk1
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memset(dest + (*n), 0, mod - (mod >> 1));
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memset(dest + (*n) + (mod - (mod >> 1)), 1, mod >> 1);
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*n += mod;
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}
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}
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@ -781,11 +786,11 @@ void CmdHIDsimTAGEx( uint32_t hi, uint32_t lo, int ledcontrol, int numcycles) {
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fcSTT(&n);
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// manchester encode bits 43 to 32
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for (i=11; i>=0; i--) {
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for (i = 11; i >= 0; i--) {
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if ((i%4)==3) fc(0, &n);
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if ((i % 4) == 3) fc(0, &n);
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if ((hi>>i) & 1) {
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if ((hi >> i) & 1) {
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fc(10, &n); fc(8, &n); // low-high transition
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} else {
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fc(8, &n); fc(10, &n); // high-low transition
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@ -793,11 +798,11 @@ void CmdHIDsimTAGEx( uint32_t hi, uint32_t lo, int ledcontrol, int numcycles) {
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}
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// manchester encode bits 31 to 0
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for (i=31; i>=0; i--) {
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for (i = 31; i >= 0; i--) {
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if ((i%4)==3) fc(0, &n);
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if ((i % 4) == 3) fc(0, &n);
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if ((lo>>i) & 1) {
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if (( lo >> i ) & 1) {
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fc(10, &n); fc(8, &n); // low-high transition
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} else {
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fc(8, &n); fc(10, &n); // high-low transition
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