chg: lf simulation - trying the new clock for better timings.

This commit is contained in:
Chris 2018-11-16 23:57:55 +01:00
commit faef1a0938

View file

@ -575,9 +575,12 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
// this may destroy the bigbuf so be sure this is called before calling SimulateTagLowFrequencyEx
void SimulateTagLowFrequencyEx(int period, int gap, int ledcontrol, int numcycles) {
// start us timer
StartTicks();
//FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_TOGGLE_MODE );
FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
SpinDelay(20);
WaitMS(20);
int i = 0, x = 0;
uint8_t *buf = BigBuf_get_addr();
@ -635,13 +638,14 @@ void SimulateTagLowFrequencyEx(int period, int gap, int ledcontrol, int numcycle
i = 0;
if (gap) {
SHORT_COIL();
SpinDelayUs(gap);
WaitUS(gap);
}
}
if (ledcontrol) LED_D_OFF();
}
OUT:
StopTicks();
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
LED_D_OFF();
}
@ -720,7 +724,7 @@ static void fcSTT(int *n) {
static void fcAll(uint8_t fc, int *n, uint8_t clock, uint16_t *modCnt)
{
uint8_t *dest = BigBuf_get_addr();
uint8_t halfFC = fc/2;
uint8_t halfFC = fc >> 1;
uint8_t wavesPerClock = clock/fc;
uint8_t mod = clock % fc; //modifier
uint8_t modAdj = fc/mod; //how often to apply modifier
@ -734,6 +738,7 @@ static void fcAll(uint8_t fc, int *n, uint8_t clock, uint16_t *modCnt)
*n += fc;
}
if (mod > 0) (*modCnt)++;
if ((mod > 0) && modAdjOk){ //fsk2
if ((*modCnt % modAdj) == 0){ //if 4th 8 length wave in a rf/50 add extra 8 length wave
memset(dest + (*n), 0, fc - halfFC);
@ -742,8 +747,8 @@ static void fcAll(uint8_t fc, int *n, uint8_t clock, uint16_t *modCnt)
}
}
if (mod > 0 && !modAdjOk){ //fsk1
memset(dest+(*n), 0, mod-(mod/2));
memset(dest+(*n)+(mod-(mod/2)), 1, mod/2);
memset(dest + (*n), 0, mod - (mod >> 1));
memset(dest + (*n) + (mod - (mod >> 1)), 1, mod >> 1);
*n += mod;
}
}