mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-20 21:33:47 -07:00
FIX: "hf 14a read" / "hf mf *" / "hf mfdes info" and failure when calling these commands serveral times in row.
For long transactions the sspclock compare with >1 instead of >=1 .. Now the timer resets properly. CHG: use some #define constants for iso-commands.
This commit is contained in:
parent
9bd1640803
commit
f885043422
6 changed files with 44 additions and 50 deletions
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@ -1835,10 +1835,10 @@ int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity) {
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// if anticollision is false, then the UID must be provided in uid_ptr[]
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// if anticollision is false, then the UID must be provided in uid_ptr[]
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// and num_cascades must be set (1: 4 Byte UID, 2: 7 Byte UID, 3: 10 Byte UID)
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// and num_cascades must be set (1: 4 Byte UID, 2: 7 Byte UID, 3: 10 Byte UID)
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int iso14443a_select_card(byte_t *uid_ptr, iso14a_card_select_t *p_hi14a_card, uint32_t *cuid_ptr, bool anticollision, uint8_t num_cascades) {
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int iso14443a_select_card(byte_t *uid_ptr, iso14a_card_select_t *p_hi14a_card, uint32_t *cuid_ptr, bool anticollision, uint8_t num_cascades) {
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uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
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uint8_t wupa[] = { ISO14443A_CMD_WUPA }; // 0x26 - ISO14443A_CMD_REQA 0x52 - ISO14443A_CMD_WUPA
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uint8_t sel_all[] = { 0x93,0x20 };
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uint8_t sel_all[] = { ISO14443A_CMD_ANTICOLL_OR_SELECT,0x20 };
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uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
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uint8_t sel_uid[] = { ISO14443A_CMD_ANTICOLL_OR_SELECT,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
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uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
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uint8_t rats[] = { ISO14443A_CMD_RATS,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
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uint8_t resp[MAX_FRAME_SIZE] = {0}; // theoretically. A usual RATS will be much smaller
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uint8_t resp[MAX_FRAME_SIZE] = {0}; // theoretically. A usual RATS will be much smaller
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uint8_t resp_par[MAX_PARITY_SIZE] = {0};
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uint8_t resp_par[MAX_PARITY_SIZE] = {0};
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byte_t uid_resp[4] = {0};
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byte_t uid_resp[4] = {0};
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@ -2009,7 +2009,7 @@ void iso14443a_setup(uint8_t fpga_minor_mode) {
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DemodReset();
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DemodReset();
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UartReset();
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UartReset();
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NextTransferTime = 2 * DELAY_ARM2AIR_AS_READER;
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NextTransferTime = 2 * DELAY_ARM2AIR_AS_READER;
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iso14a_set_timeout(10*106); // 10ms default
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iso14a_set_timeout(20*106); // 20ms default
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}
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}
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int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) {
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int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) {
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@ -2045,7 +2045,6 @@ int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) {
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// Read an ISO 14443a tag. Send out commands and store answers.
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// Read an ISO 14443a tag. Send out commands and store answers.
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//
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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void ReaderIso14443a(UsbCommand *c) {
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void ReaderIso14443a(UsbCommand *c) {
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iso14a_command_t param = c->arg[0];
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iso14a_command_t param = c->arg[0];
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@ -379,7 +379,7 @@ void MifareWriteBlock(uint8_t arg0, uint8_t arg1, uint8_t arg2, uint8_t *datain)
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LED_C_OFF();
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LED_C_OFF();
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while (true) {
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while (true) {
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if(!iso14443a_select_card(uid, NULL, &cuid, true, 0)) {
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if(!iso14443a_select_card(uid, NULL, &cuid, true, 0)) {
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if (MF_DBGLEVEL >= 1) Dbprintf("Can't select card");
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if (MF_DBGLEVEL >= 1) Dbprintf("Can't select card");
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break;
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break;
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};
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};
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@ -403,14 +403,11 @@ void MifareWriteBlock(uint8_t arg0, uint8_t arg1, uint8_t arg2, uint8_t *datain)
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break;
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break;
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}
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}
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// ----------------------------- crypto1 destroy
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crypto1_destroy(pcs);
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crypto1_destroy(pcs);
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if (MF_DBGLEVEL >= 2) DbpString("WRITE BLOCK FINISHED");
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if (MF_DBGLEVEL >= 2) DbpString("WRITE BLOCK FINISHED");
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LED_B_ON();
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cmd_send(CMD_ACK,isOK,0,0,0,0);
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cmd_send(CMD_ACK,isOK,0,0,0,0);
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LED_B_OFF();
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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LEDsoff();
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LEDsoff();
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@ -19,17 +19,13 @@ static uint8_t deselect_cmd[] = {0xc2,0xe0,0xb4};
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bool InitDesfireCard(){
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bool InitDesfireCard(){
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iso14a_card_select_t card;
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iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
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iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
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set_tracing(TRUE);
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set_tracing(TRUE);
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byte_t cardbuf[USB_CMD_DATA_SIZE] = {0x00};
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if (!iso14443a_select_card(NULL, &card, NULL, true, 0)) {
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iso14a_card_select_t *card = (iso14a_card_select_t*)cardbuf;
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if (MF_DBGLEVEL >= MF_DBG_ERROR) DbpString("Can't select card");
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int len = iso14443a_select_card(NULL,card,NULL,true,0);
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if (!len) {
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if (MF_DBGLEVEL >= MF_DBG_ERROR)
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Dbprintf("Can't select card");
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OnError(1);
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OnError(1);
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return false;
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return false;
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}
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}
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@ -92,9 +88,9 @@ void MifareSendCommand(uint8_t arg0, uint8_t arg1, uint8_t *datain){
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void MifareDesfireGetInformation(){
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void MifareDesfireGetInformation(){
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int len = 0;
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int len = 0;
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iso14a_card_select_t card;
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uint8_t resp[USB_CMD_DATA_SIZE] = {0x00};
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uint8_t resp[USB_CMD_DATA_SIZE] = {0x00};
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uint8_t dataout[USB_CMD_DATA_SIZE] = {0x00};
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uint8_t dataout[USB_CMD_DATA_SIZE] = {0x00};
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byte_t cardbuf[USB_CMD_DATA_SIZE] = {0x00};
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/*
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/*
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1 = PCB 1
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1 = PCB 1
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@ -110,17 +106,13 @@ void MifareDesfireGetInformation(){
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iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
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iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
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// card select - information
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// card select - information
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iso14a_card_select_t *card = (iso14a_card_select_t*)cardbuf;
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if ( !iso14443a_select_card(NULL, &card, NULL, true, 0) ) {
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byte_t isOK = iso14443a_select_card(NULL, card, NULL, true, 0);
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if (MF_DBGLEVEL >= MF_DBG_ERROR) DbpString("Can't select card");
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if ( isOK == 0) {
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if (MF_DBGLEVEL >= MF_DBG_ERROR) {
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Dbprintf("Can't select card");
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}
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OnError(1);
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OnError(1);
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return;
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return;
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}
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}
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memcpy(dataout,card->uid,7);
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memcpy(dataout, card.uid, 7);
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LED_A_ON();
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LED_A_ON();
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LED_B_OFF();
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LED_B_OFF();
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@ -507,19 +499,17 @@ int DesfireAPDU(uint8_t *cmd, size_t cmd_len, uint8_t *dataout){
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size_t len = 0;
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size_t len = 0;
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size_t wrappedLen = 0;
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size_t wrappedLen = 0;
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uint8_t wCmd[USB_CMD_DATA_SIZE] = {0x00};
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uint8_t wCmd[USB_CMD_DATA_SIZE] = {0x00};
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uint8_t resp[MAX_FRAME_SIZE];
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uint8_t resp[MAX_FRAME_SIZE];
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uint8_t par[MAX_PARITY_SIZE];
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uint8_t par[MAX_PARITY_SIZE];
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wrappedLen = CreateAPDU( cmd, cmd_len, wCmd);
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wrappedLen = CreateAPDU( cmd, cmd_len, wCmd);
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if (MF_DBGLEVEL >= 4) {
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if (MF_DBGLEVEL >= 4)
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print_result("WCMD <--: ", wCmd, wrappedLen);
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print_result("WCMD <--: ", wCmd, wrappedLen);
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}
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ReaderTransmit( wCmd, wrappedLen, NULL);
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ReaderTransmit( wCmd, wrappedLen, NULL);
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len = ReaderReceive(resp, par);
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len = ReaderReceive(resp, par);
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if ( !len ) {
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if ( !len ) {
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if (MF_DBGLEVEL >= 4) Dbprintf("fukked");
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if (MF_DBGLEVEL >= 4) Dbprintf("fukked");
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return FALSE; //DATA LINK ERROR
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return FALSE; //DATA LINK ERROR
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@ -566,6 +556,7 @@ size_t CreateAPDU( uint8_t *datain, size_t len, uint8_t *dataout){
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void OnSuccess(){
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void OnSuccess(){
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pcb_blocknum = 0;
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pcb_blocknum = 0;
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ReaderTransmit(deselect_cmd, 3 , NULL);
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ReaderTransmit(deselect_cmd, 3 , NULL);
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mifare_ultra_halt();
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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LEDsoff();
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LEDsoff();
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set_tracing(FALSE);
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set_tracing(FALSE);
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@ -48,7 +48,7 @@ void SpinDelay(int ms) {
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// SpinDelay(1000);
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// SpinDelay(1000);
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// ti = GetTickCount() - ti;
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// ti = GetTickCount() - ti;
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// Dbprintf("timer(1s): %d t=%d", ti, GetTickCount());
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// Dbprintf("timer(1s): %d t=%d", ti, GetTickCount());
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void StartTickCount() {
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void StartTickCount(void) {
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// This timer is based on the slow clock. The slow clock frequency is between 22kHz and 40kHz.
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// This timer is based on the slow clock. The slow clock frequency is between 22kHz and 40kHz.
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// We can determine the actual slow clock frequency by looking at the Main Clock Frequency Register.
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// We can determine the actual slow clock frequency by looking at the Main Clock Frequency Register.
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uint16_t mainf = AT91C_BASE_PMC->PMC_MCFR & 0xffff; // = 16 * main clock frequency (16MHz) / slow clock frequency
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uint16_t mainf = AT91C_BASE_PMC->PMC_MCFR & 0xffff; // = 16 * main clock frequency (16MHz) / slow clock frequency
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@ -60,14 +60,14 @@ void StartTickCount() {
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/*
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/*
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* Get the current count.
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* Get the current count.
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*/
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*/
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uint32_t RAMFUNC GetTickCount(){
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uint32_t RAMFUNC GetTickCount(void){
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return AT91C_BASE_RTTC->RTTC_RTVR;// was * 2;
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return AT91C_BASE_RTTC->RTTC_RTVR;// was * 2;
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}
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}
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// -------------------------------------------------------------------------
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// -------------------------------------------------------------------------
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// microseconds timer
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// microseconds timer
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// -------------------------------------------------------------------------
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// -------------------------------------------------------------------------
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void StartCountUS() {
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void StartCountUS(void) {
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AT91C_BASE_PMC->PMC_PCER |= (1 << 12) | (1 << 13) | (1 << 14);
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AT91C_BASE_PMC->PMC_PCER |= (1 << 12) | (1 << 13) | (1 << 14);
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AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_TIOA0 | AT91C_TCB_TC2XC2S_NONE;
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AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_TIOA0 | AT91C_TCB_TC2XC2S_NONE;
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@ -87,25 +87,20 @@ void StartCountUS() {
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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AT91C_BASE_TCB->TCB_BCR = 1;
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AT91C_BASE_TCB->TCB_BCR = 1;
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while (AT91C_BASE_TC1->TC_CV > 1);
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while (AT91C_BASE_TC1->TC_CV >= 1);
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}
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}
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uint32_t RAMFUNC GetCountUS(){
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uint32_t RAMFUNC GetCountUS(void){
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//return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV / 15) * 10);
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//return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV / 15) * 10);
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// By suggestion from PwPiwi, http://www.proxmark.org/forum/viewtopic.php?pid=17548#p17548
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// By suggestion from PwPiwi, http://www.proxmark.org/forum/viewtopic.php?pid=17548#p17548
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return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV * 2) / 3);
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return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV * 2) / 3);
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}
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}
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void ResetUSClock(void) {
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//enable clock of timer and software trigger
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AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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while (AT91C_BASE_TC1->TC_CV > 1);
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}
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// -------------------------------------------------------------------------
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// -------------------------------------------------------------------------
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// Timer for iso14443 commands. Uses ssp_clk from FPGA
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// Timer for iso14443 commands. Uses ssp_clk from FPGA
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// -------------------------------------------------------------------------
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// -------------------------------------------------------------------------
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void StartCountSspClk() {
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void StartCountSspClk(void) {
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC0) | (1 << AT91C_ID_TC1) | (1 << AT91C_ID_TC2); // Enable Clock to all timers
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC0) | (1 << AT91C_ID_TC1) | (1 << AT91C_ID_TC2); // Enable Clock to all timers
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AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC0XC0S_TIOA1 // XC0 Clock = TIOA1
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AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC0XC0S_TIOA1 // XC0 Clock = TIOA1
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| AT91C_TCB_TC1XC1S_NONE // XC1 Clock = none
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| AT91C_TCB_TC1XC1S_NONE // XC1 Clock = none
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// The high word of the counter (TC2) will not reset until the low word (TC0) overflows.
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// The high word of the counter (TC2) will not reset until the low word (TC0) overflows.
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// Therefore need to wait quite some time before we can use the counter.
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// Therefore need to wait quite some time before we can use the counter.
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while (AT91C_BASE_TC2->TC_CV > 1);
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while (AT91C_BASE_TC2->TC_CV >= 1);
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}
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}
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void ResetSspClk(void) {
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void ResetSspClk(void) {
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//enable clock of timer and software trigger
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//enable clock of timer and software trigger
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AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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AT91C_BASE_TC2->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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AT91C_BASE_TC2->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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while (AT91C_BASE_TC2->TC_CV >= 1);
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}
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}
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uint32_t RAMFUNC GetCountSspClk(){
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uint32_t RAMFUNC GetCountSspClk(void) {
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uint32_t tmp_count = (AT91C_BASE_TC2->TC_CV << 16) | AT91C_BASE_TC0->TC_CV;
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uint32_t tmp_count = (AT91C_BASE_TC2->TC_CV << 16) | AT91C_BASE_TC0->TC_CV;
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if ((tmp_count & 0x0000ffff) == 0) //small chance that we may have missed an increment in TC2
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if ((tmp_count & 0x0000ffff) == 0) //small chance that we may have missed an increment in TC2
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return (AT91C_BASE_TC2->TC_CV << 16);
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return (AT91C_BASE_TC2->TC_CV << 16);
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@ -1050,7 +1050,7 @@ int CmdHF14AMfNestedHard(const char *Cmd) {
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slow ? "Yes" : "No",
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slow ? "Yes" : "No",
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tests);
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tests);
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int16_t isOK = mfnestedhard(blockNo, keyType, key, trgBlockNo, trgKeyType, know_target_key?trgkey:NULL, nonce_file_read, nonce_file_write, slow, tests);
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int16_t isOK = mfnestedhard(blockNo, keyType, key, trgBlockNo, trgKeyType, know_target_key ? trgkey : NULL, nonce_file_read, nonce_file_write, slow, tests);
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if (isOK) {
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if (isOK) {
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switch (isOK) {
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switch (isOK) {
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@ -547,6 +547,11 @@ bool tryDetectModulation(){
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clk = GetAskClock("", FALSE, FALSE);
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clk = GetAskClock("", FALSE, FALSE);
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if (clk>0) {
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if (clk>0) {
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tests[hits].ST = TRUE;
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tests[hits].ST = TRUE;
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// "0 0 1 " == clock auto, invert false, maxError 1.
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// false = no verbose
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// false = no emSearch
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// 1 = Ask/Man
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// st = true
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if ( ASKDemod_ext("0 0 1", FALSE, FALSE, 1, &tests[hits].ST) && test(DEMOD_ASK, &tests[hits].offset, &bitRate, clk, &tests[hits].Q5)) {
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if ( ASKDemod_ext("0 0 1", FALSE, FALSE, 1, &tests[hits].ST) && test(DEMOD_ASK, &tests[hits].offset, &bitRate, clk, &tests[hits].Q5)) {
|
||||||
tests[hits].modulation = DEMOD_ASK;
|
tests[hits].modulation = DEMOD_ASK;
|
||||||
tests[hits].bitrate = bitRate;
|
tests[hits].bitrate = bitRate;
|
||||||
|
@ -555,6 +560,11 @@ bool tryDetectModulation(){
|
||||||
++hits;
|
++hits;
|
||||||
}
|
}
|
||||||
tests[hits].ST = TRUE;
|
tests[hits].ST = TRUE;
|
||||||
|
// "0 0 1 " == clock auto, invert true, maxError 1.
|
||||||
|
// false = no verbose
|
||||||
|
// false = no emSearch
|
||||||
|
// 1 = Ask/Man
|
||||||
|
// st = true
|
||||||
if ( ASKDemod_ext("0 1 1", FALSE, FALSE, 1, &tests[hits].ST) && test(DEMOD_ASK, &tests[hits].offset, &bitRate, clk, &tests[hits].Q5)) {
|
if ( ASKDemod_ext("0 1 1", FALSE, FALSE, 1, &tests[hits].ST) && test(DEMOD_ASK, &tests[hits].offset, &bitRate, clk, &tests[hits].Q5)) {
|
||||||
tests[hits].modulation = DEMOD_ASK;
|
tests[hits].modulation = DEMOD_ASK;
|
||||||
tests[hits].bitrate = bitRate;
|
tests[hits].bitrate = bitRate;
|
||||||
|
@ -1249,8 +1259,11 @@ int CmdT55xxDump(const char *Cmd){
|
||||||
|
|
||||||
int AquireData( uint8_t page, uint8_t block, bool pwdmode, uint32_t password ){
|
int AquireData( uint8_t page, uint8_t block, bool pwdmode, uint32_t password ){
|
||||||
// arg0 bitmodes:
|
// arg0 bitmodes:
|
||||||
// bit0 = pwdmode
|
// bit0 = pwdmode
|
||||||
// bit1 = page to read from
|
// bit1 = page to read from
|
||||||
|
// arg1: which block to read
|
||||||
|
// arg2: password
|
||||||
|
|
||||||
uint8_t arg0 = (page<<1) | pwdmode;
|
uint8_t arg0 = (page<<1) | pwdmode;
|
||||||
UsbCommand c = {CMD_T55XX_READ_BLOCK, {arg0, block, password}};
|
UsbCommand c = {CMD_T55XX_READ_BLOCK, {arg0, block, password}};
|
||||||
|
|
||||||
|
@ -1583,8 +1596,7 @@ int CmdT55xxBruteForce(const char *Cmd) {
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int tryOnePassword(uint32_t password)
|
int tryOnePassword(uint32_t password) {
|
||||||
{
|
|
||||||
PrintAndLog("Trying password %08x", password);
|
PrintAndLog("Trying password %08x", password);
|
||||||
if (!AquireData(T55x7_PAGE0, T55x7_CONFIGURATION_BLOCK, TRUE, password)) {
|
if (!AquireData(T55x7_PAGE0, T55x7_CONFIGURATION_BLOCK, TRUE, password)) {
|
||||||
PrintAndLog("Aquireing data from device failed. Quitting");
|
PrintAndLog("Aquireing data from device failed. Quitting");
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue