github/RRG-Proxmark3
1
0
Fork 0
mirror of https://github.com/RfidResearchGroup/proxmark3.git synced 2025-07-06 04:51:36 -07:00
Code Issues Projects Releases Packages Wiki Activity Actions 4

Update lfadc.c

Browse source 
Signed-off-by: rfidgeek1337 <rfidgeek1337@proton.me>
This commit is contained in:
rfidgeek1337 2025-06-11 18:14:19 +02:00 • committed by GitHub
parent 2dfb0706fa
commit f7f0605207
No known key found for this signature in database
GPG key ID: B5690EEEBB952194
1 changed files with 1 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

2
armsrc/lfadc.c
View file

@ -241,7 +241,7 @@ void lf_init(bool reader, bool simulate, bool ledcontrol) {
// 280T0 = 280 * 8us = 2240us = 2.24ms - HitagS minimum time before the first command (powerup time) // 280T0 = 280 * 8us = 2240us = 2.24ms - HitagS minimum time before the first command (powerup time)
// maximum: 545T0 = 545 * 8us = 4360us = 4.36ms - Hitag2 command waiting time before it starts transmitting in public mode (if configured so) // maximum: 545T0 = 545 * 8us = 4360us = 4.36ms - Hitag2 command waiting time before it starts transmitting in public mode (if configured so)
// 565T0 = 565 * 8us = 4520us = 4.52ms - HitagS waiting time before entering TTF mode (if configured so) // 565T0 = 565 * 8us = 4520us = 4.52ms - HitagS waiting time before entering TTF mode (if configured so)
// Thus (2.50 ms + 4.36 ms) / 2 ~= 3 ms, should be a good timing for both tag models // Thus (2.50 ms + 4.36 ms) / 2 ~= 3 ms (rounded down to integer), should be a good timing for both tag models
SpinDelay(3); SpinDelay(3);
// Steal this pin from the SSP (SPI communication channel with fpga) and use it to control the modulation // Steal this pin from the SSP (SPI communication channel with fpga) and use it to control the modulation