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macros for divisors and fix lf optimal freq display
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4 changed files with 15 additions and 9 deletions
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@ -182,10 +182,10 @@ void MeasureAntennaTuning(void) {
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, i);
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SpinDelay(20);
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uint32_t adcval = ((MAX_ADC_LF_VOLTAGE * AvgAdc(ADC_CHAN_LF)) >> 10);
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if (i == 96)
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if (i == LF_DIVISOR_125)
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payload.v_lf125 = adcval; // voltage at 125kHz
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if (i == 89)
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if (i == LF_DIVISOR_134)
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payload.v_lf134 = adcval; // voltage at 134kHz
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if (i == sc->divisor)
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