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transmit ok, timing not ok

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merlokk 2022-07-03 18:19:57 +03:00
commit e4df73738f
1 changed files with 5 additions and 1 deletions
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6
armsrc/hfops.c
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@ -117,7 +117,7 @@ static uint32_t HfEncodeTkm(uint8_t *uid, uint8_t modulation, uint8_t *data) {
} }
} }
len = 2; len = indx;
} else { } else {
// TK-17 // TK-17
// 74ns 1 field cycle, // 74ns 1 field cycle,
@ -150,6 +150,7 @@ int HfWriteTkm(uint8_t *uid, uint8_t modulation, uint32_t timeout) {
FpgaDownloadAndGo(FPGA_BITSTREAM_HF); FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
SetAdcMuxFor(GPIO_MUXSEL_HIPKD); SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K);
FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
int vHf = 0; // in mV int vHf = 0; // in mV
bool button_pressed = false; bool button_pressed = false;
@ -172,6 +173,9 @@ int HfWriteTkm(uint8_t *uid, uint8_t modulation, uint32_t timeout) {
SpinDelay(10); SpinDelay(10);
for (int i = 0; i < elen; i++) { for (int i = 0; i < elen; i++) {
if (data[i] == 0)
data[i] = 10;
for (int j = 0; j < 13;) { for (int j = 0; j < 13;) {
if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) { if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
AT91C_BASE_SSC->SSC_THR = 0xff; AT91C_BASE_SSC->SSC_THR = 0xff;