mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-14 18:48:13 -07:00
Eradicate all occurences of hardcoded memory addresses from all sources files, except for the FPGA bitstream fallback
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parent
52b3d184ce
commit
e3ae025783
7 changed files with 26 additions and 13 deletions
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@ -107,6 +107,7 @@ void UsbPacketReceived(BYTE *packet, int len)
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UsbSendPacket(packet, len);
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}
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extern char _osimage_entry;
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void BootROM(void)
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{
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//------------
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@ -182,9 +183,8 @@ void BootROM(void)
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USB_D_PLUS_PULLUP_OFF();
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LED_B_ON();
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// jump to Flash address 0x10000 (LSBit set for thumb mode, 0x100000 added for Flash base address)
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asm("ldr r3, = 0x00110001\n");
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asm("bx r3\n");
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// jump to Flash address of the osimage entry point (LSBit set for thumb mode)
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asm("bx %0\n" : : "r" ( ((int)&_osimage_entry) | 0x1 ) );
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}
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}
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}
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@ -16,12 +16,17 @@ flashstart:
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b Fiq
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Reset:
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ldr sp, = 0x0020FFF8 @ initialize stack pointer to top of RAM
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ldr sp, .stack_end @ initialize stack pointer to top of RAM
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bl CopyBootToRAM @ copy bootloader to RAM (in case the
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@ user re-flashes the bootloader)
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ldr r3, = 0x00200000 @ start address of RAM bootloader
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ldr r3, .bootphase2_start @ start address of RAM bootloader
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bx r3 @ jump to it
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.stack_end:
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.word _stack_end
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.bootphase2_start:
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.word __bootphase2_start__
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Fiq:
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b Fiq
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UndefinedInstruction:
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@ -1,11 +1,13 @@
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#include <proxmark3.h>
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extern char __bootphase2_src_start__, __bootphase2_start__, __bootphase2_end__;
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void __attribute__((section(".bootphase1"))) CopyBootToRAM(void)
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{
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int i;
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volatile DWORD *s = (volatile DWORD *)0x200;
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volatile DWORD *d = (volatile DWORD *)0x200000;
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volatile DWORD *s = (volatile DWORD *)&__bootphase2_src_start__;
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volatile DWORD *d = (volatile DWORD *)&__bootphase2_start__;
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unsigned int l = (int)&__bootphase2_end__ - (int)&__bootphase2_start__;
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for(i = 0; i < 1024; i++) *d++ = *s++;
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for(i = 0; i < l/sizeof(DWORD); i++) *d++ = *s++;
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}
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@ -25,6 +25,7 @@ SECTIONS
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LONG(_version_information_start)
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} >bootphase1
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__bootphase2_src_start__ = ORIGIN(bootphase2);
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.bootphase2 : {
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__bootphase2_start__ = .;
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*(.startphase2)
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@ -6,5 +6,8 @@
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.global ramstart
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ramstart:
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ldr sp, = 0x0020FFF8
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ldr sp, .stack_end
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bl BootROM
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.stack_end:
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.word _stack_end
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