chg: reconfigure uart timeouts when compiled for FPC and connecting over USB.

This commit is contained in:
iceman1001 2019-04-30 12:57:44 +02:00
commit e1063e2836
5 changed files with 54 additions and 34 deletions

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@ -440,6 +440,21 @@ extern capabilities_t pm3_capabilities;
#define PM3_EFATAL -99
// Receiving from USART need more than 30ms as we used on USB
// else we get errors about partial packet reception
// FTDI 9600 hw status -> we need 20ms
// FTDI 115200 hw status -> we need 50ms
// FTDI 460800 hw status -> we need 30ms
// BT 115200 hf mf fchk 1 dic -> we need 140ms
// all zero's configure: no timeout for read/write used.
// took settings from libnfc/buses/uart.c
// uart_windows.c
# define UART_FPC_CLIENT_RX_TIMEOUT_MS 170
# define UART_USB_CLIENT_RX_TIMEOUT_MS 20
# define UART_TCP_CLIENT_RX_TIMEOUT_MS 300
// CMD_DEVICE_INFO response packet has flags in arg[0], flag definitions:
/* Whether a bootloader that understands the common_area is present */
#define DEVICE_INFO_FLAG_BOOTROM_PRESENT (1<<0)