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This commit is contained in:
Philippe Teuwen 2023-09-07 20:13:18 +02:00
parent 5abae85eda
commit d74e264250
9 changed files with 43 additions and 43 deletions
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2
armsrc/fpgaloader.c
View file

@ -162,7 +162,7 @@ void FpgaSetupSsc(uint16_t fpga_mode) {
// 8, 16 or 32 bits per transfer, no loopback, MSB first, 1 transfer per sync // 8, 16 or 32 bits per transfer, no loopback, MSB first, 1 transfer per sync
// pulse, no output sync // pulse, no output sync
if (((fpga_mode & FPGA_MAJOR_MODE_MASK) == FPGA_MAJOR_MODE_HF_READER ) && if (((fpga_mode & FPGA_MAJOR_MODE_MASK) == FPGA_MAJOR_MODE_HF_READER) &&
(FpgaGetCurrent() == FPGA_BITSTREAM_HF || FpgaGetCurrent() == FPGA_BITSTREAM_HF_15)) { (FpgaGetCurrent() == FPGA_BITSTREAM_HF || FpgaGetCurrent() == FPGA_BITSTREAM_HF_15)) {
AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(16) | AT91C_SSC_MSBF | SSC_FRAME_MODE_WORDS_PER_TRANSFER(0); AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(16) | AT91C_SSC_MSBF | SSC_FRAME_MODE_WORDS_PER_TRANSFER(0);
} else { } else {

10
armsrc/iso14443a.c
View file

@ -1276,8 +1276,8 @@ bool SimulateIso14443aInit(uint8_t tagType, uint16_t flags, uint8_t *data, tag_r
// EV1/NTAG, set PWD w AMIIBO algo if all zero. // EV1/NTAG, set PWD w AMIIBO algo if all zero.
if (tagType == 7) { if (tagType == 7) {
uint8_t pwd[4] = {0,0,0,0}; uint8_t pwd[4] = {0, 0, 0, 0};
uint8_t gen_pwd[4] = {0,0,0,0}; uint8_t gen_pwd[4] = {0, 0, 0, 0};
emlGetMemBt(pwd, (*pages - 1) * 4 + MFU_DUMP_PREFIX_LENGTH, sizeof(pwd)); emlGetMemBt(pwd, (*pages - 1) * 4 + MFU_DUMP_PREFIX_LENGTH, sizeof(pwd));
emlGetMemBt(rPACK, (*pages) * 4 + MFU_DUMP_PREFIX_LENGTH, sizeof(rPACK)); emlGetMemBt(rPACK, (*pages) * 4 + MFU_DUMP_PREFIX_LENGTH, sizeof(rPACK));
@ -1669,7 +1669,7 @@ void SimulateIso14443aTag(uint8_t tagType, uint16_t flags, uint8_t *data, uint8_
// send NACK 0x0 == invalid argument // send NACK 0x0 == invalid argument
EmSend4bit(CARD_NACK_IV); EmSend4bit(CARD_NACK_IV);
} else { } else {
uint8_t cmd[3] = {0,0,0}; uint8_t cmd[3] = {0, 0, 0};
cmd[0] = tearings[index]; cmd[0] = tearings[index];
AddCrc14A(cmd, sizeof(cmd) - 2); AddCrc14A(cmd, sizeof(cmd) - 2);
EmSendCmd(cmd, sizeof(cmd)); EmSendCmd(cmd, sizeof(cmd));
@ -1706,7 +1706,7 @@ void SimulateIso14443aTag(uint8_t tagType, uint16_t flags, uint8_t *data, uint8_
LogTrace(receivedCmd, Uart.len, Uart.startTime * 16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime * 16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); LogTrace(receivedCmd, Uart.len, Uart.startTime * 16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime * 16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true);
p_response = NULL; p_response = NULL;
} else if (receivedCmd[0] == MIFARE_ULEV1_AUTH && len == 7 && tagType == 7) { // NTAG / EV-1 } else if (receivedCmd[0] == MIFARE_ULEV1_AUTH && len == 7 && tagType == 7) { // NTAG / EV-1
uint8_t pwd[4] = {0,0,0,0}; uint8_t pwd[4] = {0, 0, 0, 0};
emlGetMemBt(pwd, (pages - 1) * 4 + MFU_DUMP_PREFIX_LENGTH, sizeof(pwd)); emlGetMemBt(pwd, (pages - 1) * 4 + MFU_DUMP_PREFIX_LENGTH, sizeof(pwd));
if (g_dbglevel >= DBG_DEBUG) { if (g_dbglevel >= DBG_DEBUG) {
Dbprintf("Reader sent password: "); Dbprintf("Reader sent password: ");
@ -1730,7 +1730,7 @@ void SimulateIso14443aTag(uint8_t tagType, uint16_t flags, uint8_t *data, uint8_
} }
} else if (receivedCmd[0] == MIFARE_ULEV1_VCSL && len == 23 && tagType == 7) { } else if (receivedCmd[0] == MIFARE_ULEV1_VCSL && len == 23 && tagType == 7) {
uint8_t cmd[3] = {0,0,0}; uint8_t cmd[3] = {0, 0, 0};
emlGetMemBt(cmd, (pages - 2) * 4 + 1 + MFU_DUMP_PREFIX_LENGTH, 1); emlGetMemBt(cmd, (pages - 2) * 4 + 1 + MFU_DUMP_PREFIX_LENGTH, 1);
AddCrc14A(cmd, sizeof(cmd) - 2); AddCrc14A(cmd, sizeof(cmd) - 2);
EmSendCmd(cmd, sizeof(cmd)); EmSendCmd(cmd, sizeof(cmd));

12
armsrc/iso14443b.c
View file

@ -45,7 +45,7 @@
* 1 / 3 390 000 = 294.98 nano seconds ( 0.2949 µs ) * 1 / 3 390 000 = 294.98 nano seconds ( 0.2949 µs )
* *
* 1 ETU = 9.4395 µs = 32 SSP_CLK = 128 FC * 1 ETU = 9.4395 µs = 32 SSP_CLK = 128 FC
* 1 SSP_CLK = 4 FC * 1 SSP_CLK = 4 FC
* 1 µs 3 SSP_CLK about 14 FC * 1 µs 3 SSP_CLK about 14 FC
* PROBLEM 1. * PROBLEM 1.
* ---------- * ----------
@ -1409,9 +1409,9 @@ static void TransmitFor14443b_AsReader(uint32_t *start_time) {
#ifdef RDV4 #ifdef RDV4
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_SHALLOW_MOD_RDV4); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_SHALLOW_MOD_RDV4);
#else #else
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_SHALLOW_MOD); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_SHALLOW_MOD);
#endif #endif
// TR2 minimum 14 ETUs // TR2 minimum 14 ETUs
if (*start_time < ISO14B_TR0) { if (*start_time < ISO14B_TR0) {
@ -1596,7 +1596,7 @@ int iso14443b_apdu(uint8_t const *msg, size_t msg_len, bool send_chaining, void
// SSP_CLK = 4833 µS * 3.39 = 16384 // SSP_CLK = 4833 µS * 3.39 = 16384
int len = Get14443bAnswerFromTag(rxdata, rxmaxlen, iso14b_timeout , &eof_time); int len = Get14443bAnswerFromTag(rxdata, rxmaxlen, iso14b_timeout, &eof_time);
FpgaDisableTracing(); FpgaDisableTracing();
uint8_t *data_bytes = (uint8_t *) rxdata; uint8_t *data_bytes = (uint8_t *) rxdata;
@ -2107,9 +2107,9 @@ void iso14443b_setup(void) {
// Signal field is on with the appropriate LED // Signal field is on with the appropriate LED
#ifdef RDV4 #ifdef RDV4
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_SHALLOW_MOD_RDV4); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_SHALLOW_MOD_RDV4);
#else #else
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_SHALLOW_MOD); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_SHALLOW_MOD);
#endif #endif
SpinDelay(100); SpinDelay(100);

4
armsrc/iso15693.c
View file

@ -296,9 +296,9 @@ void TransmitTo15693Tag(const uint8_t *cmd, int len, uint32_t *start_time, bool
#ifdef RDV4 #ifdef RDV4
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | (shallow_mod ? FPGA_HF_READER_MODE_SEND_SHALLOW_MOD_RDV4 : FPGA_HF_READER_MODE_SEND_FULL_MOD)); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | (shallow_mod ? FPGA_HF_READER_MODE_SEND_SHALLOW_MOD_RDV4 : FPGA_HF_READER_MODE_SEND_FULL_MOD));
#else #else
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | (shallow_mod ? FPGA_HF_READER_MODE_SEND_SHALLOW_MOD : FPGA_HF_READER_MODE_SEND_FULL_MOD)); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | (shallow_mod ? FPGA_HF_READER_MODE_SEND_SHALLOW_MOD : FPGA_HF_READER_MODE_SEND_FULL_MOD));
#endif #endif
if (*start_time < DELAY_ARM_TO_TAG) { if (*start_time < DELAY_ARM_TO_TAG) {

2
client/src/cmdhf14b.c
View file

@ -441,7 +441,7 @@ static bool get_14b_UID(uint8_t *d, iso14b_type_t *found_type) {
if (resp.oldarg[0] == 0) { if (resp.oldarg[0] == 0) {
memcpy(d, resp.data.asBytes, sizeof(iso14b_card_select_t)); memcpy(d, resp.data.asBytes, sizeof(iso14b_card_select_t));
iso14b_card_select_t *card = (iso14b_card_select_t*)d; iso14b_card_select_t *card = (iso14b_card_select_t *)d;
uint8_t empty[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; uint8_t empty[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
if (memcmp(card->uid, empty, card->uidlen) == 0) { if (memcmp(card->uid, empty, card->uidlen) == 0) {
return false; return false;

48
client/src/cmdlft55xx.c
View file

@ -4158,7 +4158,7 @@ static int CmdT55xxSniff(const char *Cmd) {
usedPassword <<= 1; usedPassword <<= 1;
if (data[i] == '1') { if (data[i] == '1') {
usedPassword |= 1; usedPassword |= 1;
} }
} }
// Lock bit 34 // Lock bit 34
@ -4167,7 +4167,7 @@ static int CmdT55xxSniff(const char *Cmd) {
blockData <<= 1; blockData <<= 1;
if (data[i] == '1') { if (data[i] == '1') {
blockData |= 1; blockData |= 1;
} }
} }
blockAddr = 0; blockAddr = 0;
@ -4198,7 +4198,7 @@ static int CmdT55xxSniff(const char *Cmd) {
blockData <<= 1; blockData <<= 1;
if (data[i] == '1') { if (data[i] == '1') {
blockData |= 1; blockData |= 1;
} }
} }
for (uint8_t i = 2; i <= 33; i++) { for (uint8_t i = 2; i <= 33; i++) {
@ -4239,7 +4239,7 @@ static int CmdT55xxSniff(const char *Cmd) {
usedPassword <<= 1; usedPassword <<= 1;
if (data[i] == '1') { if (data[i] == '1') {
usedPassword |= 1; usedPassword |= 1;
} }
} }
blockData = 0; blockData = 0;
@ -4247,7 +4247,7 @@ static int CmdT55xxSniff(const char *Cmd) {
blockData <<= 1; blockData <<= 1;
if (data[i] == '1') { if (data[i] == '1') {
blockData |= 1; blockData |= 1;
} }
} }
blockAddr = 0; blockAddr = 0;
@ -4255,7 +4255,7 @@ static int CmdT55xxSniff(const char *Cmd) {
blockAddr <<= 1; blockAddr <<= 1;
if (data[i] == '1') { if (data[i] == '1') {
blockAddr |= 1; blockAddr |= 1;
} }
} }
have_data = true; have_data = true;
@ -4271,26 +4271,26 @@ static int CmdT55xxSniff(const char *Cmd) {
if (have_data) { if (have_data) {
if (blockAddr == 7) { if (blockAddr == 7) {
PrintAndLogEx(SUCCESS, "%-22s | "_GREEN_("%10s")" | "_YELLOW_("%8s")" | "_YELLOW_("%d")" | "_GREEN_("%d")" | %3d | %3d | %s" PrintAndLogEx(SUCCESS, "%-22s | "_GREEN_("%10s")" | "_YELLOW_("%8s")" | "_YELLOW_("%d")" | "_GREEN_("%d")" | %3d | %3d | %s"
, modeText , modeText
, pwdText , pwdText
, dataText , dataText
, blockAddr , blockAddr
, page , page
, minWidth , minWidth
, maxWidth , maxWidth
, data , data
); );
} else { } else {
PrintAndLogEx(SUCCESS, "%-22s | "_GREEN_("%10s")" | "_GREEN_("%8s")" | "_GREEN_("%d")" | "_GREEN_("%d")" | %3d | %3d | %s" PrintAndLogEx(SUCCESS, "%-22s | "_GREEN_("%10s")" | "_GREEN_("%8s")" | "_GREEN_("%d")" | "_GREEN_("%d")" | %3d | %3d | %s"
, modeText , modeText
, pwdText , pwdText
, dataText , dataText
, blockAddr , blockAddr
, page , page
, minWidth , minWidth
, maxWidth , maxWidth
, data , data
); );
} }
} }
} }

4
doc/commands.json
View file

@ -8786,7 +8786,7 @@
"-1, --ht1 Card type Hitag 1", "-1, --ht1 Card type Hitag 1",
"-2, --ht2 Card type Hitag 2", "-2, --ht2 Card type Hitag 2",
"-s, --hts Card type Hitag S", "-s, --hts Card type Hitag S",
"-m, --htm Card type Hitag \u00ce\u00bc" "-m, --htm Card type Hitag \u03bc"
], ],
"usage": "lf hitag eload [-h12sm] -f <fn>" "usage": "lf hitag eload [-h12sm] -f <fn>"
}, },
@ -11837,6 +11837,6 @@
"metadata": { "metadata": {
"commands_extracted": 686, "commands_extracted": 686,
"extracted_by": "PM3Help2JSON v1.00", "extracted_by": "PM3Help2JSON v1.00",
"extracted_on": "2023-08-24T05:14:06" "extracted_on": "2023-09-07T18:12:46"
} }
} }

2
fpga/hi_flite.v
View file

@ -296,7 +296,7 @@ begin
mid <= 8'd129; mid <= 8'd129;
else if (adc_d < curminthres) else if (adc_d < curminthres)
mid <= 8'd127; mid <= 8'd127;
else else
begin begin
if (after_hysteresis) if (after_hysteresis)
begin begin

2
include/iso14b.h
View file

@ -69,7 +69,7 @@ typedef struct {
#define SSP_TO_US(x) ( (int32_t)((x) / 3.39) ) #define SSP_TO_US(x) ( (int32_t)((x) / 3.39) )
#define HF14_ETU_TO_SSP(x) ((x) << 5) // 1 ETU = 32 SSP #define HF14_ETU_TO_SSP(x) ((x) << 5) // 1 ETU = 32 SSP
#define HF14_SSP_TO_ETU(x) ((x) >> 5) // #define HF14_SSP_TO_ETU(x) ((x) >> 5) //
#define HF14_ETU_TO_US(x) ( (float)((x) * 9.4396) ) #define HF14_ETU_TO_US(x) ( (float)((x) * 9.4396) )
#define HF14_ETU_TO_US_2(x) ( (int32_t)( ((x) * 9439600) / 1000000) ) #define HF14_ETU_TO_US_2(x) ( (int32_t)( ((x) * 9439600) / 1000000) )