mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-19 21:03:48 -07:00
chg: SPI tests for flashmem on PA10. (aka pm3 evo) Peripheral B, fixed.
This commit is contained in:
parent
6c6aad6196
commit
d54c4d3e05
4 changed files with 195 additions and 227 deletions
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@ -1,77 +1,129 @@
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#include "flashmem.h"
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#include "flashmem.h"
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#include "proxmark3.h"
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#include "apps.h"
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#define address_length 3
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#define address_length 3
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extern void Dbprintf(const char *fmt, ...);
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/* here: use NCPS2 @ PA10: */
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#define NCPS_PDR_BIT AT91C_PA10_NPCS2
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#define NCPS_ASR_BIT 0
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#define NPCS_BSR_BIT AT91C_PA10_NPCS2
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#define SPI_CSR_NUM 0
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static void FlashSetup() {
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/* PCS_0 for NPCS0, PCS_1 for NPCS1 ... */
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#define PCS_0 ((0<<0)|(1<<1)|(1<<2)|(1<<3)) // 0xE - 1110
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#define PCS_1 ((1<<0)|(0<<1)|(1<<2)|(1<<3)) // 0xD - 1101
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#define PCS_2 ((1<<0)|(1<<1)|(0<<2)|(1<<3)) // 0xB - 1011
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#define PCS_3 ((1<<0)|(1<<1)|(1<<2)|(0<<3)) // 0x7 - 0111
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/* TODO: ## */
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#if (SPI_CSR_NUM == 0)
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#define SPI_MR_PCS PCS_0
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#elif (SPI_CSR_NUM == 1)
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#define SPI_MR_PCS PCS_1
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#elif (SPI_CSR_NUM == 2)
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#define SPI_MR_PCS PCS_2
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#elif (SPI_CSR_NUM == 3)
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#define SPI_MR_PCS PCS_3
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#else
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#error "SPI_CSR_NUM invalid"
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// not realy - when using an external address decoder...
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// but this code takes over the complete SPI-interace anyway
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#endif
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/*
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1. variable chip select (PS=1) ChipSelect number is written to TDR in EVERY transfer
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2. fixed chip select (PS=0),
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FIXED = you manage the CS lines
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VARIABLE = SPI module manages the CS lines
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*/
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void FlashSetup(void) {
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// PA1 -> SPI_NCS3 chip select (MEM)
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// PA1 -> SPI_NCS3 chip select (MEM)
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// PA12 -> SPI_MISO Master-In Slave-Out
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// PA12 -> SPI_MISO Master-In Slave-Out
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// PA13 -> SPI_MOSI Master-Out Slave-In
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// PA13 -> SPI_MOSI Master-Out Slave-In
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// PA14 -> SPI_SPCK Serial Clock
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// PA14 -> SPI_SPCK Serial Clock
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// Disable PIO control of the following pins, allows use by the SPI peripheral
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// Kill all the pullups,
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AT91C_BASE_PIOA->PIO_PDR =
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//AT91C_BASE_PIOA->PIO_PPUDR = GPIO_NCS1 | GPIO_MOSI | GPIO_SPCK | GPIO_MISO;
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GPIO_NCS2 |
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GPIO_MISO |
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GPIO_MOSI |
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GPIO_SPCK;
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// These pins are outputs
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//AT91C_BASE_PIOA->PIO_OER = GPIO_NCS1 | GPIO_MOSI | GPIO_SPCK;
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// PIO controls the following pins
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//AT91C_BASE_PIOA->PIO_PER = GPIO_NCS1 | GPIO_MOSI | GPIO_SPCK | GPIO_MISO;
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// Disable PIO control of the following pins, hand over to SPI control
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AT91C_BASE_PIOA->PIO_PDR = GPIO_MISO | GPIO_MOSI | GPIO_SPCK;
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// Peripheral A
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// Peripheral A
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AT91C_BASE_PIOA->PIO_ASR =
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AT91C_BASE_PIOA->PIO_ASR = GPIO_MISO | GPIO_MOSI | GPIO_SPCK;
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GPIO_NCS2 |
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// Peripheral B
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GPIO_MISO |
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AT91C_BASE_PIOA->PIO_BSR = GPIO_MISO | GPIO_MOSI | GPIO_SPCK;
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GPIO_MOSI |
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GPIO_SPCK;
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// set chip-select as output high (unselect card)
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AT91C_BASE_PIOA->PIO_PER = NCPS_PDR_BIT; // enable GPIO of CS-pin
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AT91C_BASE_PIOA->PIO_SODR = NCPS_PDR_BIT; // set high
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AT91C_BASE_PIOA->PIO_OER = NCPS_PDR_BIT; // output enable
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//enable the SPI Peripheral clock
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//enable the SPI Peripheral clock
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_SPI);
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_SPI);
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// SPI Mode register
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/*
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AT91C_BASE_SPI->SPI_MR =
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(0 << 24) | // DLYBCS, Delay between chip selects (take default: 6 MCK periods)
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(0 << 7) | // LLB, Local Loopback Disabled
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AT91C_SPI_MODFDIS | // Mode Fault Detection disabled
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(0 << 2) | // PCSDEC, Chip selects connected directly to peripheral
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AT91C_SPI_PS_FIXED | // PS, Fixed Peripheral Select
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AT91C_SPI_MSTR; // MSTR, Master Mode
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*/
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AT91C_BASE_SPI->SPI_MR = AT91C_SPI_MSTR | AT91C_SPI_PS_FIXED | AT91C_SPI_MODFDIS;
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// PCS, Peripheral Chip Select
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AT91C_BASE_SPI->SPI_MR |= ( (SPI_MR_PCS << 16) & AT91C_SPI_PCS );
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// SPI Chip select register
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/*
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AT91C_BASE_SPI->SPI_CSR[SPI_CSR_NUM] =
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(1 << 24) | // Delay between Consecutive Transfers (32 MCK periods)
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(1 << 16) | // Delay Before SPCK (1 MCK period)
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(6 << 8) | // Serial Clock Baud Rate (baudrate = MCK/6 = 24Mhz/6 = 4M baud
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AT91C_SPI_BITS_8 | // Bits per Transfer (8 bits)
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(0 << 3) | // CSAAT, Chip Select inactive after transfer
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AT91C_SPI_NCPHA | // NCPHA, Clock Phase data captured on leading edge, changes on following edge
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(0 << 0); // CPOL, Clock Polarity inactive state is logic 0
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*/
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AT91C_BASE_SPI->SPI_CSR[SPI_CSR_NUM] = AT91C_SPI_CPOL | AT91C_SPI_BITS_8 | (6 << 8);
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// Enable SPI
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// Enable SPI
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AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN;
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AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN;
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// SPI Mode register
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AT91C_BASE_SPI->SPI_MR =
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((0 << 24)& AT91C_SPI_DLYBCS) | // DLYBCS, Delay between chip selects (take default: 6 MCK periods)
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((1 << 16)& AT91C_SPI_PCS) | // PCS, Peripheral Chip Select (selects PA1)
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((0 << 7) & AT91C_SPI_LLB) | // Local Loopback Disabled
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((1 << 4) & AT91C_SPI_MODFDIS) | // Mode Fault Detection disabled
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((0 << 2) & AT91C_SPI_PCSDEC) | // Chip selects connected directly to peripheral
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((0 << 1) & AT91C_SPI_PS_FIXED) | // PS, Fixed Peripheral Select
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((1 << 0) & AT91C_SPI_MSTR); // MSTR, Master Mode
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// SPI Chip select register
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/* Send 20 spi commands with card not selected */
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AT91C_BASE_SPI->SPI_CSR[0] =
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for (int i=0; i<21; i++)
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((1 << 24)& AT91C_SPI_DLYBCT) | // Delay between Consecutive Transfers (32 MCK periods)
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FlashSend(0xFF);
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((1 << 16)& AT91C_SPI_DLYBS) | // Delay Before SPCK (1 MCK period)
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((6 << 8) & AT91C_SPI_SCBR) | // Serial Clock Baud Rate (baudrate = MCK/6 = 24Mhz/6 = 4M baud
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/* enable automatic chip-select */
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(AT91C_SPI_BITS_8 & AT91C_SPI_BITS) | // Bits per Transfer (8 bits)
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// reset PIO-registers of CS-pin to default
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((0 << 3) & AT91C_SPI_CSAAT) | // CSAAT, Chip Select inactive after transfer
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AT91C_BASE_PIOA->PIO_ODR = NCPS_PDR_BIT; // input
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((1 << 1) & AT91C_SPI_NCPHA) | // NCPHA, Clock Phase data captured on leading edge, changes on following edge
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AT91C_BASE_PIOA->PIO_CODR = NCPS_PDR_BIT; // clear
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((0 << 0) & AT91C_SPI_CPOL); // CPOL, Clock Polarity inactive state is logic 0
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// disable PIO from controlling the CS pin (=hand over to SPI)
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AT91C_BASE_PIOA->PIO_PDR = NCPS_PDR_BIT;
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// set pin-functions in PIO Controller (function NCPS for CS-pin)
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AT91C_BASE_PIOA->PIO_ASR = NCPS_ASR_BIT;
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AT91C_BASE_PIOA->PIO_BSR = NPCS_BSR_BIT;
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}
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}
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static void FlashInit() {
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void FlashStop(void) {
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StartTicks();
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//NCS_1_HIGH;
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LED_A_ON();
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FlashSetup();
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NCS_2_LOW;
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WaitUS(100);
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Dbprintf("FlashInit");
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}
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static void FlashStop(){
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NCS_2_HIGH;
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StopTicks();
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StopTicks();
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Dbprintf("FlashStop");
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Dbprintf("FlashStop");
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LED_A_OFF();
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LED_A_OFF();
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//* Reset all the Chip Select register
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//* Reset all the Chip Select register
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AT91C_BASE_SPI->SPI_CSR[0] = 0;
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AT91C_BASE_SPI->SPI_CSR[0] = 0;
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// AT91C_BASE_SPI->SPI_CSR[1] = 0;
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AT91C_BASE_SPI->SPI_CSR[1] = 0;
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// AT91C_BASE_SPI->SPI_CSR[2] = 0;
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AT91C_BASE_SPI->SPI_CSR[2] = 0;
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// AT91C_BASE_SPI->SPI_CSR[3] = 0;
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AT91C_BASE_SPI->SPI_CSR[3] = 0;
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// Reset the SPI mode
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// Reset the SPI mode
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AT91C_BASE_SPI->SPI_MR = 0;
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AT91C_BASE_SPI->SPI_MR = 0;
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@ -83,78 +135,58 @@ static void FlashStop(){
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AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIDIS;
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AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIDIS;
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}
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}
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// The chip select lines used when sending data.
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uint16_t FlashSend(uint16_t data) {
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// These values are loaded into the SPI Transmit Data Register (TDR) when sending data.
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/*
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uint16_t incoming = 0;
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static const U32 SPI_TXRX_CS0 = BIT19 | BIT18 | BIT17 ;
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static const U32 SPI_TXRX_CS1 = BIT19 | BIT18 | BIT16;
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while ( !(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_TXEMPTY)) {}; // wait for the transfer to complete
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static const U32 SPI_TXRX_CS2 = BIT19 | BIT17 | BIT16;
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AT91C_BASE_SPI->SPI_TDR = data; // send the data
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static const U32 SPI_TXRX_CS3 = BIT18 | BIT17 | BIT16;
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while ( !(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RDRF)) {}; // wait till transfer is complete
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*/
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/*
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incoming = ((AT91C_BASE_SPI->SPI_RDR) & 0xFFFF);
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Fixed = you manage the CS lines
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return incoming;
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Variable = SPI module manages the CS lines
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}
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const UINT32 PCS_CS2 = 0x00030000;
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uint8_t Flash_ReadStat1(void) {
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const UINT32 PCS_LASTTXFER = 0x01000000;
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uint8_t stat2 = FlashSend(READSTAT1);
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UINT32 temp;
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uint8_t stat1 = FlashSend(0xFF);
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temp = dataToSend;
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Dbprintf("stat1 [%02x] %02x ", stat1, stat2);
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temp |= PCS_CS2;
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// NCS_1_HIGH;
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if(lastByte == true)
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return stat1;
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{
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}
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temp |= PCS_LASTTXFER;
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/*
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static uint8_t Flash_ReadStat2(void) {
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FlashSend(READSTAT2);
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uint8_t stat2 = FlashSend(0xff);
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NCS_1_HIGH;
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return stat2;
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}
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}
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SPI_TDR = temp;
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*/
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*/
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// 1. variable chip select (PS=1) ChipSelect number is written to TDR in EVERY transfer
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// 2. fixed chip select (PS=0),
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static uint8_t FlashSend(uint16_t data) {
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bool Flash_NOTBUSY(void) {
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WDT_HIT();
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// wait for the transfer to complete
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uint8_t state, count = 0;
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while ((AT91C_BASE_SPI->SPI_SR & AT91C_SPI_TXEMPTY) == 0) {};
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do {
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state = Flash_ReadStat1();
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// send data
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if (count > 100) {
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AT91C_BASE_SPI->SPI_TDR = data;
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return false;
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// wait for the recieving data
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while (!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RDRF)) {};
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//return MISO_VALUE;
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return AT91C_BASE_SPI->SPI_RDR & 0xFF;
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/*
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SCK_LOW;
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NCS_2_LOW;
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for (uint8_t i = 0; i < 8; i++) {
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SCK_LOW;
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WaitUS(2);
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if (data & 0x80) {
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MOSI_HIGH;
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} else {
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MOSI_LOW;
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WaitUS(2);
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}
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}
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data <<= 1;
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count++;
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SCK_HIGH;
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} while (state & BUSY);
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tmp = tmp << 1 | MISO_VALUE;
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return true;
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}
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SCK_LOW;
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return tmp;
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*/
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}
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}
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/*
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static uint8_t FlashWriteRead(uint8_t data){
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static uint8_t FlashWriteRead(uint8_t data){
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FlashSend(READDATA);
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FlashSend(READDATA);
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FlashSend(data);
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FlashSend(data);
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uint8_t ret = MISO_VALUE;
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uint8_t ret = MISO_VALUE;
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return ret;
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return ret;
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}
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}
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static void FlashWrite_Enable(){
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static void FlashWrite_Enable(){
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FlashWriteRead(WRITEENABLE);
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FlashWriteRead(WRITEENABLE);
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Dbprintf("Flash WriteEnabled");
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Dbprintf("Flash WriteEnabled");
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}
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}
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*/
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/*
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/*
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static uint8_t FlashRead(uint8_t *address, uint16_t len) {
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static uint8_t FlashRead(uint8_t *address, uint16_t len) {
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FlashSend(READDATA);
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FlashSend(READDATA);
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@ -168,39 +200,49 @@ static uint8_t FlashRead(uint8_t *address, uint16_t len) {
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uint8_t Flash_ReadID(void) {
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uint8_t Flash_ReadID(void) {
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// if (!Flash_NOTBUSY())
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// return true;
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// Manufacture ID / device ID
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// Manufacture ID / device ID
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uint8_t t0 = FlashSend(ID);
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uint8_t t0 = FlashSend(ID);
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uint8_t t1 = FlashSend(0x00);
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uint8_t t1 = FlashSend(0x00);
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uint8_t t2 = FlashSend(0x00);
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uint8_t t2 = FlashSend(0x00);
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uint8_t t3 = FlashSend(0x00);
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uint8_t t3 = FlashSend(0x00);
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uint8_t man_id = MISO_VALUE;
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uint8_t man_id = FlashSend(0xFF);
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uint8_t dev_id = MISO_VALUE;
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uint8_t dev_id = 0; // FlashSend(0xff);
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Dbprintf(" [%02x] %02x %02x %02x | %02x %02x", t0,t1,t2,t3, man_id, dev_id);
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Dbprintf(" [%02x] %02x %02x %02x | %02x %02x", t0,t1,t2,t3, man_id, dev_id);
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//WINBOND_MANID
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//WINBOND_MANID
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if ( man_id == WINBOND_MANID ) {
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if ( man_id == WINBOND_MANID ) {
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Dbprintf("Correct read of Manucaturer ID [%02x] == %02x", man_id, WINBOND_MANID);
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Dbprintf("Correct read of Manucaturer ID [%02x] == %02x", man_id, WINBOND_MANID);
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}
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}
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if ( dev_id > 0) {
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// if ( dev_id > 0) {
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Dbprintf("Got a device ID [%02x] == %02x ( 0x11 0x30 0x12", dev_id, WINBOND_DEVID);
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// Dbprintf("Got a device ID [%02x] == %02x ( 0x11 0x30 0x12", dev_id, WINBOND_DEVID);
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}
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// }
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uint8_t foo[8];
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// NCS_1_HIGH;
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// Read unique ID number UNIQUE_ID (0x4B)
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return man_id;
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FlashSend(UNIQUE_ID);
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}
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FlashSend(0x00);
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bool FlashInit(void) {
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FlashSend(0x00);
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FlashSend(0x00);
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FlashSend(0x00);
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for (int i = 0; i< sizeof(foo); i++) {
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foo[i] = MISO_VALUE;
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}
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NCS_2_HIGH;
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StartTicks();
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return 0;
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LED_A_ON();
|
||||||
|
FlashSetup();
|
||||||
|
|
||||||
|
if (!Flash_NOTBUSY())
|
||||||
|
return false;
|
||||||
|
|
||||||
|
// FlashSend(ENABLE_RESET);
|
||||||
|
// NCS_1_HIGH;
|
||||||
|
// FlashSend(RESET);
|
||||||
|
// NCS_1_HIGH;
|
||||||
|
// WaitUS(10);
|
||||||
|
|
||||||
|
Dbprintf("FlashInit");
|
||||||
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
void EXFLASH_TEST(void) {
|
void EXFLASH_TEST(void) {
|
||||||
|
@ -208,9 +250,9 @@ void EXFLASH_TEST(void) {
|
||||||
//uint8_t b[3] = {0x00,0x01,0x02};
|
//uint8_t b[3] = {0x00,0x01,0x02};
|
||||||
//uint8_t d = 0;
|
//uint8_t d = 0;
|
||||||
|
|
||||||
FlashInit();
|
if (!FlashInit()) return;
|
||||||
|
|
||||||
FlashWrite_Enable();
|
//FlashWrite_Enable();
|
||||||
|
|
||||||
Flash_ReadID();
|
Flash_ReadID();
|
||||||
|
|
||||||
|
@ -223,12 +265,12 @@ void EXFLASH_TEST(void) {
|
||||||
FlashStop();
|
FlashStop();
|
||||||
cmd_send(CMD_ACK, 1, 0, 0, 0,0);
|
cmd_send(CMD_ACK, 1, 0, 0, 0,0);
|
||||||
}
|
}
|
||||||
|
/*
|
||||||
// IO spi write or read
|
// IO spi write or read
|
||||||
uint8_t EXFLASH_spi_write_read(uint8_t wData) {
|
uint8_t EXFLASH_spi_write_read(uint8_t wData) {
|
||||||
uint8_t tmp = 0;
|
uint8_t tmp = 0;
|
||||||
SCK_LOW;
|
SCK_LOW;
|
||||||
NCS_2_LOW;
|
LOW(GPIO_NCS2);
|
||||||
|
|
||||||
for (uint8_t i = 0; i < 8; i++) {
|
for (uint8_t i = 0; i < 8; i++) {
|
||||||
SCK_LOW;
|
SCK_LOW;
|
||||||
|
@ -249,40 +291,14 @@ uint8_t EXFLASH_spi_write_read(uint8_t wData) {
|
||||||
return tmp;
|
return tmp;
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t EXFLASH_readStat1(void) {
|
|
||||||
uint8_t stat1 = 3;
|
|
||||||
EXFLASH_spi_write_read(READSTAT1);
|
|
||||||
stat1 = EXFLASH_spi_write_read(0xFF);
|
|
||||||
NCS_2_HIGH;
|
|
||||||
return stat1;
|
|
||||||
}
|
|
||||||
|
|
||||||
uint8_t EXFLASH_readStat2(void) {
|
|
||||||
uint8_t stat2;
|
|
||||||
EXFLASH_spi_write_read(READSTAT2);
|
|
||||||
stat2 = EXFLASH_spi_write_read(0xFF);
|
|
||||||
NCS_2_HIGH;
|
|
||||||
return stat2;
|
|
||||||
}
|
|
||||||
|
|
||||||
bool EXFLASH_NOTBUSY(void) {
|
|
||||||
uint8_t state, count = 0;
|
|
||||||
do {
|
|
||||||
state = EXFLASH_readStat1();
|
|
||||||
if (count > 100) {
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
count++;
|
|
||||||
} while (state & BUSY);
|
|
||||||
return true;
|
|
||||||
}
|
|
||||||
|
|
||||||
void EXFLASH_Write_Enable(void) {
|
void EXFLASH_Write_Enable(void) {
|
||||||
EXFLASH_spi_write_read(WRITEENABLE);
|
EXFLASH_spi_write_read(WRITEENABLE);
|
||||||
NCS_2_HIGH;
|
HIGH(GPIO_NCS2);
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t EXFLASH_Read(uint8_t *address, uint16_t len) {
|
uint8_t EXFLASH_Read(uint8_t *address, uint16_t len) {
|
||||||
|
|
||||||
if (!EXFLASH_NOTBUSY())
|
if (!EXFLASH_NOTBUSY())
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
|
@ -293,7 +309,7 @@ uint8_t EXFLASH_Read(uint8_t *address, uint16_t len) {
|
||||||
EXFLASH_spi_write_read(address[i]);
|
EXFLASH_spi_write_read(address[i]);
|
||||||
}
|
}
|
||||||
tmp = EXFLASH_spi_write_read(0XFF);
|
tmp = EXFLASH_spi_write_read(0XFF);
|
||||||
NCS_2_HIGH;
|
HIGH(GPIO_NCS2);
|
||||||
return tmp;
|
return tmp;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -319,7 +335,7 @@ uint8_t EXFLASH_Program(uint8_t address[], uint8_t *array, uint8_t len) {
|
||||||
EXFLASH_spi_write_read(array[i]);
|
EXFLASH_spi_write_read(array[i]);
|
||||||
}
|
}
|
||||||
|
|
||||||
NCS_2_HIGH;
|
HIGH(GPIO_NCS2);
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -336,7 +352,7 @@ uint8_t EXFLASH_ReadID(void) {
|
||||||
ManID = EXFLASH_spi_write_read(0xff);
|
ManID = EXFLASH_spi_write_read(0xff);
|
||||||
// DevID = EXFLASH_spi_write_read(0xff);
|
// DevID = EXFLASH_spi_write_read(0xff);
|
||||||
|
|
||||||
NCS_2_HIGH;
|
HIGH(GPIO_NCS2);
|
||||||
return ManID;
|
return ManID;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -354,35 +370,10 @@ bool EXFLASH_Erase(void) {
|
||||||
} while ((state1 & WRTEN) != WRTEN);
|
} while ((state1 & WRTEN) != WRTEN);
|
||||||
|
|
||||||
EXFLASH_spi_write_read(CHIPERASE);
|
EXFLASH_spi_write_read(CHIPERASE);
|
||||||
NCS_2_HIGH;
|
HIGH(GPIO_NCS2);
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
*/
|
||||||
bool EXFLASH_Reset(void) {
|
|
||||||
LED_A_ON();
|
|
||||||
SetupSpi(SPI_MEM_MODE);
|
|
||||||
|
|
||||||
NCS_2_LOW;
|
|
||||||
|
|
||||||
if (!EXFLASH_NOTBUSY()) {
|
|
||||||
LED_A_OFF();
|
|
||||||
Dbprintf("[!] init reset failed");
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
|
|
||||||
EXFLASH_spi_write_read(ENABLE_RESET);
|
|
||||||
NCS_2_HIGH;
|
|
||||||
EXFLASH_spi_write_read(RESET);
|
|
||||||
NCS_2_HIGH;
|
|
||||||
SpinDelayUs(10);
|
|
||||||
LED_A_OFF();
|
|
||||||
return true;
|
|
||||||
}
|
|
||||||
|
|
||||||
void EXFLASH_Init(void) {
|
|
||||||
EXFLASH_Reset();
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
void EXFLASH_TEST(void) {
|
void EXFLASH_TEST(void) {
|
||||||
uint8_t a[3] = {0x00,0x00,0x00};
|
uint8_t a[3] = {0x00,0x00,0x00};
|
||||||
|
|
|
@ -83,27 +83,6 @@
|
||||||
#define lengthOf(x) (sizeof(x))/sizeof(byte)
|
#define lengthOf(x) (sizeof(x))/sizeof(byte)
|
||||||
#define maxAddress capacity
|
#define maxAddress capacity
|
||||||
|
|
||||||
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
|
|
||||||
// Arduino Due DMA definitions //
|
|
||||||
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
|
|
||||||
// Use SAM3X DMAC if nonzero
|
|
||||||
#define USE_SAM3X_DMAC 1
|
|
||||||
// Use extra Bus Matrix arbitration fix if nonzero
|
|
||||||
#define USE_SAM3X_BUS_MATRIX_FIX 0
|
|
||||||
// Time in ms for DMA receive timeout
|
|
||||||
#define SAM3X_DMA_TIMEOUT 100
|
|
||||||
// chip select register number
|
|
||||||
#define SPI_CHIP_SEL 3
|
|
||||||
// DMAC receive channel
|
|
||||||
#define SPI_DMAC_RX_CH 1
|
|
||||||
// DMAC transmit channel
|
|
||||||
#define SPI_DMAC_TX_CH 0
|
|
||||||
// DMAC Channel HW Interface Number for SPI TX.
|
|
||||||
#define SPI_TX_IDX 1
|
|
||||||
// DMAC Channel HW Interface Number for SPI RX.
|
|
||||||
#define SPI_RX_IDX 2
|
|
||||||
// Set DUE SPI clock div (any integer from 2 - 255)
|
|
||||||
#define DUE_SPI_CLK 2
|
|
||||||
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
|
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
|
||||||
// List of Error codes //
|
// List of Error codes //
|
||||||
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
|
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
|
||||||
|
@ -119,20 +98,16 @@
|
||||||
#define NOSUSPEND 0x09
|
#define NOSUSPEND 0x09
|
||||||
#define UNKNOWNERROR 0xFF
|
#define UNKNOWNERROR 0xFF
|
||||||
|
|
||||||
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
|
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
|
||||||
|
extern void Dbprintf(const char *fmt, ...);
|
||||||
|
|
||||||
uint8_t EXFLASH_spi_write_read(uint8_t wData);
|
void FlashSetup(void);
|
||||||
uint8_t EXFLASH_readStat1(void) ;
|
void FlashStop(void);
|
||||||
uint8_t EXFLASH_readStat2(void) ;
|
bool Flash_NOTBUSY(void);
|
||||||
bool EXFLASH_NOTBUSY(void);
|
uint8_t Flash_ReadStat1(void);
|
||||||
void EXFLASH_Write_Enable(void) ;
|
uint8_t Flash_ReadStat2(void);
|
||||||
uint8_t EXFLASH_Read(uint8_t *address, uint16_t len);
|
uint16_t FlashSend(uint16_t data);
|
||||||
uint8_t EXFLASH_Program(uint8_t address[], uint8_t *array, uint8_t len) ;
|
bool FlashInit();
|
||||||
|
void EXFLASH_TEST(void);
|
||||||
uint8_t EXFLASH_ReadID(void) ;
|
|
||||||
bool EXFLASH_Erase(void) ;
|
|
||||||
bool EXFLASH_Reset(void);
|
|
||||||
void EXFLASH_Init(void);
|
|
||||||
void EXFLASH_TEST(void);
|
|
||||||
|
|
||||||
#endif
|
#endif
|
|
@ -20,8 +20,9 @@
|
||||||
#define GPIO_LED_B AT91C_PIO_PA8
|
#define GPIO_LED_B AT91C_PIO_PA8
|
||||||
#define GPIO_LED_C AT91C_PIO_PA9
|
#define GPIO_LED_C AT91C_PIO_PA9
|
||||||
|
|
||||||
//#define GPIO_NCS2 AT91C_PA10_NPCS2
|
// flashmem hooked on PA10
|
||||||
#define GPIO_NCS2 AT91C_PIO_PA1
|
//#define GPIO_NCS2 AT91C_PIO_PA1
|
||||||
|
#define GPIO_NCS2 AT91C_PA10_NPCS2
|
||||||
#define GPIO_NCS0 AT91C_PA11_NPCS0
|
#define GPIO_NCS0 AT91C_PA11_NPCS0
|
||||||
|
|
||||||
#define GPIO_MISO AT91C_PA12_MISO
|
#define GPIO_MISO AT91C_PA12_MISO
|
||||||
|
|
|
@ -93,9 +93,10 @@
|
||||||
// fpga
|
// fpga
|
||||||
#define NCS_0_LOW LOW(GPIO_NCS0)
|
#define NCS_0_LOW LOW(GPIO_NCS0)
|
||||||
#define NCS_0_HIGH HIGH(GPIO_NCS0)
|
#define NCS_0_HIGH HIGH(GPIO_NCS0)
|
||||||
// lcd - flash mem
|
|
||||||
#define NCS_2_LOW LOW(GPIO_NCS2)
|
// flash mem PA1
|
||||||
#define NCS_2_HIGH HIGH(GPIO_NCS2)
|
#define NCS_1_LOW LOW(GPIO_NCS2)
|
||||||
|
#define NCS_1_HIGH HIGH(GPIO_NCS2)
|
||||||
|
|
||||||
|
|
||||||
#define RELAY_ON() HIGH(GPIO_RELAY)
|
#define RELAY_ON() HIGH(GPIO_RELAY)
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue