make style

This commit is contained in:
merlokk 2021-08-25 14:44:06 +03:00
commit d46d23d079
18 changed files with 3972 additions and 4091 deletions

View file

@ -19,11 +19,11 @@ void hf_field_off(void);
int tearoff_hook(void);
#if defined RDV4 || defined ICOPYX
// ADC Vref = 3300mV, and an (10000k+240k):240k voltage divider on the LF input can measure voltages up to 140800 mV
#define MAX_ADC_HF_VOLTAGE 140800
// ADC Vref = 3300mV, and an (10000k+240k):240k voltage divider on the LF input can measure voltages up to 140800 mV
#define MAX_ADC_HF_VOLTAGE 140800
#else
// ADC Vref = 3300mV, and an (10M+1M):1M voltage divider on the HF input can measure voltages up to 36300 mV
#define MAX_ADC_HF_VOLTAGE 36300
// ADC Vref = 3300mV, and an (10M+1M):1M voltage divider on the HF input can measure voltages up to 36300 mV
#define MAX_ADC_HF_VOLTAGE 36300
#endif
// ADC Vref = 3300mV, (240k-10M):240k voltage divider, 140800 mV
#define MAX_ADC_LF_VOLTAGE 140800

View file

@ -444,8 +444,7 @@ static bool FpgaConfCurrentMode(int bitstream_version) {
if (bitstream_version == FPGA_BITSTREAM_LF) {
LOW(GPIO_FPGA_SWITCH);
}
else {
} else {
HIGH(GPIO_FPGA_SWITCH);
}
// update downloaded_bitstream