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18 changed files with 3972 additions and 4091 deletions
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@ -19,11 +19,11 @@ void hf_field_off(void);
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int tearoff_hook(void);
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#if defined RDV4 || defined ICOPYX
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// ADC Vref = 3300mV, and an (10000k+240k):240k voltage divider on the LF input can measure voltages up to 140800 mV
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#define MAX_ADC_HF_VOLTAGE 140800
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// ADC Vref = 3300mV, and an (10000k+240k):240k voltage divider on the LF input can measure voltages up to 140800 mV
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#define MAX_ADC_HF_VOLTAGE 140800
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#else
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// ADC Vref = 3300mV, and an (10M+1M):1M voltage divider on the HF input can measure voltages up to 36300 mV
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#define MAX_ADC_HF_VOLTAGE 36300
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// ADC Vref = 3300mV, and an (10M+1M):1M voltage divider on the HF input can measure voltages up to 36300 mV
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#define MAX_ADC_HF_VOLTAGE 36300
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#endif
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// ADC Vref = 3300mV, (240k-10M):240k voltage divider, 140800 mV
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#define MAX_ADC_LF_VOLTAGE 140800
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@ -444,8 +444,7 @@ static bool FpgaConfCurrentMode(int bitstream_version) {
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if (bitstream_version == FPGA_BITSTREAM_LF) {
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LOW(GPIO_FPGA_SWITCH);
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}
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else {
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} else {
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HIGH(GPIO_FPGA_SWITCH);
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}
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// update downloaded_bitstream
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