mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-14 18:48:13 -07:00
summer restructuring:
* .h include only the strict minimum for their own parsing * this forces all files to include explicitment their needs and not count on far streched dependencies * this helps Makefile to rebuild only the minimum * according to this rule, most standalone .h are now gone * big app.h is gone * remove seldom __cplusplus, if c++ happens, everything will have to be done properly anyway * all unrequired include were removed * split common/ into common/ (client+arm) and common_arm/ (os+bootloader) * bring zlib to common/ * bring stuff not really/not yet used in common back to armsrc/ or client/ * bring liblua into client/ * bring uart into client/ * move some portions of code around (dbprint, protocols,...) * rename unused files into *_disabled.[ch] to make it explicit * rename soft Uarts between 14a, 14b and iclass, so a standalone could use several without clash * remove PrintAndLogDevice * move deprecated-hid-flasher from client to tools * Makefiles * treat deps in armsrc/ as in client/ * client: stop on warning (-Werror), same as for armsrc/ Tested on: * all standalone modes * Linux
This commit is contained in:
parent
b7d412d27b
commit
d19754567d
447 changed files with 2553 additions and 2599 deletions
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@ -11,6 +11,21 @@
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//-----------------------------------------------------------------------------
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#include "iso14443a.h"
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#include "string.h"
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#include "proxmark3_arm.h"
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#include "cmd.h"
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#include "appmain.h"
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#include "BigBuf.h"
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#include "fpgaloader.h"
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#include "ticks.h"
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#include "dbprint.h"
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#include "util.h"
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#include "parity.h"
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#include "mifareutil.h"
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#include "commonutil.h"
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#include "crc16.h"
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#include "protocols.h"
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#define MAX_ISO14A_TIMEOUT 524288
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static uint32_t iso14a_timeout;
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// if iso14443a not active - transmit/receive dont try to execute
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@ -161,7 +176,7 @@ void GetParity(const uint8_t *pbtCmd, uint16_t len, uint8_t *par) {
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// Note 1: the bitstream may start at any time. We therefore need to sync.
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// Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
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//-----------------------------------------------------------------------------
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static tUart Uart;
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static tUart14a Uart;
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// Lookup-Table to decide if 4 raw bits are a modulation.
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// We accept the following:
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@ -176,12 +191,12 @@ const bool Mod_Miller_LUT[] = {
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#define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4])
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#define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)])
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tUart *GetUart() {
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tUart14a *GetUart14a() {
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return &Uart;
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}
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void UartReset(void) {
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Uart.state = STATE_UNSYNCD;
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void Uart14aReset(void) {
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Uart.state = STATE_14A_UNSYNCD;
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Uart.bitCount = 0;
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Uart.len = 0; // number of decoded data bytes
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Uart.parityLen = 0; // number of decoded parity bytes
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@ -194,17 +209,17 @@ void UartReset(void) {
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Uart.syncBit = 9999;
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}
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void UartInit(uint8_t *data, uint8_t *par) {
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void Uart14aInit(uint8_t *data, uint8_t *par) {
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Uart.output = data;
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Uart.parity = par;
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UartReset();
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Uart14aReset();
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}
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// use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
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RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time) {
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Uart.fourBits = (Uart.fourBits << 8) | bit;
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if (Uart.state == STATE_UNSYNCD) { // not yet synced
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if (Uart.state == STATE_14A_UNSYNCD) { // not yet synced
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Uart.syncBit = 9999; // not set
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// 00x11111 2|3 ticks pause followed by 6|5 ticks unmodulated Sequence Z (a "0" or "start of communication")
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@ -230,20 +245,20 @@ RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time) {
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Uart.startTime = non_real_time ? non_real_time : (GetCountSspClk() & 0xfffffff8);
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Uart.startTime -= Uart.syncBit;
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Uart.endTime = Uart.startTime;
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Uart.state = STATE_START_OF_COMMUNICATION;
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Uart.state = STATE_14A_START_OF_COMMUNICATION;
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}
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} else {
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if (IsMillerModulationNibble1(Uart.fourBits >> Uart.syncBit)) {
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if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation in both halves - error
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UartReset();
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Uart14aReset();
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} else { // Modulation in first half = Sequence Z = logic "0"
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if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
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UartReset();
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if (Uart.state == STATE_14A_MILLER_X) { // error - must not follow after X
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Uart14aReset();
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} else {
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Uart.bitCount++;
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Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
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Uart.state = STATE_MILLER_Z;
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Uart.state = STATE_14A_MILLER_Z;
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Uart.endTime = Uart.startTime + 8 * (9 * Uart.len + Uart.bitCount + 1) - 6;
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if (Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
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Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
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if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1"
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Uart.bitCount++;
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Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
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Uart.state = STATE_MILLER_X;
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Uart.state = STATE_14A_MILLER_X;
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Uart.endTime = Uart.startTime + 8 * (9 * Uart.len + Uart.bitCount + 1) - 2;
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if (Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
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Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
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@ -276,8 +291,8 @@ RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time) {
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}
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}
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} else { // no modulation in both halves - Sequence Y
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if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
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Uart.state = STATE_UNSYNCD;
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if (Uart.state == STATE_14A_MILLER_Z || Uart.state == STATE_14A_MILLER_Y) { // Y after logic "0" - End of Communication
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Uart.state = STATE_14A_UNSYNCD;
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Uart.bitCount--; // last "0" was part of EOC sequence
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Uart.shiftReg <<= 1; // drop it
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if (Uart.bitCount > 0) { // if we decoded some bits
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if (Uart.len) {
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return true; // we are finished with decoding the raw data sequence
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} else {
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UartReset(); // Nothing received - start over
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Uart14aReset(); // Nothing received - start over
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}
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}
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if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
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UartReset();
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if (Uart.state == STATE_14A_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
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Uart14aReset();
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} else { // a logic "0"
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Uart.bitCount++;
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Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
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Uart.state = STATE_MILLER_Y;
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Uart.state = STATE_14A_MILLER_Y;
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if (Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
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Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
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Uart.parityBits <<= 1; // make room for the parity bit
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// 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
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// Note 1: the bitstream may start at any time. We therefore need to sync.
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// Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
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tDemod Demod;
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tDemod14a Demod;
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// Lookup-Table to decide if 4 raw bits are a modulation.
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// We accept three or four "1" in any position
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#define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
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#define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
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tDemod *GetDemod() {
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tDemod14a *GetDemod14a() {
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return &Demod;
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}
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void DemodReset(void) {
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Demod.state = DEMOD_UNSYNCD;
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void Demod14aReset(void) {
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Demod.state = DEMOD_14A_UNSYNCD;
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Demod.len = 0; // number of decoded data bytes
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Demod.parityLen = 0;
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Demod.shiftReg = 0; // shiftreg to hold decoded data bits
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Demod.samples = 0;
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}
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void DemodInit(uint8_t *data, uint8_t *par) {
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void Demod14aInit(uint8_t *data, uint8_t *par) {
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Demod.output = data;
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Demod.parity = par;
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DemodReset();
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Demod14aReset();
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}
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// use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
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RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time) {
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Demod.twoBits = (Demod.twoBits << 8) | bit;
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if (Demod.state == DEMOD_UNSYNCD) {
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if (Demod.state == DEMOD_14A_UNSYNCD) {
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if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
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if (Demod.twoBits == 0x0000) {
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Demod.startTime = non_real_time ? non_real_time : (GetCountSspClk() & 0xfffffff8);
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Demod.startTime -= Demod.syncBit;
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Demod.bitCount = offset; // number of decoded data bits
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Demod.state = DEMOD_MANCHESTER_DATA;
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Demod.state = DEMOD_14A_MANCHESTER_DATA;
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}
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}
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} else {
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if (Demod.len) {
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return true; // we are finished with decoding the raw data sequence
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} else { // nothing received. Start over
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DemodReset();
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Demod14aReset();
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}
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}
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}
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RAMFUNC int ManchesterDecoding_Thinfilm(uint8_t bit) {
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Demod.twoBits = (Demod.twoBits << 8) | bit;
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if (Demod.state == DEMOD_UNSYNCD) {
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if (Demod.state == DEMOD_14A_UNSYNCD) {
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if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
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if (Demod.twoBits == 0x0000) {
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Demod.startTime -= Demod.syncBit;
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Demod.bitCount = 1; // number of decoded data bits
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Demod.shiftReg = 1;
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Demod.state = DEMOD_MANCHESTER_DATA;
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Demod.state = DEMOD_14A_MANCHESTER_DATA;
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}
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}
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} else {
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if (Demod.len) {
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return true; // we are finished with decoding the raw data sequence
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} else { // nothing received. Start over
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DemodReset();
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Demod14aReset();
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}
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}
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}
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bool ReaderIsActive = false;
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// Set up the demodulator for tag -> reader responses.
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DemodInit(receivedResp, receivedRespPar);
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Demod14aInit(receivedResp, receivedRespPar);
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// Set up the demodulator for the reader -> tag commands
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UartInit(receivedCmd, receivedCmdPar);
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Uart14aInit(receivedCmd, receivedCmdPar);
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DbpString("Starting to sniff");
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true)) break;
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}
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/* ready to receive another command. */
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UartReset();
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Uart14aReset();
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/* reset the demod code, which might have been */
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/* false-triggered by the commands from the reader. */
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DemodReset();
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Demod14aReset();
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LED_B_OFF();
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}
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ReaderIsActive = (Uart.state != STATE_UNSYNCD);
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ReaderIsActive = (Uart.state != STATE_14A_UNSYNCD);
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}
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// no need to try decoding tag data if the reader is sending - and we cannot afford the time
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if ((!triggered) && (param & 0x01)) triggered = true;
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// ready to receive another response.
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DemodReset();
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Demod14aReset();
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// reset the Miller decoder including its (now outdated) input buffer
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UartReset();
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//UartInit(receivedCmd, receivedCmdPar);
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Uart14aReset();
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//Uart14aInit(receivedCmd, receivedCmdPar);
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LED_C_OFF();
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}
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TagIsActive = (Demod.state != DEMOD_UNSYNCD);
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TagIsActive = (Demod.state != DEMOD_14A_UNSYNCD);
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}
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}
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
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// Now run a `software UART` on the stream of incoming samples.
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UartInit(received, par);
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Uart14aInit(received, par);
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// clear RXRDY:
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uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
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// Now run a 'software UART' on the stream of incoming samples.
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UartInit(received, par);
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Uart14aInit(received, par);
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// Clear RXRDY:
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uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
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// Now get the answer from the card
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DemodInit(receivedResponse, NULL);
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Demod14aInit(receivedResponse, NULL);
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// clear RXRDY:
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uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
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// Now get the answer from the card
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DemodInit(receivedResponse, receivedResponsePar);
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Demod14aInit(receivedResponse, receivedResponsePar);
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// clear RXRDY:
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uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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if (ManchesterDecoding(b, offset, 0)) {
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NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER) / 16 + FRAME_DELAY_TIME_PICC_TO_PCD);
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return true;
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} else if (c++ > timeout && Demod.state == DEMOD_UNSYNCD) {
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} else if (c++ > timeout && Demod.state == DEMOD_14A_UNSYNCD) {
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return false;
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}
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}
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@ -2499,8 +2514,8 @@ void iso14443a_setup(uint8_t fpga_minor_mode) {
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StartCountSspClk();
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// Prepare the demodulation functions
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DemodReset();
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UartReset();
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Demod14aReset();
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Uart14aReset();
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NextTransferTime = 2 * DELAY_ARM2AIR_AS_READER;
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iso14a_set_timeout(1060); // 106 * 10ms default
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Reference in a new issue