github/RRG-Proxmark3
1
0
Fork 0
mirror of https://github.com/RfidResearchGroup/proxmark3.git synced 2025-08-14 10:37:23 -07:00
Code Issues Projects Releases Packages Wiki Activity Actions

Unified hitag naming style

Browse source
This commit is contained in:
douniwan5788 2024-08-21 16:32:30 +08:00
commit d15537bbf1
10 changed files with 52 additions and 51 deletions
Download patch file Download diff file Expand all files Collapse all files

2
armsrc/fpgaloader.h
View file

@ -63,7 +63,7 @@
000 FPGA_MAJOR_MODE_LF_READER = Act as LF reader (modulate)
001 FPGA_MAJOR_MODE_LF_EDGE_DETECT = Simulate LF
010 FPGA_MAJOR_MODE_LF_PASSTHRU = Passthrough mode, CROSS_LO line connected to SSP_DIN. SSP_DOUT logic level controls if we modulate / listening
011 FPGA_MAJOR_MODE_LF_ADC = refactor hitag2, clear ADC sampling
011 FPGA_MAJOR_MODE_LF_ADC = refactor hitag 2, clear ADC sampling
111 FPGA_MAJOR_MODE_OFF = turn off sampling.
Each one of this major modes can have options. Currently these two major modes uses options.