mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-21 05:43:48 -07:00
fpga 14b merge p.N
This commit is contained in:
parent
d2a66cecba
commit
ce981d9124
1 changed files with 159 additions and 163 deletions
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@ -138,9 +138,9 @@ static uint32_t iso14b_timeout = TR0;
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// them yet, just leaves them ready to send in ToSend[].
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// them yet, just leaves them ready to send in ToSend[].
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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static void CodeIso14443bAsTag(const uint8_t *cmd, int len) {
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static void CodeIso14443bAsTag(const uint8_t *cmd, int len) {
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int i;
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int i;
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tosend_reset();
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tosend_reset();
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// Transmit a burst of ones, as the initial thing that lets the
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// Transmit a burst of ones, as the initial thing that lets the
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// reader get phase sync.
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// reader get phase sync.
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@ -152,56 +152,56 @@ static void CodeIso14443bAsTag(const uint8_t *cmd, int len) {
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// Send TR1.
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// Send TR1.
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// 10-11 ETU * 4times samples ONES
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// 10-11 ETU * 4times samples ONES
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for (i = 0; i < 20; i++) {
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for (i = 0; i < 20; i++) {
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SEND4STUFFBIT(1);
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SEND4STUFFBIT(1);
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}
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}
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// Send SOF.
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// Send SOF.
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// 10-11 ETU * 4times samples ZEROS
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// 10-11 ETU * 4times samples ZEROS
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for (i = 0; i < 10; i++) {
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for (i = 0; i < 10; i++) {
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SEND4STUFFBIT(0);
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SEND4STUFFBIT(0);
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}
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}
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// 2-3 ETU * 4times samples ONES
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// 2-3 ETU * 4times samples ONES
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for (i = 0; i < 2; i++) {
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for (i = 0; i < 2; i++) {
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SEND4STUFFBIT(1);
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SEND4STUFFBIT(1);
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}
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}
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// data
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// data
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for (i = 0; i < len; i++) {
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for (i = 0; i < len; i++) {
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// Start bit
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// Start bit
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SEND4STUFFBIT(0);
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SEND4STUFFBIT(0);
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// Data bits
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// Data bits
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uint8_t b = cmd[i];
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uint8_t b = cmd[i];
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for (int j = 0; j < 8; j++) {
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for (int j = 0; j < 8; j++) {
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SEND4STUFFBIT(b & 1);
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SEND4STUFFBIT(b & 1);
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b >>= 1;
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b >>= 1;
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}
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}
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// Stop bit
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// Stop bit
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SEND4STUFFBIT(1);
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SEND4STUFFBIT(1);
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// Extra Guard bit
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// Extra Guard bit
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// For PICC it ranges 0-18us (1etu = 9us)
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// For PICC it ranges 0-18us (1etu = 9us)
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//SEND4STUFFBIT(1);
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//SEND4STUFFBIT(1);
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}
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}
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// Send EOF.
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// Send EOF.
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// 10-11 ETU * 4 sample rate = ZEROS
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// 10-11 ETU * 4 sample rate = ZEROS
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for(i = 0; i < 10; i++) {
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for(i = 0; i < 10; i++) {
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SEND4STUFFBIT(0);
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SEND4STUFFBIT(0);
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}
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}
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// why this?
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// why this?
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for(i = 0; i < 2; i++) {
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for(i = 0; i < 2; i++) {
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SEND4STUFFBIT(1);
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SEND4STUFFBIT(1);
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}
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}
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tosend_t *ts = get_tosend();
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tosend_t *ts = get_tosend();
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// Convert from last byte pos to length
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// Convert from last byte pos to length
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ts->max++;
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ts->max++;
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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@ -451,10 +451,10 @@ static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len) {
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while (BUTTON_PRESS() == false) {
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while (BUTTON_PRESS() == false) {
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WDT_HIT();
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WDT_HIT();
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if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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for (uint8_t mask = 0x80; mask != 0x00; mask >>= 1) {
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for (uint8_t mask = 0x80; mask != 0x00; mask >>= 1) {
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if (Handle14443bReaderUartBit(b & mask)) {
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if (Handle14443bReaderUartBit(b & mask)) {
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*len = Uart.byteCnt;
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*len = Uart.byteCnt;
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return true;
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return true;
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}
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}
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@ -497,13 +497,13 @@ static void TransmitFor14443b_AsTag(uint8_t *response, uint16_t len) {
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void SimulateIso14443bTag(uint32_t pupi) {
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void SimulateIso14443bTag(uint32_t pupi) {
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LED_A_ON();
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LED_A_ON();
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// the only commands we understand is WUPB, AFI=0, Select All, N=1:
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// the only commands we understand is WUPB, AFI=0, Select All, N=1:
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// static const uint8_t cmdWUPB[] = { ISO14443B_REQB, 0x00, 0x08, 0x39, 0x73 }; // WUPB
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// static const uint8_t cmdWUPB[] = { ISO14443B_REQB, 0x00, 0x08, 0x39, 0x73 }; // WUPB
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// ... and REQB, AFI=0, Normal Request, N=1:
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// ... and REQB, AFI=0, Normal Request, N=1:
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// static const uint8_t cmdREQB[] = { ISO14443B_REQB, 0x00, 0x00, 0x71, 0xFF }; // REQB
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// static const uint8_t cmdREQB[] = { ISO14443B_REQB, 0x00, 0x00, 0x71, 0xFF }; // REQB
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// ... and HLTB
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// ... and HLTB
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// static const uint8_t cmdHLTB[] = { 0x50, 0xff, 0xff, 0xff, 0xff }; // HLTB
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// static const uint8_t cmdHLTB[] = { 0x50, 0xff, 0xff, 0xff, 0xff }; // HLTB
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// ... and ATTRIB
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// ... and ATTRIB
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// static const uint8_t cmdATTRIB[] = { ISO14443B_ATTRIB, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; // ATTRIB
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// static const uint8_t cmdATTRIB[] = { ISO14443B_ATTRIB, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; // ATTRIB
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// ... if not PUPI/UID is supplied we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922,
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// ... if not PUPI/UID is supplied we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922,
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@ -532,7 +532,7 @@ void SimulateIso14443bTag(uint32_t pupi) {
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// connect Demodulated Signal to ADC:
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// connect Demodulated Signal to ADC:
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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// Set up the synchronous serial port
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// Set up the synchronous serial port
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FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
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FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
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// allocate command receive buffer
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// allocate command receive buffer
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@ -720,10 +720,7 @@ static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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} \
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} \
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}
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}
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// Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by abs(ci) + abs(cq)
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#define SUBCARRIER_DETECT_THRESHOLD 8
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// Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq)))
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#define SUBCARRIER_DETECT_THRESHOLD 8
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//note: couldn't we just use MAX(ABS(ci),ABS(cq)) + (MIN(ABS(ci),ABS(cq))/2) from common.h - marshmellow
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//note: couldn't we just use MAX(ABS(ci),ABS(cq)) + (MIN(ABS(ci),ABS(cq))/2) from common.h - marshmellow
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#define CHECK_FOR_SUBCARRIER(void) { v = MAX(myI, myQ) + (MIN(myI, myQ) >> 1); }
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#define CHECK_FOR_SUBCARRIER(void) { v = MAX(myI, myQ) + (MIN(myI, myQ) >> 1); }
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@ -773,8 +770,8 @@ static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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} else {
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} else {
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// maximum length of TR1 = 200 1/fs
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// maximum length of TR1 = 200 1/fs
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if (Demod.posCount > 200 / 4){
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if (Demod.posCount > 200 / 4){
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Demod.state = DEMOD_UNSYNCD;
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Demod.state = DEMOD_UNSYNCD;
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}
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}
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}
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}
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Demod.posCount++;
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Demod.posCount++;
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break;
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break;
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@ -792,7 +789,7 @@ static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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LED_C_ON(); // Got SOF
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LED_C_ON(); // Got SOF
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Demod.state = DEMOD_AWAITING_START_BIT;
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Demod.state = DEMOD_AWAITING_START_BIT;
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Demod.posCount = 0;
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Demod.posCount = 0;
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Demod.bitCount = 0;
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Demod.bitCount = 0;
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Demod.len = 0;
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Demod.len = 0;
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}
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}
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} else {
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} else {
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@ -811,12 +808,12 @@ static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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if (v > 0) {
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if (v > 0) {
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if (Demod.posCount > 6 * 2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs
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if (Demod.posCount > 6 * 2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs
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LED_C_OFF();
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LED_C_OFF();
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if (Demod.bitCount == 0 && Demod.len == 0) { // received SOF only, this is valid for iClass/Picopass
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if (Demod.bitCount == 0 && Demod.len == 0) { // received SOF only, this is valid for iClass/Picopass
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return true;
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return true;
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} else {
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} else {
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Demod.state = DEMOD_UNSYNCD;
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Demod.state = DEMOD_UNSYNCD;
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}
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}
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}
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}
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} else { // start bit detected
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} else { // start bit detected
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Demod.bitCount = 0;
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Demod.bitCount = 0;
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@ -856,8 +853,8 @@ static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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// left shift to drop the startbit
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// left shift to drop the startbit
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uint8_t b = (s >> 1);
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uint8_t b = (s >> 1);
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Demod.output[Demod.len] = b;
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Demod.output[Demod.len] = b;
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Demod.len++;
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Demod.len++;
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Demod.bitCount = 0;
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Demod.bitCount = 0;
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Demod.state = DEMOD_AWAITING_START_BIT;
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Demod.state = DEMOD_AWAITING_START_BIT;
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} else {
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} else {
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// this one is a bit hard, either its a correc byte or its unsynced.
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// this one is a bit hard, either its a correc byte or its unsynced.
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@ -883,27 +880,26 @@ static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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/*
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/*
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* Demodulate the samples we received from the tag, also log to tracebuffer
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* Demodulate the samples we received from the tag, also log to tracebuffer
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* quiet: set to 'TRUE' to disable debug output
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*/
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*/
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static int GetTagSamplesFor14443bDemod(int timeout) {
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static int GetTagSamplesFor14443bDemod(int timeout) {
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int ret = 0;
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int ret = 0;
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int maxBehindBy = 0;
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int maxBehindBy = 0;
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int lastRxCounter, samples = 0;
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int lastRxCounter, samples = 0;
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int8_t ci, cq;
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int8_t ci, cq;
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uint32_t time_0 = 0, time_stop = 0;
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uint32_t time_0 = 0, time_stop = 0;
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BigBuf_free();
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BigBuf_free();
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// The response (tag -> reader) that we're receiving.
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// The response (tag -> reader) that we're receiving.
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uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
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uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
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// The DMA buffer, used to stream samples from the FPGA
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// The DMA buffer, used to stream samples from the FPGA
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uint16_t *dmaBuf = (uint16_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE * sizeof(uint16_t));
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uint16_t *dmaBuf = (uint16_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE * sizeof(uint16_t));
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// Set up the demodulator for tag -> reader responses.
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// Set up the demodulator for tag -> reader responses.
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Demod14bInit(receivedResponse);
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Demod14bInit(receivedResponse);
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// wait for last transfer to complete
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// wait for last transfer to complete
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while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY))
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while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY))
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// Setup and start DMA.
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// Setup and start DMA.
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FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
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FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
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@ -912,60 +908,60 @@ static int GetTagSamplesFor14443bDemod(int timeout) {
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return -1;
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return -1;
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}
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}
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uint16_t *upTo = dmaBuf;
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uint16_t *upTo = dmaBuf;
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lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
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lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
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// Signal field is ON with the appropriate LED:
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// Signal field is ON with the appropriate LED:
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LED_D_ON();
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LED_D_ON();
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// And put the FPGA in the appropriate mode
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// And put the FPGA in the appropriate mode
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_848_KHZ | FPGA_HF_READER_MODE_RECEIVE_IQ);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_848_KHZ | FPGA_HF_READER_MODE_RECEIVE_IQ);
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for(;;) {
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for(;;) {
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int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO14443B_DMA_BUFFER_SIZE-1);
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int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO14443B_DMA_BUFFER_SIZE-1);
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if (behindBy > maxBehindBy) {
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if (behindBy > maxBehindBy) {
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maxBehindBy = behindBy;
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maxBehindBy = behindBy;
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}
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}
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if (behindBy < 1) continue;
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if (behindBy < 1) continue;
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ci = *upTo >> 8;
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ci = *upTo >> 8;
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cq = *upTo;
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cq = *upTo;
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upTo++;
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upTo++;
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lastRxCounter--;
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lastRxCounter--;
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if (upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
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if (upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
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upTo = dmaBuf; // start reading the circular buffer from the beginning
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upTo = dmaBuf; // start reading the circular buffer from the beginning
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lastRxCounter += ISO14443B_DMA_BUFFER_SIZE;
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lastRxCounter += ISO14443B_DMA_BUFFER_SIZE;
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}
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}
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
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AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
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AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
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AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; // DMA Next Counter registers
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AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; // DMA Next Counter registers
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}
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}
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samples++;
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samples++;
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if (Handle14443bTagSamplesDemod(ci, cq)) {
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if (Handle14443bTagSamplesDemod(ci, cq)) {
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ret = Demod.len;
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ret = Demod.len;
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break;
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break;
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}
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}
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if(samples > timeout && Demod.state < DEMOD_PHASE_REF_TRAINING) {
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if(samples > timeout && Demod.state < DEMOD_PHASE_REF_TRAINING) {
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ret = -1;
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ret = -1;
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LED_C_OFF();
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LED_C_OFF();
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break;
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break;
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}
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}
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}
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}
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FpgaDisableSscDma();
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FpgaDisableSscDma();
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if (ret < 0) {
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if (ret < 0) {
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return ret;
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return ret;
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}
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}
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if (Demod.len > 0) {
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if (Demod.len > 0) {
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LogTrace(Demod.output, Demod.len, time_0, time_stop, NULL, false);
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LogTrace(Demod.output, Demod.len, time_0, time_stop, NULL, false);
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}
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}
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return ret;
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return ret;
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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@ -973,27 +969,27 @@ static int GetTagSamplesFor14443bDemod(int timeout) {
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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static void TransmitFor14443b_AsReader(void) {
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static void TransmitFor14443b_AsReader(void) {
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|
||||||
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_SHALLOW_MOD);
|
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_SHALLOW_MOD);
|
||||||
|
|
||||||
LED_B_ON();
|
LED_B_ON();
|
||||||
tosend_t *ts = get_tosend();
|
tosend_t *ts = get_tosend();
|
||||||
|
|
||||||
for (int c = 0; c < ts->max; c++) {
|
for (int c = 0; c < ts->max; c++) {
|
||||||
uint8_t data = ts->buf[c];
|
uint8_t data = ts->buf[c];
|
||||||
for (int i = 0; i < 8; i++) {
|
for (int i = 0; i < 8; i++) {
|
||||||
uint16_t send_word = (data & 0x80) ? 0x0000 : 0xffff;
|
uint16_t send_word = (data & 0x80) ? 0x0000 : 0xffff;
|
||||||
|
|
||||||
while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
|
while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
|
||||||
|
|
||||||
AT91C_BASE_SSC->SSC_THR = send_word;
|
AT91C_BASE_SSC->SSC_THR = send_word;
|
||||||
while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
|
while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
|
||||||
AT91C_BASE_SSC->SSC_THR = send_word;
|
AT91C_BASE_SSC->SSC_THR = send_word;
|
||||||
|
|
||||||
data <<= 1;
|
data <<= 1;
|
||||||
}
|
}
|
||||||
WDT_HIT();
|
WDT_HIT();
|
||||||
}
|
}
|
||||||
LED_B_OFF();
|
LED_B_OFF();
|
||||||
}
|
}
|
||||||
|
|
||||||
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
||||||
|
@ -1021,7 +1017,7 @@ static void CodeIso14443bAsReader(const uint8_t *cmd, int len) {
|
||||||
// Send SOF
|
// Send SOF
|
||||||
// 10-11 ETUs of ZERO
|
// 10-11 ETUs of ZERO
|
||||||
for (int i = 0; i < 10; i++)
|
for (int i = 0; i < 10; i++)
|
||||||
tosend_stuffbit(0);
|
tosend_stuffbit(0);
|
||||||
|
|
||||||
|
|
||||||
// 2-3 ETUs of ONE
|
// 2-3 ETUs of ONE
|
||||||
|
@ -1057,16 +1053,16 @@ static void CodeIso14443bAsReader(const uint8_t *cmd, int len) {
|
||||||
// Send EOF
|
// Send EOF
|
||||||
// 10-11 ETUs of ZERO
|
// 10-11 ETUs of ZERO
|
||||||
for (int i = 0; i < 10; i++)
|
for (int i = 0; i < 10; i++)
|
||||||
tosend_stuffbit(0);
|
tosend_stuffbit(0);
|
||||||
|
|
||||||
// Transition time. TR0 - guard time
|
// Transition time. TR0 - guard time
|
||||||
// 8ETUS minum?
|
// 8ETUS minum?
|
||||||
// Per specification, Subcarrier must be stopped no later than 2 ETUs after EOF.
|
// Per specification, Subcarrier must be stopped no later than 2 ETUs after EOF.
|
||||||
// I'm guessing this is for the FPGA to be able to send all bits before we switch to listening mode
|
// I'm guessing this is for the FPGA to be able to send all bits before we switch to listening mode
|
||||||
|
|
||||||
// ensure that last byte is filled up
|
// ensure that last byte is filled up
|
||||||
for (int i = 0; i < 8 ; ++i)
|
for (int i = 0; i < 8 ; ++i)
|
||||||
tosend_stuffbit(1);
|
tosend_stuffbit(1);
|
||||||
|
|
||||||
// TR1 - Synchronization time
|
// TR1 - Synchronization time
|
||||||
// Convert from last character reference to length
|
// Convert from last character reference to length
|
||||||
|
@ -1090,7 +1086,7 @@ static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len) {
|
||||||
* TODO: check CRC and preamble
|
* TODO: check CRC and preamble
|
||||||
*/
|
*/
|
||||||
uint8_t iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *response) {
|
uint8_t iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *response) {
|
||||||
LED_A_ON();
|
LED_A_ON();
|
||||||
uint8_t message_frame[message_length + 4];
|
uint8_t message_frame[message_length + 4];
|
||||||
// PCB
|
// PCB
|
||||||
message_frame[0] = 0x0A | pcb_blocknum;
|
message_frame[0] = 0x0A | pcb_blocknum;
|
||||||
|
@ -1109,9 +1105,9 @@ uint8_t iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *r
|
||||||
FpgaDisableTracing();
|
FpgaDisableTracing();
|
||||||
|
|
||||||
if (ret < 3) {
|
if (ret < 3) {
|
||||||
LED_A_OFF();
|
LED_A_OFF();
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
// VALIDATE CRC
|
// VALIDATE CRC
|
||||||
if (!check_crc(CRC_14443_B, Demod.output, Demod.len)) {
|
if (!check_crc(CRC_14443_B, Demod.output, Demod.len)) {
|
||||||
|
@ -1123,7 +1119,7 @@ uint8_t iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *r
|
||||||
memcpy(response, Demod.output, Demod.len);
|
memcpy(response, Demod.output, Demod.len);
|
||||||
|
|
||||||
return Demod.len;
|
return Demod.len;
|
||||||
LED_A_OFF();
|
LED_A_OFF();
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -1280,7 +1276,7 @@ void iso14443b_setup(void) {
|
||||||
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
|
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
|
||||||
|
|
||||||
// Set up the synchronous serial port
|
// Set up the synchronous serial port
|
||||||
FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
|
FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
|
||||||
|
|
||||||
// Signal field is on with the appropriate LED
|
// Signal field is on with the appropriate LED
|
||||||
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_SHALLOW_MOD);
|
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_SHALLOW_MOD);
|
||||||
|
@ -1439,15 +1435,15 @@ void RAMFUNC SniffIso14443b(void) {
|
||||||
iso1444b_setup_sniff();
|
iso1444b_setup_sniff();
|
||||||
|
|
||||||
// The DMA buffer, used to stream samples from the FPGA
|
// The DMA buffer, used to stream samples from the FPGA
|
||||||
uint16_t *dmaBuf = (uint16_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE * sizeof(uint16_t));
|
uint16_t *dmaBuf = (uint16_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE * sizeof(uint16_t));
|
||||||
uint16_t *upTo = dmaBuf;
|
uint16_t *upTo = dmaBuf;
|
||||||
int lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
|
int lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
|
||||||
int8_t ci, cq;
|
int8_t ci, cq;
|
||||||
int maxBehindBy = 0;
|
int maxBehindBy = 0;
|
||||||
|
|
||||||
// Count of samples received so far, so that we can include timing
|
// Count of samples received so far, so that we can include timing
|
||||||
// information in the trace buffer.
|
// information in the trace buffer.
|
||||||
int samples = 0;
|
int samples = 0;
|
||||||
|
|
||||||
// Setup and start DMA.
|
// Setup and start DMA.
|
||||||
if (!FpgaSetupSscDma((uint8_t *) dmaBuf, ISO14443B_DMA_BUFFER_SIZE)) {
|
if (!FpgaSetupSscDma((uint8_t *) dmaBuf, ISO14443B_DMA_BUFFER_SIZE)) {
|
||||||
|
@ -1462,38 +1458,38 @@ void RAMFUNC SniffIso14443b(void) {
|
||||||
// loop and listen
|
// loop and listen
|
||||||
for(;;) {
|
for(;;) {
|
||||||
|
|
||||||
int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO14443B_DMA_BUFFER_SIZE - 1);
|
int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO14443B_DMA_BUFFER_SIZE - 1);
|
||||||
if (behindBy > maxBehindBy) {
|
if (behindBy > maxBehindBy) {
|
||||||
maxBehindBy = behindBy;
|
maxBehindBy = behindBy;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (behindBy < 1) continue;
|
if (behindBy < 1) continue;
|
||||||
|
|
||||||
ci = *upTo >> 8;
|
ci = *upTo >> 8;
|
||||||
cq = *upTo;
|
cq = *upTo;
|
||||||
upTo++;
|
upTo++;
|
||||||
lastRxCounter--;
|
lastRxCounter--;
|
||||||
if (upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
|
if (upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
|
||||||
upTo = dmaBuf; // start reading the circular buffer from the beginning again
|
upTo = dmaBuf; // start reading the circular buffer from the beginning again
|
||||||
lastRxCounter += ISO14443B_DMA_BUFFER_SIZE;
|
lastRxCounter += ISO14443B_DMA_BUFFER_SIZE;
|
||||||
if (behindBy > (9 * ISO14443B_DMA_BUFFER_SIZE / 10)) {
|
if (behindBy > (9 * ISO14443B_DMA_BUFFER_SIZE / 10)) {
|
||||||
Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
|
Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
|
if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
|
||||||
AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
|
AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
|
||||||
AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; // DMA Next Counter registers
|
AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; // DMA Next Counter registers
|
||||||
|
|
||||||
WDT_HIT();
|
WDT_HIT();
|
||||||
if (BUTTON_PRESS()) {
|
if (BUTTON_PRESS()) {
|
||||||
DbpString("Button pressed, cancelled");
|
DbpString("Button pressed, cancelled");
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
samples++;
|
samples++;
|
||||||
|
|
||||||
// no need to try decoding reader data if the tag is sending
|
// no need to try decoding reader data if the tag is sending
|
||||||
if (TagIsActive == false) {
|
if (TagIsActive == false) {
|
||||||
|
@ -1538,7 +1534,7 @@ void RAMFUNC SniffIso14443b(void) {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
FpgaDisableSscDma();
|
FpgaDisableSscDma();
|
||||||
if (DBGLEVEL >= 2) {
|
if (DBGLEVEL >= 2) {
|
||||||
DbpString("[+] Sniff statistics:");
|
DbpString("[+] Sniff statistics:");
|
||||||
Dbprintf("[+] uart State: %x ByteCount: %i ByteCountMax: %i", Uart.state, Uart.byteCnt, Uart.byteCntMax);
|
Dbprintf("[+] uart State: %x ByteCount: %i ByteCountMax: %i", Uart.state, Uart.byteCnt, Uart.byteCntMax);
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue