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FIX: playing with some delays.
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011a793eae
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cdc0f15104
9 changed files with 21 additions and 14 deletions
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@ -1000,6 +1000,7 @@ void SimulateHitagTag(bool tag_mem_supplied, byte_t* data) {
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// Set up simulator mode, frequency divisor which will drive the FPGA
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// and analog mux selection.
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
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SpinDelay(50);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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RELAY_OFF();
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@ -1230,7 +1231,8 @@ void ReaderHitag(hitag_function htf, hitag_data* htd) {
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// Set fpga in edge detect with reader field, we can modulate as reader now
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);
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SpinDelay(20);
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// Set Frequency divisor which will drive the FPGA and analog mux selection
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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