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Avoid hardcoded lf divisors
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parent
b993819b92
commit
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5 changed files with 23 additions and 23 deletions
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@ -738,7 +738,7 @@ void SniffHitag(void) {
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// Set up eavesdropping mode, frequency divisor which will drive the FPGA
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// and analog mux selection.
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_TOGGLE_MODE);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, LF_DIVISOR_125);
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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// Configure output pin that is connected to the FPGA (for modulating)
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@ -967,7 +967,7 @@ void SimulateHitagTag(bool tag_mem_supplied, uint8_t *data) {
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// Set up simulator mode, frequency divisor which will drive the FPGA
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// and analog mux selection.
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125kHz
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, LF_DIVISOR_125); //125kHz
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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// Configure output pin that is connected to the FPGA (for modulating)
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@ -1173,7 +1173,7 @@ void ReaderHitag(hitag_function htf, hitag_data *htd) {
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// Set fpga in edge detect with reader field, we can modulate as reader now
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125kHz
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, LF_DIVISOR_125); //125kHz
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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// Configure output and enable pin that is connected to the FPGA (for modulating)
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@ -1444,7 +1444,7 @@ void WriterHitag(hitag_function htf, hitag_data *htd, int page) {
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// Set fpga in edge detect with reader field, we can modulate as reader now
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125kHz
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, LF_DIVISOR_125); //125kHz
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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// Disable modulation at default, which means enable the field
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