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refactor: hitagS replace number with more meaning name from datasheet
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2 changed files with 22 additions and 18 deletions
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@ -33,9 +33,8 @@
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// TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
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// TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
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// EM4x50 units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier)
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// EM4x50 units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier)
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// T0 = TIMER_CLOCK1 / 125000 = 192
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// T0 = TIMER_CLOCK1 / 125000 = 192
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#ifndef T0
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#define T0 192
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#define T0 192
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#endif
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// conversions (carrier frequency 125 kHz):
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// conversions (carrier frequency 125 kHz):
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// 1 us = 1.5 ticks
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// 1 us = 1.5 ticks
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@ -79,21 +79,26 @@ static uint32_t rnd = 0x74124485; // random number
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// TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
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// TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
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// Hitag units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier)
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// Hitag units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier)
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// T0 = TIMER_CLOCK1 / 125000 = 192
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// T0 = TIMER_CLOCK1 / 125000 = 192
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#ifndef T0
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#define T0 192
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#define T0 192
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#endif
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#define HITAG_FRAME_LEN 20
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#define HITAG_FRAME_LEN 20
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// TC0 and TC1 will overflow at 341 * T0, so avoid setting these timings above 341 when comparing without considering overflow,
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// as they will never reach that value.
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#define HITAG_T_STOP 36 /* T_EOF should be > 36 */
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#define HITAG_T_STOP 36 /* T_EOF should be > 36 */
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#define HITAG_T_LOW 8 /* T_LOW should be 4..10 */
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#define HITAG_T_LOW 8 /* T_LOW should be 4..10 */
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#define HITAG_T_0_MIN 15 /* T[0] should be 18..22 */
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#define HITAG_T_0_MIN 15 /* T[0] should be 18..22 */
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#define HITAG_T_1_MIN 25 /* T[1] should be 26..30 */
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#define HITAG_T_1_MIN 25 /* T[1] should be 26..30 */
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//#define HITAG_T_EOF 40 /* T_EOF should be > 36 */
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#define HITAG_T_0 20 /* T[0] should be 18..22 */
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#define HITAG_T_1 28 /* T[1] should be 26..30 */
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// #define HITAG_T_EOF 40 /* T_EOF should be > 36 */
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#define HITAG_T_EOF 80 /* T_EOF should be > 36 */
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#define HITAG_T_EOF 80 /* T_EOF should be > 36 */
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#define HITAG_T_WAIT_1 200 /* T_wresp should be 199..206 */
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#define HITAG_T_WAIT_RESP 200 /* T_wresp should be 204..212 */
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#define HITAG_T_WAIT_2 90 /* T_wresp should be 199..206 */
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#define HITAG_T_WAIT_SC 90 /* T_wsc should be 90..5000 */
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#define HITAG_T_WAIT_MAX 300 /* bit more than HITAG_T_WAIT_1 + HITAG_T_WAIT_2 */
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#define HITAG_T_WAIT_FIRST 300 /* T_wfc should be 280..565 (T_ttf) */
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#define HITAG_T_PROG_MAX 750
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#define HITAG_T_PROG_MAX 750 /* T_prog should be 716..726 */
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#define HITAG_T_TAG_ONE_HALF_PERIOD 10
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#define HITAG_T_TAG_ONE_HALF_PERIOD 10
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#define HITAG_T_TAG_TWO_HALF_PERIOD 25
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#define HITAG_T_TAG_TWO_HALF_PERIOD 25
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@ -293,16 +298,16 @@ static void hitag_reader_send_bit(int bit, bool ledcontrol) {
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}
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}
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#else
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#else
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// Wait for 4-10 times the carrier period
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// Wait for 4-10 times the carrier period
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while (AT91C_BASE_TC0->TC_CV < T0 * 6) {};
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while (AT91C_BASE_TC0->TC_CV < T0 * HITAG_T_LOW) {};
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LOW(GPIO_SSC_DOUT);
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LOW(GPIO_SSC_DOUT);
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if (bit == 0) {
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if (bit == 0) {
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// Zero bit: |_-|
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// Zero bit: |_-|
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while (AT91C_BASE_TC0->TC_CV < T0 * 22) {};
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while (AT91C_BASE_TC0->TC_CV < T0 * HITAG_T_0) {};
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} else {
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} else {
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// One bit: |_--|
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// One bit: |_--|
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while (AT91C_BASE_TC0->TC_CV < T0 * 28) {};
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while (AT91C_BASE_TC0->TC_CV < T0 * HITAG_T_1) {};
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}
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}
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#endif
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#endif
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@ -323,7 +328,7 @@ static void hitag_reader_send_frame(const uint8_t *frame, size_t frame_len, bool
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HIGH(GPIO_SSC_DOUT);
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HIGH(GPIO_SSC_DOUT);
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// Wait for 4-10 times the carrier period
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// Wait for 4-10 times the carrier period
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while (AT91C_BASE_TC0->TC_CV < T0 * 6) {};
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while (AT91C_BASE_TC0->TC_CV < T0 * HITAG_T_LOW) {};
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LOW(GPIO_SSC_DOUT);
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LOW(GPIO_SSC_DOUT);
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}
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}
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@ -945,12 +950,12 @@ void SimulateHitagSTag(bool tag_mem_supplied, const uint8_t *data, bool ledcontr
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// Process the incoming frame (rx) and prepare the outgoing frame (tx)
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// Process the incoming frame (rx) and prepare the outgoing frame (tx)
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hitagS_handle_reader_command(rx, rxlen, tx, &txlen);
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hitagS_handle_reader_command(rx, rxlen, tx, &txlen);
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// Wait for HITAG_T_WAIT_1 carrier periods after the last reader bit,
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// Wait for HITAG_T_WAIT_RESP carrier periods after the last reader bit,
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// not that since the clock counts since the rising edge, but T_Wait1 is
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// not that since the clock counts since the rising edge, but T_Wait1 is
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// with respect to the falling edge, we need to wait actually (T_Wait1 - T_Low)
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// with respect to the falling edge, we need to wait actually (T_Wait1 - T_Low)
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// periods. The gap time T_Low varies (4..10). All timer values are in
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// periods. The gap time T_Low varies (4..10). All timer values are in
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// terms of T0 units
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// terms of T0 units
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while (AT91C_BASE_TC0->TC_CV < T0 * (HITAG_T_WAIT_1 - HITAG_T_LOW)) {};
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while (AT91C_BASE_TC0->TC_CV < T0 * (HITAG_T_WAIT_RESP - HITAG_T_LOW)) {};
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// Send and store the tag answer (if there is any)
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// Send and store the tag answer (if there is any)
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if (txlen > 0) {
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if (txlen > 0) {
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@ -1002,7 +1007,7 @@ static void hitagS_receive_frame(uint8_t *rx, size_t sizeofrx, size_t *rxlen, ui
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uint32_t prevcv = 0;
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uint32_t prevcv = 0;
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bool bStarted = false;
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bool bStarted = false;
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// Receive frame, watch for at most T0*EOF periods
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// Receive frame, watch for at most T0*HITAG_T_PROG_MAX periods
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while (AT91C_BASE_TC0->TC_CV + (overcount << 16) < (T0 * HITAG_T_PROG_MAX)) {
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while (AT91C_BASE_TC0->TC_CV + (overcount << 16) < (T0 * HITAG_T_PROG_MAX)) {
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// detect and track counter overflows
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// detect and track counter overflows
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@ -1092,13 +1097,13 @@ static void hitagS_receive_frame(uint8_t *rx, size_t sizeofrx, size_t *rxlen, ui
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static void sendReceiveHitagS(const uint8_t *tx, size_t txlen, uint8_t *rx, size_t sizeofrx, size_t *prxbits, int t_wait, bool ledcontrol, bool ac_seq) {
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static void sendReceiveHitagS(const uint8_t *tx, size_t txlen, uint8_t *rx, size_t sizeofrx, size_t *prxbits, int t_wait, bool ledcontrol, bool ac_seq) {
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LogTraceBits(tx, txlen, HITAG_T_WAIT_2, HITAG_T_WAIT_2, true);
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LogTraceBits(tx, txlen, HITAG_T_WAIT_SC, HITAG_T_WAIT_SC, true);
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// Send and store the reader command
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// Send and store the reader command
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// Disable timer 1 with external trigger to avoid triggers during our own modulation
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// Disable timer 1 with external trigger to avoid triggers during our own modulation
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS;
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS;
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// Wait for HITAG_T_WAIT_2 carrier periods after the last tag bit before transmitting,
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// Wait for HITAG_T_WAIT_SC carrier periods after the last tag bit before transmitting,
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// Since the clock counts since the last falling edge, a 'one' means that the
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// Since the clock counts since the last falling edge, a 'one' means that the
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// falling edge occurred halfway the period. with respect to this falling edge,
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// falling edge occurred halfway the period. with respect to this falling edge,
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// we need to wait (T_Wait2 + half_tag_period) when the last was a 'one'.
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// we need to wait (T_Wait2 + half_tag_period) when the last was a 'one'.
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