mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-14 10:37:23 -07:00
ADD: started to add tracelog in legic
ADD: remake of legic codebase. ADD: started with a annotation for LEGIC in 'hf list'
This commit is contained in:
parent
5b4664e79f
commit
c71c5ee156
8 changed files with 526 additions and 447 deletions
602
armsrc/legicrf.c
602
armsrc/legicrf.c
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@ -8,14 +8,7 @@
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// LEGIC RF simulation code
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//-----------------------------------------------------------------------------
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#include "proxmark3.h"
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#include "apps.h"
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#include "util.h"
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#include "string.h"
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#include "legicrf.h"
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#include "legic_prng.h"
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#include "crc.h"
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static struct legic_frame {
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int bits;
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@ -37,11 +30,12 @@ static int legic_phase_drift;
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static int legic_frame_drift;
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static int legic_reqresp_drift;
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int timestamp;
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AT91PS_TC timer;
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AT91PS_TC prng_timer;
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static void setup_timer(void)
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{
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static void setup_timer(void) {
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/* Set up Timer 1 to use for measuring time between pulses. Since we're bit-banging
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* this it won't be terribly accurate but should be good enough.
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*/
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@ -78,35 +72,59 @@ static void setup_timer(void)
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#define FUZZ_EQUAL(value, target, fuzz) ((value) > ((target)-(fuzz)) && (value) < ((target)+(fuzz)))
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// ~ 258us + 100us*delay
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#define WAIT_387 WAIT(387)
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#define WAIT(delay) while(timer->TC_CV < (delay) );
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// ToDo: define a meaningful maximum size for auth_table. The bigger this is, the lower will be the available memory for traces.
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// Historically it used to be FREE_BUFFER_SIZE, which was 2744.
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#define LEGIC_CARD_MEMSIZE 1024
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static uint8_t* cardmem;
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/*
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The new tracelog..
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// Traceformat:
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// 32 bits timestamp (little endian)
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// 16 bits duration (little endian)
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// 16 bits data length (little endian, Highest Bit used as readerToTag flag)
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// y Bytes data
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// x Bytes parity (one byte per 8 bytes data)
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*/
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/* Generate Keystream */
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static uint32_t get_key_stream(int skip, int count)
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{
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uint32_t key=0; int i;
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uint32_t key = 0;
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int i;
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/* Use int to enlarge timer tc to 32bit */
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// Use int to enlarge timer tc to 32bit
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legic_prng_bc += prng_timer->TC_CV;
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// reset the prng timer.
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prng_timer->TC_CCR = AT91C_TC_SWTRG;
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while(prng_timer->TC_CV > 1) ;
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/* If skip == -1, forward prng time based */
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if(skip == -1) {
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i = (legic_prng_bc+SIM_SHIFT)/SIM_DIVISOR; /* Calculate Cycles based on timer */
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i = (legic_prng_bc + SIM_SHIFT)/SIM_DIVISOR; /* Calculate Cycles based on timer */
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i -= legic_prng_count(); /* substract cycles of finished frames */
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i -= count; /* substract current frame length, rewidn to bedinning */
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i -= count; /* substract current frame length, rewind to beginning */
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legic_prng_forward(i);
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} else {
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legic_prng_forward(skip);
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}
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/* Write Time Data into LOG */
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uint8_t *BigBuf = BigBuf_get_addr();
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i = (count == 6) ? -1 : legic_read_count;
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BigBuf[OFFSET_LOG+128+i] = legic_prng_count();
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BigBuf[OFFSET_LOG+256+i*4] = (legic_prng_bc >> 0) & 0xff;
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BigBuf[OFFSET_LOG+256+i*4+1] = (legic_prng_bc >> 8) & 0xff;
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BigBuf[OFFSET_LOG+256+i*4+2] = (legic_prng_bc >>16) & 0xff;
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BigBuf[OFFSET_LOG+256+i*4+3] = (legic_prng_bc >>24) & 0xff;
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BigBuf[OFFSET_LOG+384+i] = count;
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/* Write Time Data into LOG */
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// uint8_t *BigBuf = BigBuf_get_addr();
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// BigBuf[OFFSET_LOG+128+i] = legic_prng_count();
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// BigBuf[OFFSET_LOG+256+i*4] = (legic_prng_bc >> 0) & 0xff;
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// BigBuf[OFFSET_LOG+256+i*4+1] = (legic_prng_bc >> 8) & 0xff;
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// BigBuf[OFFSET_LOG+256+i*4+2] = (legic_prng_bc >>16) & 0xff;
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// BigBuf[OFFSET_LOG+256+i*4+3] = (legic_prng_bc >>24) & 0xff;
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// BigBuf[OFFSET_LOG+384+i] = count;
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/* Generate KeyStream */
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for(i=0; i<count; i++) {
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@ -129,48 +147,55 @@ static void frame_send_tag(uint16_t response, int bits, int crypt)
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/* Use time to crypt frame */
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if(crypt) {
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legic_prng_forward(2); /* TAG_TIME_WAIT -> shift by 2 */
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int i; int key = 0;
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for(i=0; i<bits; i++) {
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int key = 0;
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for(int i = 0; i < bits; i++) {
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key |= legic_prng_get_bit() << i;
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legic_prng_forward(1);
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}
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//Dbprintf("key = 0x%x", key);
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response = response ^ key;
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}
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/* Wait for the frame start */
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while(timer->TC_CV < (TAG_TIME_WAIT - 30)) ;
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int i;
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for(i=0; i<bits; i++) {
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//while(timer->TC_CV < (TAG_TIME_WAIT - 30)) ;
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WAIT( TAG_TIME_WAIT - 30)
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uint8_t bit = 0;
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for(int i = 0; i < bits; i++) {
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int nextbit = timer->TC_CV + TAG_TIME_BIT;
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int bit = response & 1;
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response = response >> 1;
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if(bit)
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bit = response & 1;
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response >>= 1;
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if (bit)
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AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT;
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else
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AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
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while(timer->TC_CV < nextbit) ;
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//while(timer->TC_CV < nextbit) ;
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WAIT(nextbit)
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}
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AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
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}
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// Starts Clock and waits until its reset
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static void ResetClock(void){
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timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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while(timer->TC_CV > 1) ;
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}
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/* Send a frame in reader mode, the FPGA must have been set up by
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* LegicRfReader
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*/
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static void frame_send_rwd(uint32_t data, int bits)
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{
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/* Start clock */
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timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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while(timer->TC_CV > 1) ; /* Wait till the clock has reset */
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static void frame_send_rwd(uint32_t data, int bits){
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int i;
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for(i=0; i<bits; i++) {
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int starttime = timer->TC_CV;
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int pause_end = starttime + RWD_TIME_PAUSE, bit_end;
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int bit = data & 1;
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data = data >> 1;
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ResetClock();
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int starttime = 0, pause_end = 0, bit = 0, bit_end = 0;
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for(int i = 0; i<bits; i++) {
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starttime = timer->TC_CV;
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pause_end = starttime + RWD_TIME_PAUSE;
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bit = data & 1;
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data >>= 1;
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if(bit ^ legic_prng_get_bit())
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bit_end = starttime + RWD_TIME_1;
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/* RWD_TIME_PAUSE time off, then some time on, so that the complete bit time is
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* RWD_TIME_x, where x is the bit to be transmitted */
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AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
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while(timer->TC_CV < pause_end) ;
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WAIT( pause_end )
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AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT;
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legic_prng_forward(1); /* bit duration is longest. use this time to forward the lfsr */
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while(timer->TC_CV < bit_end);
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WAIT( bit_end )
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}
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/* One final pause to mark the end of the frame */
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int pause_end = timer->TC_CV + RWD_TIME_PAUSE;
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pause_end = timer->TC_CV + RWD_TIME_PAUSE;
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AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
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while(timer->TC_CV < pause_end) ;
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WAIT(pause_end)
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AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT;
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/* Reset the timer, to measure time until the start of the tag frame */
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timer->TC_CCR = AT91C_TC_SWTRG;
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while(timer->TC_CV > 1) ; /* Wait till the clock has reset */
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ResetClock();
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}
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/* Receive a frame from the card in reader emulation mode, the FPGA and
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@ -224,13 +253,11 @@ static void frame_send_rwd(uint32_t data, int bits)
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static void frame_receive_rwd(struct legic_frame * const f, int bits, int crypt)
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{
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uint32_t the_bit = 1; /* Use a bitmask to save on shifts */
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uint32_t data=0;
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int i, old_level=0, edges=0;
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uint32_t data = 0;
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int i, old_level = 0, edges = 0;
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int next_bit_at = TAG_TIME_WAIT;
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if(bits > 32) {
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bits = 32;
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}
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if(bits > 32) bits = 32;
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AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN;
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN;
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@ -246,7 +273,7 @@ static void frame_receive_rwd(struct legic_frame * const f, int bits, int crypt)
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}
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}
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while(timer->TC_CV < next_bit_at) ;
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WAIT(next_bit_at)
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next_bit_at += TAG_TIME_BIT;
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@ -260,7 +287,8 @@ static void frame_receive_rwd(struct legic_frame * const f, int bits, int crypt)
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}
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next_bit_at += TAG_TIME_BIT;
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if(edges > 20 && edges < 60) { /* expected are 42 edges */
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// We expect 42 edges
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if(edges > 20 && edges < 60) {
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data ^= the_bit;
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}
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the_bit <<= 1;
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@ -269,47 +297,51 @@ static void frame_receive_rwd(struct legic_frame * const f, int bits, int crypt)
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f->data = data;
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f->bits = bits;
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/* Reset the timer, to synchronize the next frame */
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timer->TC_CCR = AT91C_TC_SWTRG;
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while(timer->TC_CV > 1) ; /* Wait till the clock has reset */
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// Reset the timer, to synchronize the next frame
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ResetClock();
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}
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static void frame_append_bit(struct legic_frame * const f, int bit)
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{
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if (f->bits >= 31)
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return; /* Overflow, won't happen */
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static void frame_append_bit(struct legic_frame * const f, int bit) {
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// Overflow, won't happen
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if (f->bits >= 31) return;
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f->data |= (bit << f->bits);
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f->bits++;
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}
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static void frame_clean(struct legic_frame * const f)
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{
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static void frame_clean(struct legic_frame * const f) {
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f->data = 0;
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f->bits = 0;
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}
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static uint32_t perform_setup_phase_rwd(int iv)
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{
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// Setup pm3 as a Legic Reader
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static uint32_t perform_setup_phase_rwd(int iv) {
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/* Switch on carrier and let the tag charge for 1ms */
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AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT;
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SpinDelay(1);
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SpinDelay(20); // was 1ms before.
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legic_prng_init(0); /* no keystream yet */
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/* no keystream yet */
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legic_prng_init(0);
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// IV
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frame_send_rwd(iv, 7);
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legic_prng_init(iv);
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frame_clean(¤t_frame);
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frame_receive_rwd(¤t_frame, 6, 1);
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legic_prng_forward(3); /* we wait anyways */
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while(timer->TC_CV < 387) ; /* ~ 258us */
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// we wait anyways
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legic_prng_forward(3);
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WAIT_387
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frame_send_rwd(0x39, 6);
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return current_frame.data;
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}
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static void LegicCommonInit(void) {
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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FpgaSetupSsc();
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@ -320,18 +352,25 @@ static void LegicCommonInit(void) {
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AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
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// reserve a cardmem, meaning we can use the tracelog function in bigbuff easier.
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cardmem = BigBuf_malloc(LEGIC_CARD_MEMSIZE);
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memset(cardmem, 0x00, LEGIC_CARD_MEMSIZE);
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clear_trace();
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set_tracing(TRUE);
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setup_timer();
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crc_init(&legic_crc, 4, 0x19 >> 1, 0x5, 0);
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}
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/* Switch off carrier, make sure tag is reset */
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static void switch_off_tag_rwd(void)
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{
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static void switch_off_tag_rwd(void) {
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AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
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SpinDelay(10);
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WDT_HIT();
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}
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/* calculate crc for a legic command */
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static int LegicCRC(int byte_index, int value, int cmd_sz) {
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crc_clear(&legic_crc);
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@ -342,48 +381,69 @@ static int LegicCRC(int byte_index, int value, int cmd_sz) {
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}
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int legic_read_byte(int byte_index, int cmd_sz) {
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int byte;
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while(timer->TC_CV < 387) ; /* ~ 258us + 100us*delay */
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int byte = 0, calcCrc = 0, crc = 0;
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int cmd = 1 | (byte_index << 1);
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frame_send_rwd(1 | (byte_index << 1), cmd_sz);
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uint8_t cmdbytes[2] = {cmd && 0xff, (cmd >> 8 ) & 0xFF};
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uint32_t starttime = timer->TC_CV, endtime = 0;
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WAIT_387
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// send
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frame_send_rwd(cmd, cmd_sz);
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// log
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endtime = timer->TC_CV;
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LogTrace(cmdbytes, 2, starttime, endtime, NULL, TRUE);
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// clean
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frame_clean(¤t_frame);
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starttime = timer->TC_CV;
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// read
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frame_receive_rwd(¤t_frame, 12, 1);
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// log
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endtime = timer->TC_CV;
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cmdbytes[0] = current_frame.data & 0xff;
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cmdbytes[1] = (current_frame.data >> 8) & 0xFF;
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LogTrace(cmdbytes, 2, starttime, endtime, NULL, FALSE);
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byte = current_frame.data & 0xff;
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calcCrc = LegicCRC(byte_index, byte, cmd_sz);
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crc = (current_frame.data >> 8);
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if( LegicCRC(byte_index, byte, cmd_sz) != (current_frame.data >> 8) ) {
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Dbprintf("!!! crc mismatch: expected %x but got %x !!!",
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LegicCRC(byte_index, current_frame.data & 0xff, cmd_sz),
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current_frame.data >> 8);
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if( calcCrc != crc ) {
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Dbprintf("!!! crc mismatch: expected %x but got %x !!!", calcCrc, crc);
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return -1;
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}
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legic_prng_forward(4); /* we wait anyways */
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// we wait anyways
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legic_prng_forward(4);
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return byte;
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}
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/* legic_write_byte() is not included, however it's trivial to implement
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* and here are some hints on what remains to be done:
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*
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* * assemble a write_cmd_frame with crc and send it
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* * wait until the tag sends back an ACK ('1' bit unencrypted)
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* * forward the prng based on the timing
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/*
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* - assemble a write_cmd_frame with crc and send it
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* - wait until the tag sends back an ACK ('1' bit unencrypted)
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* - forward the prng based on the timing
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*/
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//int legic_write_byte(int byte, int addr, int addr_sz, int PrngCorrection) {
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int legic_write_byte(int byte, int addr, int addr_sz) {
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//do not write UID, CRC
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if(addr <= 0x04) {
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return 0;
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}
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//== send write command ==============================
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//do not write UID, CRC at offset 0-4.
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if(addr <= 0x04) return 0;
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// crc
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crc_clear(&legic_crc);
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crc_update(&legic_crc, 0, 1); /* CMD_WRITE */
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crc_update(&legic_crc, addr, addr_sz);
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crc_update(&legic_crc, byte, 8);
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uint32_t crc = crc_finish(&legic_crc);
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// send write command
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uint32_t cmd = ((crc <<(addr_sz+1+8)) //CRC
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|(byte <<(addr_sz+1)) //Data
|
||||
|(addr <<1) //Address
|
||||
|
@ -391,17 +451,22 @@ int legic_write_byte(int byte, int addr, int addr_sz) {
|
|||
uint32_t cmd_sz = addr_sz+1+8+4; //crc+data+cmd
|
||||
|
||||
legic_prng_forward(2); /* we wait anyways */
|
||||
|
||||
while(timer->TC_CV < 387) ; /* ~ 258us */
|
||||
|
||||
frame_send_rwd(cmd, cmd_sz);
|
||||
|
||||
// wllm-rbnt doesnt have these
|
||||
// AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN;
|
||||
// AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN;
|
||||
|
||||
AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN;
|
||||
AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN;
|
||||
// wait for ack
|
||||
int t, old_level = 0, edges = 0;
|
||||
int next_bit_at = 0;
|
||||
|
||||
//== wait for ack ====================================
|
||||
int t, old_level=0, edges=0;
|
||||
int next_bit_at =0;
|
||||
while(timer->TC_CV < 387) ; /* ~ 258us */
|
||||
for(t=0; t<80; t++) {
|
||||
|
||||
for( t = 0; t < 80; t++) {
|
||||
edges = 0;
|
||||
next_bit_at += TAG_TIME_BIT;
|
||||
while(timer->TC_CV < next_bit_at) {
|
||||
|
@ -413,15 +478,15 @@ int legic_write_byte(int byte, int addr, int addr_sz) {
|
|||
}
|
||||
if(edges > 20 && edges < 60) { /* expected are 42 edges */
|
||||
int t = timer->TC_CV;
|
||||
int c = t/TAG_TIME_BIT;
|
||||
timer->TC_CCR = AT91C_TC_SWTRG;
|
||||
while(timer->TC_CV > 1) ; /* Wait till the clock has reset */
|
||||
int c = t / TAG_TIME_BIT;
|
||||
|
||||
ResetClock();
|
||||
legic_prng_forward(c);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
timer->TC_CCR = AT91C_TC_SWTRG;
|
||||
while(timer->TC_CV > 1) ; /* Wait till the clock has reset */
|
||||
|
||||
ResetClock();
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
@ -431,43 +496,44 @@ int LegicRfReader(int offset, int bytes, int iv) {
|
|||
// ice_legic_select_card();
|
||||
// return 0;
|
||||
|
||||
int byte_index=0, cmd_sz=0, card_sz=0;
|
||||
int byte_index = 0, cmd_sz = 0, card_sz = 0;
|
||||
|
||||
iv = (iv <= 0 ) ? SESSION_IV : iv;
|
||||
|
||||
LegicCommonInit();
|
||||
|
||||
uint8_t *BigBuf = BigBuf_get_addr();
|
||||
memset(BigBuf, 0, 1024);
|
||||
if ( MF_DBGLEVEL >= 2) DbpString("setting up legic card");
|
||||
|
||||
DbpString("setting up legic card");
|
||||
uint32_t tag_type = perform_setup_phase_rwd(iv);
|
||||
switch_off_tag_rwd(); //we lose to mutch time with dprintf
|
||||
|
||||
//we lose to mutch time with dprintf
|
||||
switch_off_tag_rwd();
|
||||
|
||||
switch(tag_type) {
|
||||
case 0x0d:
|
||||
DbpString("MIM22 card found, reading card ...");
|
||||
if ( MF_DBGLEVEL >= 2) DbpString("MIM22 card found, reading card ...");
|
||||
cmd_sz = 6;
|
||||
card_sz = 22;
|
||||
break;
|
||||
case 0x1d:
|
||||
DbpString("MIM256 card found, reading card ...");
|
||||
if ( MF_DBGLEVEL >= 2) DbpString("MIM256 card found, reading card ...");
|
||||
cmd_sz = 9;
|
||||
card_sz = 256;
|
||||
break;
|
||||
case 0x3d:
|
||||
DbpString("MIM1024 card found, reading card ...");
|
||||
if ( MF_DBGLEVEL >= 2) DbpString("MIM1024 card found, reading card ...");
|
||||
cmd_sz = 11;
|
||||
card_sz = 1024;
|
||||
break;
|
||||
default:
|
||||
Dbprintf("Unknown card format: %x",tag_type);
|
||||
if ( MF_DBGLEVEL >= 1) Dbprintf("Unknown card format: %x",tag_type);
|
||||
return -1;
|
||||
}
|
||||
if(bytes == -1)
|
||||
bytes = card_sz;
|
||||
|
||||
if(bytes+offset >= card_sz)
|
||||
bytes = card_sz-offset;
|
||||
bytes = card_sz - offset;
|
||||
|
||||
perform_setup_phase_rwd(iv);
|
||||
|
||||
|
@ -476,23 +542,22 @@ int LegicRfReader(int offset, int bytes, int iv) {
|
|||
LED_B_ON();
|
||||
while(byte_index < bytes) {
|
||||
int r = legic_read_byte(byte_index+offset, cmd_sz);
|
||||
if(r == -1 ||BUTTON_PRESS()) {
|
||||
DbpString("operation aborted");
|
||||
switch_off_tag_rwd();
|
||||
LED_B_OFF();
|
||||
LED_C_OFF();
|
||||
return -1;
|
||||
if(r == -1 || BUTTON_PRESS()) {
|
||||
switch_off_tag_rwd();
|
||||
LEDsoff();
|
||||
if ( MF_DBGLEVEL >= 2) DbpString("operation aborted");
|
||||
return -1;
|
||||
}
|
||||
BigBuf[byte_index] = r;
|
||||
cardmem[byte_index] = r;
|
||||
WDT_HIT();
|
||||
byte_index++;
|
||||
if (byte_index & 0x10) LED_C_ON(); else LED_C_OFF();
|
||||
byte_index++;
|
||||
}
|
||||
LED_B_OFF();
|
||||
LED_C_OFF();
|
||||
|
||||
switch_off_tag_rwd();
|
||||
Dbprintf("Card read, use 'hf legic decode' or");
|
||||
Dbprintf("'data hexsamples %d' to view results", (bytes+7) & ~7);
|
||||
LEDsoff();
|
||||
|
||||
if ( MF_DBGLEVEL >= 1) Dbprintf("Card read, use 'hf legic decode' or");
|
||||
if ( MF_DBGLEVEL >= 1) Dbprintf("'data hexsamples %d' to view results", (bytes+7) & ~7);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -539,15 +604,18 @@ int LegicRfReader(int offset, int bytes, int iv) {
|
|||
|
||||
void LegicRfWriter(int offset, int bytes, int iv) {
|
||||
|
||||
int byte_index=0, addr_sz=0;
|
||||
uint8_t *BigBuf = BigBuf_get_addr();
|
||||
int byte_index = 0, addr_sz = 0;
|
||||
|
||||
iv = (iv <=0 ) ? SESSION_IV : iv;
|
||||
|
||||
LegicCommonInit();
|
||||
|
||||
DbpString("setting up legic card");
|
||||
if ( MF_DBGLEVEL >= 2) DbpString("setting up legic card");
|
||||
|
||||
uint32_t tag_type = perform_setup_phase_rwd(iv);
|
||||
|
||||
switch_off_tag_rwd();
|
||||
|
||||
switch(tag_type) {
|
||||
case 0x0d:
|
||||
if(offset+bytes > 22) {
|
||||
|
@ -555,7 +623,7 @@ void LegicRfWriter(int offset, int bytes, int iv) {
|
|||
return;
|
||||
}
|
||||
addr_sz = 5;
|
||||
Dbprintf("MIM22 card found, writing 0x%02.2x - 0x%02.2x ...", offset, offset+bytes);
|
||||
if ( MF_DBGLEVEL >= 2) Dbprintf("MIM22 card found, writing 0x%02.2x - 0x%02.2x ...", offset, offset+bytes);
|
||||
break;
|
||||
case 0x1d:
|
||||
if(offset+bytes > 0x100) {
|
||||
|
@ -563,7 +631,7 @@ void LegicRfWriter(int offset, int bytes, int iv) {
|
|||
return;
|
||||
}
|
||||
addr_sz = 8;
|
||||
Dbprintf("MIM256 card found, writing 0x%02.2x - 0x%02.2x ...", offset, offset+bytes);
|
||||
if ( MF_DBGLEVEL >= 2) Dbprintf("MIM256 card found, writing 0x%02.2x - 0x%02.2x ...", offset, offset+bytes);
|
||||
break;
|
||||
case 0x3d:
|
||||
if(offset+bytes > 0x400) {
|
||||
|
@ -571,14 +639,13 @@ void LegicRfWriter(int offset, int bytes, int iv) {
|
|||
return;
|
||||
}
|
||||
addr_sz = 10;
|
||||
Dbprintf("MIM1024 card found, writing 0x%03.3x - 0x%03.3x ...", offset, offset+bytes);
|
||||
if ( MF_DBGLEVEL >= 2) Dbprintf("MIM1024 card found, writing 0x%03.3x - 0x%03.3x ...", offset, offset+bytes);
|
||||
break;
|
||||
default:
|
||||
Dbprintf("No or unknown card found, aborting");
|
||||
return;
|
||||
}
|
||||
|
||||
#if 1
|
||||
LED_B_ON();
|
||||
perform_setup_phase_rwd(iv);
|
||||
while(byte_index < bytes) {
|
||||
|
@ -587,53 +654,46 @@ void LegicRfWriter(int offset, int bytes, int iv) {
|
|||
//check if the DCF should be changed
|
||||
if ( ((byte_index+offset) == 0x05) && (bytes >= 0x02) ) {
|
||||
//write DCF in reverse order (addr 0x06 before 0x05)
|
||||
r = legic_write_byte(BigBuf[(0x06-byte_index)], (0x06-byte_index), addr_sz);
|
||||
r = legic_write_byte(cardmem[(0x06-byte_index)], (0x06-byte_index), addr_sz);
|
||||
|
||||
// write second byte on success...
|
||||
if(r == 0) {
|
||||
byte_index++;
|
||||
r = legic_write_byte(BigBuf[(0x06-byte_index)], (0x06-byte_index), addr_sz);
|
||||
r = legic_write_byte(cardmem[(0x06-byte_index)], (0x06-byte_index), addr_sz);
|
||||
}
|
||||
}
|
||||
else {
|
||||
r = legic_write_byte(BigBuf[byte_index+offset], byte_index+offset, addr_sz);
|
||||
r = legic_write_byte(cardmem[byte_index+offset], byte_index+offset, addr_sz);
|
||||
}
|
||||
|
||||
if((r != 0) || BUTTON_PRESS()) {
|
||||
Dbprintf("operation aborted @ 0x%03.3x", byte_index);
|
||||
switch_off_tag_rwd();
|
||||
LED_B_OFF();
|
||||
LED_C_OFF();
|
||||
LEDsoff();
|
||||
return;
|
||||
}
|
||||
|
||||
WDT_HIT();
|
||||
byte_index++;
|
||||
if(byte_index & 0x10) LED_C_ON(); else LED_C_OFF();
|
||||
}
|
||||
LED_B_OFF();
|
||||
LED_C_OFF();
|
||||
DbpString("write successful");
|
||||
#else
|
||||
for(byte_index = -2; byte_index < 200; byte_index++)
|
||||
{
|
||||
Dbprintf("+ Try RndValue %d...", byte_index);
|
||||
if(_LegicRfWriter(bytes, offset, addr_sz, BigBuf, byte_index) == 0)
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
|
||||
LEDsoff();
|
||||
if ( MF_DBGLEVEL >= 1) DbpString("write successful");
|
||||
}
|
||||
|
||||
void LegicRfRawWriter(int address, int byte, int iv) {
|
||||
int byte_index=0, addr_sz=0;
|
||||
|
||||
int byte_index = 0, addr_sz = 0;
|
||||
|
||||
iv = (iv <= 0) ? SESSION_IV : iv;
|
||||
|
||||
LegicCommonInit();
|
||||
|
||||
DbpString("setting up legic card");
|
||||
if ( MF_DBGLEVEL >= 2) DbpString("setting up legic card");
|
||||
|
||||
uint32_t tag_type = perform_setup_phase_rwd(iv);
|
||||
|
||||
switch_off_tag_rwd();
|
||||
|
||||
switch(tag_type) {
|
||||
case 0x0d:
|
||||
if(address > 22) {
|
||||
|
@ -641,7 +701,7 @@ void LegicRfRawWriter(int address, int byte, int iv) {
|
|||
return;
|
||||
}
|
||||
addr_sz = 5;
|
||||
Dbprintf("MIM22 card found, writing at addr 0x%02.2x - value 0x%02.2x ...", address, byte);
|
||||
if ( MF_DBGLEVEL >= 2) Dbprintf("MIM22 card found, writing at addr 0x%02.2x - value 0x%02.2x ...", address, byte);
|
||||
break;
|
||||
case 0x1d:
|
||||
if(address > 0x100) {
|
||||
|
@ -649,7 +709,7 @@ void LegicRfRawWriter(int address, int byte, int iv) {
|
|||
return;
|
||||
}
|
||||
addr_sz = 8;
|
||||
Dbprintf("MIM256 card found, writing at addr 0x%02.2x - value 0x%02.2x ...", address, byte);
|
||||
if ( MF_DBGLEVEL >= 2) Dbprintf("MIM256 card found, writing at addr 0x%02.2x - value 0x%02.2x ...", address, byte);
|
||||
break;
|
||||
case 0x3d:
|
||||
if(address > 0x400) {
|
||||
|
@ -657,14 +717,16 @@ void LegicRfRawWriter(int address, int byte, int iv) {
|
|||
return;
|
||||
}
|
||||
addr_sz = 10;
|
||||
Dbprintf("MIM1024 card found, writing at addr 0x%03.3x - value 0x%03.3x ...", address, byte);
|
||||
if ( MF_DBGLEVEL >= 2) Dbprintf("MIM1024 card found, writing at addr 0x%03.3x - value 0x%03.3x ...", address, byte);
|
||||
break;
|
||||
default:
|
||||
Dbprintf("No or unknown card found, aborting");
|
||||
return;
|
||||
}
|
||||
|
||||
Dbprintf("integer value: %d address: %d addr_sz: %d", byte, address, addr_sz);
|
||||
LED_B_ON();
|
||||
|
||||
perform_setup_phase_rwd(iv);
|
||||
//legic_prng_forward(2);
|
||||
|
||||
|
@ -673,28 +735,29 @@ void LegicRfRawWriter(int address, int byte, int iv) {
|
|||
if((r != 0) || BUTTON_PRESS()) {
|
||||
Dbprintf("operation aborted @ 0x%03.3x (%1d)", byte_index, r);
|
||||
switch_off_tag_rwd();
|
||||
LED_B_OFF();
|
||||
LED_C_OFF();
|
||||
LEDsoff();
|
||||
return;
|
||||
}
|
||||
|
||||
LED_B_OFF();
|
||||
LED_C_OFF();
|
||||
DbpString("write successful");
|
||||
|
||||
LEDsoff();
|
||||
if ( MF_DBGLEVEL >= 1) DbpString("write successful");
|
||||
}
|
||||
|
||||
int timestamp;
|
||||
|
||||
/* Handle (whether to respond) a frame in tag mode */
|
||||
/* Handle (whether to respond) a frame in tag mode
|
||||
* Only called when simulating a tag.
|
||||
*/
|
||||
static void frame_handle_tag(struct legic_frame const * const f)
|
||||
{
|
||||
uint8_t *BigBuf = BigBuf_get_addr();
|
||||
|
||||
/* First Part of Handshake (IV) */
|
||||
if(f->bits == 7) {
|
||||
// if(f->data == SESSION_IV) {
|
||||
|
||||
LED_C_ON();
|
||||
prng_timer->TC_CCR = AT91C_TC_SWTRG;
|
||||
|
||||
prng_timer->TC_CCR = AT91C_TC_SWTRG;
|
||||
while(prng_timer->TC_CV > 1) ;
|
||||
|
||||
legic_prng_init(f->data);
|
||||
frame_send_tag(0x3d, 6, 1); /* 0x3d^0x26 = 0x1b */
|
||||
legic_state = STATE_IV;
|
||||
|
@ -703,16 +766,11 @@ static void frame_handle_tag(struct legic_frame const * const f)
|
|||
legic_prng_iv = f->data;
|
||||
|
||||
/* TIMEOUT */
|
||||
timer->TC_CCR = AT91C_TC_SWTRG;
|
||||
while(timer->TC_CV > 1);
|
||||
while(timer->TC_CV < 280);
|
||||
ResetClock();
|
||||
|
||||
//while(timer->TC_CV < 280);
|
||||
WAIT(280)
|
||||
return;
|
||||
// } else if((prng_timer->TC_CV % 50) > 40) {
|
||||
// legic_prng_init(f->data);
|
||||
// frame_send_tag(0x3d, 6, 1);
|
||||
// SpinDelay(20);
|
||||
// return;
|
||||
// }
|
||||
}
|
||||
|
||||
/* 0x19==??? */
|
||||
|
@ -723,9 +781,11 @@ static void frame_handle_tag(struct legic_frame const * const f)
|
|||
legic_state = STATE_CON;
|
||||
|
||||
/* TIMEOUT */
|
||||
timer->TC_CCR = AT91C_TC_SWTRG;
|
||||
while(timer->TC_CV > 1);
|
||||
while(timer->TC_CV < 200);
|
||||
ResetClock();
|
||||
|
||||
//while(timer->TC_CV < 200);
|
||||
WAIT(200)
|
||||
|
||||
return;
|
||||
} else {
|
||||
legic_state = STATE_DISCON;
|
||||
|
@ -750,11 +810,13 @@ static void frame_handle_tag(struct legic_frame const * const f)
|
|||
|
||||
frame_send_tag(hash | data, 12, 1);
|
||||
|
||||
/* SHORT TIMEOUT */
|
||||
timer->TC_CCR = AT91C_TC_SWTRG;
|
||||
while(timer->TC_CV > 1);
|
||||
/* TIMEOUT */
|
||||
ResetClock();
|
||||
|
||||
legic_prng_forward(2);
|
||||
while(timer->TC_CV < 180);
|
||||
//while(timer->TC_CV < 180);
|
||||
WAIT(180)
|
||||
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
@ -803,21 +865,25 @@ static void frame_handle_tag(struct legic_frame const * const f)
|
|||
/* Read bit by bit untill full frame is received
|
||||
* Call to process frame end answer
|
||||
*/
|
||||
static void emit(int bit)
|
||||
{
|
||||
if(bit == -1) {
|
||||
if(current_frame.bits <= 4) {
|
||||
frame_clean(¤t_frame);
|
||||
} else {
|
||||
frame_handle_tag(¤t_frame);
|
||||
frame_clean(¤t_frame);
|
||||
}
|
||||
WDT_HIT();
|
||||
} else if(bit == 0) {
|
||||
frame_append_bit(¤t_frame, 0);
|
||||
} else if(bit == 1) {
|
||||
frame_append_bit(¤t_frame, 1);
|
||||
}
|
||||
static void emit(int bit) {
|
||||
|
||||
switch (bit) {
|
||||
case 1:
|
||||
frame_append_bit(¤t_frame, 1);
|
||||
break;
|
||||
case 0:
|
||||
frame_append_bit(¤t_frame, 0);
|
||||
break;
|
||||
default:
|
||||
if(current_frame.bits <= 4) {
|
||||
frame_clean(¤t_frame);
|
||||
} else {
|
||||
frame_handle_tag(¤t_frame);
|
||||
frame_clean(¤t_frame);
|
||||
}
|
||||
WDT_HIT();
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void LegicRfSimulate(int phase, int frame, int reqresp)
|
||||
|
@ -833,84 +899,74 @@ void LegicRfSimulate(int phase, int frame, int reqresp)
|
|||
* seems to be 300us-ish.
|
||||
*/
|
||||
|
||||
// if(phase < 0) {
|
||||
// int i;
|
||||
// for(i=0; i<=reqresp; i++) {
|
||||
// legic_prng_init(SESSION_IV);
|
||||
// Dbprintf("i=%u, key 0x%3.3x", i, get_key_stream(i, frame));
|
||||
// }
|
||||
// return;
|
||||
// }
|
||||
legic_phase_drift = phase;
|
||||
legic_frame_drift = frame;
|
||||
legic_reqresp_drift = reqresp;
|
||||
|
||||
legic_phase_drift = phase;
|
||||
legic_frame_drift = frame;
|
||||
legic_reqresp_drift = reqresp;
|
||||
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
|
||||
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
|
||||
FpgaSetupSsc();
|
||||
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_212K);
|
||||
|
||||
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
|
||||
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
|
||||
FpgaSetupSsc();
|
||||
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_212K);
|
||||
/* Bitbang the receiver */
|
||||
AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN;
|
||||
AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN;
|
||||
|
||||
setup_timer();
|
||||
crc_init(&legic_crc, 4, 0x19 >> 1, 0x5, 0);
|
||||
|
||||
int old_level = 0;
|
||||
int active = 0;
|
||||
legic_state = STATE_DISCON;
|
||||
|
||||
LED_B_ON();
|
||||
DbpString("Starting Legic emulator, press button to end");
|
||||
|
||||
/* Bitbang the receiver */
|
||||
AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN;
|
||||
AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN;
|
||||
|
||||
setup_timer();
|
||||
crc_init(&legic_crc, 4, 0x19 >> 1, 0x5, 0);
|
||||
|
||||
int old_level = 0;
|
||||
int active = 0;
|
||||
legic_state = STATE_DISCON;
|
||||
while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
|
||||
int level = !!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN);
|
||||
int time = timer->TC_CV;
|
||||
|
||||
LED_B_ON();
|
||||
DbpString("Starting Legic emulator, press button to end");
|
||||
while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
|
||||
int level = !!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN);
|
||||
int time = timer->TC_CV;
|
||||
|
||||
if(level != old_level) {
|
||||
if(level == 1) {
|
||||
timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
|
||||
if(FUZZ_EQUAL(time, RWD_TIME_1, RWD_TIME_FUZZ)) {
|
||||
/* 1 bit */
|
||||
emit(1);
|
||||
active = 1;
|
||||
LED_A_ON();
|
||||
} else if(FUZZ_EQUAL(time, RWD_TIME_0, RWD_TIME_FUZZ)) {
|
||||
/* 0 bit */
|
||||
emit(0);
|
||||
active = 1;
|
||||
LED_A_ON();
|
||||
} else if(active) {
|
||||
/* invalid */
|
||||
emit(-1);
|
||||
active = 0;
|
||||
LED_A_OFF();
|
||||
}
|
||||
}
|
||||
}
|
||||
if(level != old_level) {
|
||||
if(level == 1) {
|
||||
timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
|
||||
|
||||
if (FUZZ_EQUAL(time, RWD_TIME_1, RWD_TIME_FUZZ)) {
|
||||
/* 1 bit */
|
||||
emit(1);
|
||||
active = 1;
|
||||
LED_A_ON();
|
||||
} else if (FUZZ_EQUAL(time, RWD_TIME_0, RWD_TIME_FUZZ)) {
|
||||
/* 0 bit */
|
||||
emit(0);
|
||||
active = 1;
|
||||
LED_A_ON();
|
||||
} else if (active) {
|
||||
/* invalid */
|
||||
emit(-1);
|
||||
active = 0;
|
||||
LED_A_OFF();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if(time >= (RWD_TIME_1+RWD_TIME_FUZZ) && active) {
|
||||
/* Frame end */
|
||||
emit(-1);
|
||||
active = 0;
|
||||
LED_A_OFF();
|
||||
}
|
||||
|
||||
if(time >= (20*RWD_TIME_1) && (timer->TC_SR & AT91C_TC_CLKSTA)) {
|
||||
timer->TC_CCR = AT91C_TC_CLKDIS;
|
||||
}
|
||||
|
||||
old_level = level;
|
||||
WDT_HIT();
|
||||
}
|
||||
DbpString("Stopped");
|
||||
LED_B_OFF();
|
||||
LED_A_OFF();
|
||||
LED_C_OFF();
|
||||
/* Frame end */
|
||||
if(time >= (RWD_TIME_1+RWD_TIME_FUZZ) && active) {
|
||||
emit(-1);
|
||||
active = 0;
|
||||
LED_A_OFF();
|
||||
}
|
||||
|
||||
if(time >= (20*RWD_TIME_1) && (timer->TC_SR & AT91C_TC_CLKSTA)) {
|
||||
timer->TC_CCR = AT91C_TC_CLKDIS;
|
||||
}
|
||||
|
||||
old_level = level;
|
||||
WDT_HIT();
|
||||
}
|
||||
if ( MF_DBGLEVEL >= 1) DbpString("Stopped");
|
||||
LEDsoff();
|
||||
}
|
||||
|
||||
|
||||
//-----------------------------------------------------------------------------
|
||||
//-----------------------------------------------------------------------------
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue